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| Started by | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
|---|---|
| First post | 2017-04-19 19:00 +0200 |
| Last post | 2017-04-19 19:00 +0200 |
| Articles | 1 — 1 participant |
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[PATCH v4 09/21] PCI: xilinx-nwl: update PCI config space remap function Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-04-19 19:00 +0200
| From | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
|---|---|
| Date | 2017-04-19 19:00 +0200 |
| Subject | [PATCH v4 09/21] PCI: xilinx-nwl: update PCI config space remap function |
| Message-ID | <ty17r-5PA-7@gated-at.bofh.it> |
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> --- drivers/pci/host/pcie-xilinx-nwl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c index 4c3e0ab..4b16b26 100644 --- a/drivers/pci/host/pcie-xilinx-nwl.c +++ b/drivers/pci/host/pcie-xilinx-nwl.c @@ -761,7 +761,7 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, pcie->phys_pcie_reg_base = res->start; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); - pcie->ecam_base = devm_ioremap_resource(dev, res); + pcie->ecam_base = devm_pci_remap_cfg_resource(dev, res); if (IS_ERR(pcie->ecam_base)) return PTR_ERR(pcie->ecam_base); pcie->phys_ecam_base = res->start; -- 2.10.0
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