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Groups > linux.kernel > #1624646 > unrolled thread

[PATCH v3 00/12] AXP803 PMIC support for Pine64

Started byIcenowy Zheng <icenowy@aosc.io>
First post2017-04-17 14:00 +0200
Last post2017-04-17 14:10 +0200
Articles 11 on this page of 31 — 6 participants

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  [PATCH v3 00/12] AXP803 PMIC support for Pine64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:00 +0200
    [PATCH v3 09/12] mfd: axp20x: add axp20x-regulator cell for AXP803 Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [linux-sunxi] [PATCH v3 09/12] mfd: axp20x: add axp20x-regulator  cell for AXP803 Chen-Yu Tsai <wens@csie.org> - 2017-04-18 12:40 +0200
        Re: [linux-sunxi] [PATCH v3 09/12] mfd: axp20x: add axp20x-regulator cell for AXP803 Icenowy Zheng <icenowy@aosc.io> - 2017-04-18 13:00 +0200
          Re: [linux-sunxi] [PATCH v3 09/12] mfd: axp20x: add axp20x-regulator  cell for AXP803 Chen-Yu Tsai <wens@csie.org> - 2017-04-18 14:00 +0200
    [PATCH v3 10/12] arm64: allwinner: a64: add DTSI file for AXP803 PMIC Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [PATCH v3 10/12] arm64: allwinner: a64: add DTSI file for AXP803  PMIC Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-18 09:10 +0200
      Re: [linux-sunxi] [PATCH v3 10/12] arm64: allwinner: a64: add DTSI  file for AXP803 PMIC Chen-Yu Tsai <wens@csie.org> - 2017-04-18 09:30 +0200
    [PATCH v3 08/12] regulator: axp20x-regulator: add support for AXP803 Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [linux-sunxi] [PATCH v3 08/12] regulator: axp20x-regulator: add  support for AXP803 Chen-Yu Tsai <wens@csie.org> - 2017-04-18 14:10 +0200
    [PATCH v3 04/12] dt-bindings: add device tree binding for X-Powers AXP803 PMIC Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [PATCH v3 04/12] dt-bindings: add device tree binding for  X-Powers AXP803 PMIC Lee Jones <lee.jones@linaro.org> - 2017-04-24 14:10 +0200
    [PATCH v3 11/12] arm64: allwinner: a64: enable AXP803 regulators for Pine64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
    [PATCH v3 12/12] arm64: allwinner: a64: enable Wi-Fi for Pine64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
    [PATCH v3 03/12] dt-bindings: make AXP20X compatible strings one per line Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [linux-sunxi] [PATCH v3 03/12] dt-bindings: make AXP20X  compatible strings one per line Chen-Yu Tsai <wens@csie.org> - 2017-04-18 12:40 +0200
      Re: [PATCH v3 03/12] dt-bindings: make AXP20X compatible strings one  per line Rob Herring <robh@kernel.org> - 2017-04-20 16:20 +0200
      Re: [PATCH v3 03/12] dt-bindings: make AXP20X compatible strings one  per line Lee Jones <lee.jones@linaro.org> - 2017-04-24 14:10 +0200
    [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-18 09:10 +0200
        Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64 Icenowy Zheng <icenowy@aosc.io> - 2017-04-18 13:10 +0200
          Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add  NMI controller on A64 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-20 08:40 +0200
            Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI  controller on A64 icenowy@aosc.io - 2017-04-20 09:10 +0200
              Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add  NMI controller on A64 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-04-24 09:20 +0200
                Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI  controller on A64 icenowy@aosc.io - 2017-04-24 12:30 +0200
    [PATCH v3 07/12] dt-bindings: add AXP803's regulator info Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [linux-sunxi] [PATCH v3 07/12] dt-bindings: add AXP803's  regulator info Chen-Yu Tsai <wens@csie.org> - 2017-04-18 12:40 +0200
      Re: [PATCH v3 07/12] dt-bindings: add AXP803's regulator info Lee Jones <lee.jones@linaro.org> - 2017-04-24 14:10 +0200
    [PATCH v3 05/12] mfd: axp20x: support AXP803 variant Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200
      Re: [PATCH v3 05/12] mfd: axp20x: support AXP803 variant Lee Jones <lee.jones@linaro.org> - 2017-04-24 14:10 +0200
    [PATCH v3 06/12] arm64: allwinner: a64: add AXP803 node to Pine64 device tree Icenowy Zheng <icenowy@aosc.io> - 2017-04-17 14:10 +0200

Page 2 of 2 — ← Prev page 1 [2]

#1625255 — Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64

FromIcenowy Zheng <icenowy@aosc.io>
Date2017-04-18 13:10 +0200
SubjectRe: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Message-ID<txzbb-5tz-3@gated-at.bofh.it>
In reply to#1625088

于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard <maxime.ripard@free-electrons.com> 写到:
>On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
>> Allwinner A64 SoC features a NMI controller, which is usually
>connected
>> to the AXP PMIC.
>> 
>> Add support for it.
>> 
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> Acked-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>> Changes in v2:
>> - Added Chen-Yu's ACK.
>> 
>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index 05ec9fc5e81f..53c18ca372ea 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -403,6 +403,14 @@
>>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>>  		};
>>  
>> +		nmi_intc: interrupt-controller@01f00c0c {
>> +			compatible = "allwinner,sun6i-a31-sc-nmi";
>> +			interrupt-controller;
>> +			#interrupt-cells = <2>;
>> +			reg = <0x01f00c0c 0x38>;
>
>The base address is not correct, and there's uncertainty on whether
>this is this particular controller or not. Did you even test this?

Tested by axp20x-pek.

>
>Maxime

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#1627025 — Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2017-04-20 08:40 +0200
SubjectRe: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Message-ID<tydUZ-5tf-15@gated-at.bofh.it>
In reply to#1625255

[Multipart message — attachments visible in raw view] — view raw

On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
> 
> 
> 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard <maxime.ripard@free-electrons.com> 写到:
> >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
> >> Allwinner A64 SoC features a NMI controller, which is usually
> >connected
> >> to the AXP PMIC.
> >> 
> >> Add support for it.
> >> 
> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> >> Acked-by: Chen-Yu Tsai <wens@csie.org>
> >> ---
> >> Changes in v2:
> >> - Added Chen-Yu's ACK.
> >> 
> >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
> >>  1 file changed, 8 insertions(+)
> >> 
> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> index 05ec9fc5e81f..53c18ca372ea 100644
> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> >> @@ -403,6 +403,14 @@
> >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> >>  		};
> >>  
> >> +		nmi_intc: interrupt-controller@01f00c0c {
> >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
> >> +			interrupt-controller;
> >> +			#interrupt-cells = <2>;
> >> +			reg = <0x01f00c0c 0x38>;
> >
> >The base address is not correct, and there's uncertainty on whether
> >this is this particular controller or not. Did you even test this?
> 
> Tested by axp20x-pek.

Still, the base address is wrong, which is yet another hint that this
is not the same interrupt controller, and just works by accident.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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#1627151 — Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64

Fromicenowy@aosc.io
Date2017-04-20 09:10 +0200
SubjectRe: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Message-ID<tyeo3-5TJ-55@gated-at.bofh.it>
In reply to#1627025
在 2017-04-20 13:58，Maxime Ripard 写道：
> On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
>> 
>> 
>> 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard 
>> <maxime.ripard@free-electrons.com> 写到:
>> >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
>> >> Allwinner A64 SoC features a NMI controller, which is usually
>> >connected
>> >> to the AXP PMIC.
>> >>
>> >> Add support for it.
>> >>
>> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> >> Acked-by: Chen-Yu Tsai <wens@csie.org>
>> >> ---
>> >> Changes in v2:
>> >> - Added Chen-Yu's ACK.
>> >>
>> >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
>> >>  1 file changed, 8 insertions(+)
>> >>
>> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> >> index 05ec9fc5e81f..53c18ca372ea 100644
>> >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> >> @@ -403,6 +403,14 @@
>> >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>> >>  		};
>> >>
>> >> +		nmi_intc: interrupt-controller@01f00c0c {
>> >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
>> >> +			interrupt-controller;
>> >> +			#interrupt-cells = <2>;
>> >> +			reg = <0x01f00c0c 0x38>;
>> >
>> >The base address is not correct, and there's uncertainty on whether
>> >this is this particular controller or not. Did you even test this?
>> 
>> Tested by axp20x-pek.
> 
> Still, the base address is wrong, which is yet another hint that this
> is not the same interrupt controller, and just works by accident.

No, it's the same as other post-sun6i device trees.
See other post-sun6i device trees: (or maybe they're all wrong, but
as we have no document for it, we should temporarily keep them)

sun6i-a31.dtsi
```
		nmi_intc: interrupt-controller@01f00c0c {
			compatible = "allwinner,sun6i-a31-sc-nmi";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x01f00c0c 0x38>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		};
```

sun8i-a23-a33.dtsi
```
		nmi_intc: interrupt-controller@01f00c0c {
			compatible = "allwinner,sun6i-a31-sc-nmi";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x01f00c0c 0x38>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		};
```

But according to the BSP device tree, the base address should be
0x01f00c00. Should I send some patch to fix all of them? (but it will
break device tree compatibility)

> 
> Maxime
> 
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

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#1629256 — Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2017-04-24 09:20 +0200
SubjectRe: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Message-ID<tzGrT-3YY-1@gated-at.bofh.it>
In reply to#1627151

[Multipart message — attachments visible in raw view] — view raw

On Thu, Apr 20, 2017 at 03:03:38PM +0800, icenowy@aosc.io wrote:
> 在 2017-04-20 13:58，Maxime Ripard 写道：
> > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
> > > 
> > > 
> > > 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard
> > > <maxime.ripard@free-electrons.com> 写到:
> > > >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
> > > >> Allwinner A64 SoC features a NMI controller, which is usually
> > > >connected
> > > >> to the AXP PMIC.
> > > >>
> > > >> Add support for it.
> > > >>
> > > >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> > > >> Acked-by: Chen-Yu Tsai <wens@csie.org>
> > > >> ---
> > > >> Changes in v2:
> > > >> - Added Chen-Yu's ACK.
> > > >>
> > > >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
> > > >>  1 file changed, 8 insertions(+)
> > > >>
> > > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > >> index 05ec9fc5e81f..53c18ca372ea 100644
> > > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> > > >> @@ -403,6 +403,14 @@
> > > >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> > > >>  		};
> > > >>
> > > >> +		nmi_intc: interrupt-controller@01f00c0c {
> > > >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
> > > >> +			interrupt-controller;
> > > >> +			#interrupt-cells = <2>;
> > > >> +			reg = <0x01f00c0c 0x38>;
> > > >
> > > >The base address is not correct, and there's uncertainty on whether
> > > >this is this particular controller or not. Did you even test this?
> > > 
> > > Tested by axp20x-pek.
> > 
> > Still, the base address is wrong, which is yet another hint that this
> > is not the same interrupt controller, and just works by accident.
> 
> No, it's the same as other post-sun6i device trees.
> See other post-sun6i device trees: (or maybe they're all wrong, but
> as we have no document for it, we should temporarily keep them)
> 
> sun6i-a31.dtsi
> ```
> 		nmi_intc: interrupt-controller@01f00c0c {
> 			compatible = "allwinner,sun6i-a31-sc-nmi";
> 			interrupt-controller;
> 			#interrupt-cells = <2>;
> 			reg = <0x01f00c0c 0x38>;
> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> 		};
> ```
> 
> sun8i-a23-a33.dtsi
> ```
> 		nmi_intc: interrupt-controller@01f00c0c {
> 			compatible = "allwinner,sun6i-a31-sc-nmi";
> 			interrupt-controller;
> 			#interrupt-cells = <2>;
> 			reg = <0x01f00c0c 0x38>;
> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> 		};
> ```
> 
> But according to the BSP device tree, the base address should be
> 0x01f00c00. Should I send some patch to fix all of them? (but it will
> break device tree compatibility)

I'm really not a big fan of "if we see something that is broken, just
let it rot" to be honest.

We have no idea how this controller works exactly, just like we have
no idea if it is exactly the same controller or not.

The only thing we have today is the memory map, and it tells us that
it has more registers than what you express here.

Because of the DT backward compatibility, you have to think of it the
other way around: what will happen if it turns out we need to setup
any register outside of that region you described in the DT, in
something like a year or so?

We can't, really. While if you have the full memory region from the
beginning, then you just have to add a single writel in your driver.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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#1629400 — Re: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64

Fromicenowy@aosc.io
Date2017-04-24 12:30 +0200
SubjectRe: [linux-sunxi] Re: [PATCH v3 02/12] arm64: allwinner: a64: add NMI controller on A64
Message-ID<tzJpM-5Mp-11@gated-at.bofh.it>
In reply to#1629256
在 2017-04-24 15:17，Maxime Ripard 写道：
> On Thu, Apr 20, 2017 at 03:03:38PM +0800, icenowy@aosc.io wrote:
>> 在 2017-04-20 13:58，Maxime Ripard 写道：
>> > On Tue, Apr 18, 2017 at 06:56:43PM +0800, Icenowy Zheng wrote:
>> > >
>> > >
>> > > 于 2017年4月18日 GMT+08:00 下午3:00:16, Maxime Ripard
>> > > <maxime.ripard@free-electrons.com> 写到:
>> > > >On Mon, Apr 17, 2017 at 07:57:37PM +0800, Icenowy Zheng wrote:
>> > > >> Allwinner A64 SoC features a NMI controller, which is usually
>> > > >connected
>> > > >> to the AXP PMIC.
>> > > >>
>> > > >> Add support for it.
>> > > >>
>> > > >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> > > >> Acked-by: Chen-Yu Tsai <wens@csie.org>
>> > > >> ---
>> > > >> Changes in v2:
>> > > >> - Added Chen-Yu's ACK.
>> > > >>
>> > > >>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
>> > > >>  1 file changed, 8 insertions(+)
>> > > >>
>> > > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> index 05ec9fc5e81f..53c18ca372ea 100644
>> > > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> > > >> @@ -403,6 +403,14 @@
>> > > >>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>> > > >>  		};
>> > > >>
>> > > >> +		nmi_intc: interrupt-controller@01f00c0c {
>> > > >> +			compatible = "allwinner,sun6i-a31-sc-nmi";
>> > > >> +			interrupt-controller;
>> > > >> +			#interrupt-cells = <2>;
>> > > >> +			reg = <0x01f00c0c 0x38>;
>> > > >
>> > > >The base address is not correct, and there's uncertainty on whether
>> > > >this is this particular controller or not. Did you even test this?
>> > >
>> > > Tested by axp20x-pek.
>> >
>> > Still, the base address is wrong, which is yet another hint that this
>> > is not the same interrupt controller, and just works by accident.
>> 
>> No, it's the same as other post-sun6i device trees.
>> See other post-sun6i device trees: (or maybe they're all wrong, but
>> as we have no document for it, we should temporarily keep them)
>> 
>> sun6i-a31.dtsi
>> ```
>> 		nmi_intc: interrupt-controller@01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> sun8i-a23-a33.dtsi
>> ```
>> 		nmi_intc: interrupt-controller@01f00c0c {
>> 			compatible = "allwinner,sun6i-a31-sc-nmi";
>> 			interrupt-controller;
>> 			#interrupt-cells = <2>;
>> 			reg = <0x01f00c0c 0x38>;
>> 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
>> 		};
>> ```
>> 
>> But according to the BSP device tree, the base address should be
>> 0x01f00c00. Should I send some patch to fix all of them? (but it will
>> break device tree compatibility)
> 
> I'm really not a big fan of "if we see something that is broken, just
> let it rot" to be honest.
> 
> We have no idea how this controller works exactly, just like we have
> no idea if it is exactly the same controller or not.
> 
> The only thing we have today is the memory map, and it tells us that
> it has more registers than what you express here.
> 
> Because of the DT backward compatibility, you have to think of it the
> other way around: what will happen if it turns out we need to setup
> any register outside of that region you described in the DT, in
> something like a year or so?
> 
> We can't, really. While if you have the full memory region from the
> beginning, then you just have to add a single writel in your driver.

So things are now already broken, and we may need to fix also A31 and
A23/33.

How should we do this?

> 
> Maxime
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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#1624655 — [PATCH v3 07/12] dt-bindings: add AXP803's regulator info

FromIcenowy Zheng <icenowy@aosc.io>
Date2017-04-17 14:10 +0200
Subject[PATCH v3 07/12] dt-bindings: add AXP803's regulator info
Message-ID<txdDI-uj-25@gated-at.bofh.it>
In reply to#1624646
AXP803 have the most regulators in currently supported AXP PMICs.

Add info for the regulators in the dt-bindings document.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes in v3:
- Added Rob's ACK.
Changes in v2:
- Place AXP803 regulators before AXP806/809 ones.

 Documentation/devicetree/bindings/mfd/axp20x.txt | 27 ++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 44df88be3c89..aca09af66514 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -96,6 +96,33 @@ LDO_IO1		: LDO		: ips-supply		: GPIO 1
 RTC_LDO		: LDO		: ips-supply		: always on
 DRIVEVBUS	: Enable output	: drivevbus-supply	: external regulator
 
+AXP803 regulators, type, and corresponding input supply names:
+
+Regulator	  Type		  Supply Name		  Notes
+---------	  ----		  -----------		  -----
+DCDC1		: DC-DC buck	: vin1-supply
+DCDC2		: DC-DC buck	: vin2-supply		: poly-phase capable
+DCDC3		: DC-DC	buck	: vin3-supply		: poly-phase capable
+DCDC4		: DC-DC	buck	: vin4-supply
+DCDC5		: DC-DC	buck	: vin5-supply		: poly-phase capable
+DCDC6		: DC-DC	buck	: vin6-supply		: poly-phase capable
+DC1SW		: On/Off Switch	:			: DCDC1 secondary output
+ALDO1		: LDO		: aldoin-supply		: shared supply
+ALDO2		: LDO		: aldoin-supply		: shared supply
+ALDO3		: LDO		: aldoin-supply		: shared supply
+DLDO1		: LDO		: dldoin-supply		: shared supply
+DLDO2		: LDO		: dldoin-supply		: shared supply
+DLDO3		: LDO		: dldoin-supply		: shared supply
+DLDO4		: LDO		: dldoin-supply		: shared supply
+ELDO1		: LDO		: eldoin-supply		: shared supply
+ELDO2		: LDO		: eldoin-supply		: shared supply
+ELDO3		: LDO		: eldoin-supply		: shared supply
+FLDO1		: LDO		: fldoin-supply		: shared supply
+FLDO2		: LDO		: fldoin-supply		: shared supply
+LDO_IO0		: LDO		: ips-supply		: GPIO 0
+LDO_IO1		: LDO		: ips-supply		: GPIO 1
+RTC_LDO		: LDO		: ips-supply		: always on
+
 AXP806 regulators, type, and corresponding input supply names:
 
 Regulator	  Type		  Supply Name		  Notes
-- 
2.12.2

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#1625227 — Re: [linux-sunxi] [PATCH v3 07/12] dt-bindings: add AXP803's regulator info

FromChen-Yu Tsai <wens@csie.org>
Date2017-04-18 12:40 +0200
SubjectRe: [linux-sunxi] [PATCH v3 07/12] dt-bindings: add AXP803's regulator info
Message-ID<txyIa-54q-11@gated-at.bofh.it>
In reply to#1624655
On Mon, Apr 17, 2017 at 7:57 PM, Icenowy Zheng <icenowy@aosc.io> wrote:
> AXP803 have the most regulators in currently supported AXP PMICs.
>
> Add info for the regulators in the dt-bindings document.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> Acked-by: Rob Herring <robh@kernel.org>

Acked-by: Chen-Yu Tsai <wens@csie.org>

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#1629468 — Re: [PATCH v3 07/12] dt-bindings: add AXP803's regulator info

FromLee Jones <lee.jones@linaro.org>
Date2017-04-24 14:10 +0200
SubjectRe: [PATCH v3 07/12] dt-bindings: add AXP803's regulator info
Message-ID<tzKYy-6Qa-25@gated-at.bofh.it>
In reply to#1624655
On Mon, 17 Apr 2017, Icenowy Zheng wrote:

> AXP803 have the most regulators in currently supported AXP PMICs.
> 
> Add info for the regulators in the dt-bindings document.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> Changes in v3:
> - Added Rob's ACK.
> Changes in v2:
> - Place AXP803 regulators before AXP806/809 ones.
> 
>  Documentation/devicetree/bindings/mfd/axp20x.txt | 27 ++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)

Applied, thanks.

> diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
> index 44df88be3c89..aca09af66514 100644
> --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
> +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
> @@ -96,6 +96,33 @@ LDO_IO1		: LDO		: ips-supply		: GPIO 1
>  RTC_LDO		: LDO		: ips-supply		: always on
>  DRIVEVBUS	: Enable output	: drivevbus-supply	: external regulator
>  
> +AXP803 regulators, type, and corresponding input supply names:
> +
> +Regulator	  Type		  Supply Name		  Notes
> +---------	  ----		  -----------		  -----
> +DCDC1		: DC-DC buck	: vin1-supply
> +DCDC2		: DC-DC buck	: vin2-supply		: poly-phase capable
> +DCDC3		: DC-DC	buck	: vin3-supply		: poly-phase capable
> +DCDC4		: DC-DC	buck	: vin4-supply
> +DCDC5		: DC-DC	buck	: vin5-supply		: poly-phase capable
> +DCDC6		: DC-DC	buck	: vin6-supply		: poly-phase capable
> +DC1SW		: On/Off Switch	:			: DCDC1 secondary output
> +ALDO1		: LDO		: aldoin-supply		: shared supply
> +ALDO2		: LDO		: aldoin-supply		: shared supply
> +ALDO3		: LDO		: aldoin-supply		: shared supply
> +DLDO1		: LDO		: dldoin-supply		: shared supply
> +DLDO2		: LDO		: dldoin-supply		: shared supply
> +DLDO3		: LDO		: dldoin-supply		: shared supply
> +DLDO4		: LDO		: dldoin-supply		: shared supply
> +ELDO1		: LDO		: eldoin-supply		: shared supply
> +ELDO2		: LDO		: eldoin-supply		: shared supply
> +ELDO3		: LDO		: eldoin-supply		: shared supply
> +FLDO1		: LDO		: fldoin-supply		: shared supply
> +FLDO2		: LDO		: fldoin-supply		: shared supply
> +LDO_IO0		: LDO		: ips-supply		: GPIO 0
> +LDO_IO1		: LDO		: ips-supply		: GPIO 1
> +RTC_LDO		: LDO		: ips-supply		: always on
> +
>  AXP806 regulators, type, and corresponding input supply names:
>  
>  Regulator	  Type		  Supply Name		  Notes

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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#1624656 — [PATCH v3 05/12] mfd: axp20x: support AXP803 variant

FromIcenowy Zheng <icenowy@aosc.io>
Date2017-04-17 14:10 +0200
Subject[PATCH v3 05/12] mfd: axp20x: support AXP803 variant
Message-ID<txdDI-uj-27@gated-at.bofh.it>
In reply to#1624646
AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64
via RSB bus. The PMIC itself is like AXP288, but with RSB support and
dedicated VBUS and ACIN.

Add support for it in the axp20x mfd driver.

Currently only power key function is supported.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
This patch is said to be applied by Lee Jones, however, I didn't see it
in the linux-next, so I included it in the patchset now.

Changes in v2:
- Share regmap configs with AXP288.
- Place AXP803 bits before AXP806/809.

 drivers/mfd/axp20x-rsb.c   |  1 +
 drivers/mfd/axp20x.c       | 79 ++++++++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/axp20x.h | 40 ++++++++++++++++++++++-
 3 files changed, 119 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c
index a732cb50bcff..fd5c7267b136 100644
--- a/drivers/mfd/axp20x-rsb.c
+++ b/drivers/mfd/axp20x-rsb.c
@@ -61,6 +61,7 @@ static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev)
 
 static const struct of_device_id axp20x_rsb_of_match[] = {
 	{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
+	{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
 	{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
 	{ .compatible = "x-powers,axp809", .data = (void *)AXP809_ID },
 	{ },
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index e6f55079876e..1dc6235778eb 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -41,6 +41,7 @@ static const char * const axp20x_model_names[] = {
 	"AXP221",
 	"AXP223",
 	"AXP288",
+	"AXP803",
 	"AXP806",
 	"AXP809",
 };
@@ -117,6 +118,7 @@ static const struct regmap_access_table axp22x_volatile_table = {
 	.n_yes_ranges	= ARRAY_SIZE(axp22x_volatile_ranges),
 };
 
+/* AXP288 ranges are shared with the AXP803, as they cover the same range */
 static const struct regmap_range axp288_writeable_ranges[] = {
 	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
 	regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
@@ -264,6 +266,20 @@ static struct resource axp288_fuel_gauge_resources[] = {
 	},
 };
 
+static struct resource axp803_pek_resources[] = {
+	{
+		.name   = "PEK_DBR",
+		.start  = AXP803_IRQ_PEK_RIS_EDGE,
+		.end    = AXP803_IRQ_PEK_RIS_EDGE,
+		.flags  = IORESOURCE_IRQ,
+	}, {
+		.name   = "PEK_DBF",
+		.start  = AXP803_IRQ_PEK_FAL_EDGE,
+		.end    = AXP803_IRQ_PEK_FAL_EDGE,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
 static struct resource axp809_pek_resources[] = {
 	{
 		.name   = "PEK_DBR",
@@ -457,6 +473,43 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
 	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
 };
 
+static const struct regmap_irq axp803_regmap_irqs[] = {
+	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
+	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
+	INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,	        0, 5),
+	INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,		0, 4),
+	INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,		0, 3),
+	INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,	        0, 2),
+	INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,		1, 7),
+	INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,	        1, 6),
+	INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,	1, 5),
+	INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,	1, 4),
+	INIT_REGMAP_IRQ(AXP803, CHARG,		        1, 3),
+	INIT_REGMAP_IRQ(AXP803, CHARG_DONE,		1, 2),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,	2, 7),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END,	2, 6),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,	2, 5),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,	2, 4),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,	2, 3),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END,	2, 2),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,	2, 1),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,	2, 0),
+	INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,	        3, 7),
+	INIT_REGMAP_IRQ(AXP803, GPADC,		        3, 2),
+	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,	        3, 1),
+	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,	        3, 0),
+	INIT_REGMAP_IRQ(AXP803, TIMER,		        4, 7),
+	INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,	        4, 6),
+	INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,	        4, 5),
+	INIT_REGMAP_IRQ(AXP803, PEK_SHORT,		4, 4),
+	INIT_REGMAP_IRQ(AXP803, PEK_LONG,		4, 3),
+	INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,		4, 2),
+	INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,		4, 1),
+	INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,		4, 0),
+	INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
+	INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
+};
+
 static const struct regmap_irq axp806_regmap_irqs[] = {
 	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1,	0, 0),
 	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2,	0, 1),
@@ -557,6 +610,18 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
 
 };
 
+static const struct regmap_irq_chip axp803_regmap_irq_chip = {
+	.name			= "axp803",
+	.status_base		= AXP20X_IRQ1_STATE,
+	.ack_base		= AXP20X_IRQ1_STATE,
+	.mask_base		= AXP20X_IRQ1_EN,
+	.mask_invert		= true,
+	.init_ack_masked	= true,
+	.irqs			= axp803_regmap_irqs,
+	.num_irqs		= ARRAY_SIZE(axp803_regmap_irqs),
+	.num_regs		= 6,
+};
+
 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
 	.name			= "axp806",
 	.status_base		= AXP20X_IRQ1_STATE,
@@ -778,6 +843,14 @@ static struct mfd_cell axp288_cells[] = {
 	},
 };
 
+static struct mfd_cell axp803_cells[] = {
+	{
+		.name			= "axp20x-pek",
+		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
+		.resources		= axp803_pek_resources,
+	}
+};
+
 static struct mfd_cell axp806_cells[] = {
 	{
 		.id			= 2,
@@ -864,6 +937,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
 		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
 		axp20x->irq_flags = IRQF_TRIGGER_LOW;
 		break;
+	case AXP803_ID:
+		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
+		axp20x->cells = axp803_cells;
+		axp20x->regmap_cfg = &axp288_regmap_config;
+		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
+		break;
 	case AXP806_ID:
 		axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
 		axp20x->cells = axp806_cells;
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index dc8798cf2a24..cde56cfe8446 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -20,6 +20,7 @@ enum axp20x_variants {
 	AXP221_ID,
 	AXP223_ID,
 	AXP288_ID,
+	AXP803_ID,
 	AXP806_ID,
 	AXP809_ID,
 	NR_AXP20X_VARIANTS,
@@ -234,7 +235,7 @@ enum axp20x_variants {
 #define AXP22X_TS_ADC_L			0x59
 #define AXP22X_BATLOW_THRES1		0xe6
 
-/* AXP288 specific registers */
+/* AXP288/AXP803 specific registers */
 #define AXP288_POWER_REASON		0x02
 #define AXP288_BC_GLOBAL		0x2c
 #define AXP288_BC_VBUS_CNTL		0x2d
@@ -475,6 +476,43 @@ enum axp288_irqs {
 	AXP288_IRQ_BC_USB_CHNG,
 };
 
+enum axp803_irqs {
+	AXP803_IRQ_ACIN_OVER_V = 1,
+	AXP803_IRQ_ACIN_PLUGIN,
+	AXP803_IRQ_ACIN_REMOVAL,
+	AXP803_IRQ_VBUS_OVER_V,
+	AXP803_IRQ_VBUS_PLUGIN,
+	AXP803_IRQ_VBUS_REMOVAL,
+	AXP803_IRQ_BATT_PLUGIN,
+	AXP803_IRQ_BATT_REMOVAL,
+	AXP803_IRQ_BATT_ENT_ACT_MODE,
+	AXP803_IRQ_BATT_EXIT_ACT_MODE,
+	AXP803_IRQ_CHARG,
+	AXP803_IRQ_CHARG_DONE,
+	AXP803_IRQ_BATT_CHG_TEMP_HIGH,
+	AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
+	AXP803_IRQ_BATT_CHG_TEMP_LOW,
+	AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
+	AXP803_IRQ_BATT_ACT_TEMP_HIGH,
+	AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
+	AXP803_IRQ_BATT_ACT_TEMP_LOW,
+	AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
+	AXP803_IRQ_DIE_TEMP_HIGH,
+	AXP803_IRQ_GPADC,
+	AXP803_IRQ_LOW_PWR_LVL1,
+	AXP803_IRQ_LOW_PWR_LVL2,
+	AXP803_IRQ_TIMER,
+	AXP803_IRQ_PEK_RIS_EDGE,
+	AXP803_IRQ_PEK_FAL_EDGE,
+	AXP803_IRQ_PEK_SHORT,
+	AXP803_IRQ_PEK_LONG,
+	AXP803_IRQ_PEK_OVER_OFF,
+	AXP803_IRQ_GPIO1_INPUT,
+	AXP803_IRQ_GPIO0_INPUT,
+	AXP803_IRQ_BC_USB_CHNG,
+	AXP803_IRQ_MV_CHNG,
+};
+
 enum axp806_irqs {
 	AXP806_IRQ_DIE_TEMP_HIGH_LV1,
 	AXP806_IRQ_DIE_TEMP_HIGH_LV2,
-- 
2.12.2

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#1629464 — Re: [PATCH v3 05/12] mfd: axp20x: support AXP803 variant

FromLee Jones <lee.jones@linaro.org>
Date2017-04-24 14:10 +0200
SubjectRe: [PATCH v3 05/12] mfd: axp20x: support AXP803 variant
Message-ID<tzKYy-6Qa-17@gated-at.bofh.it>
In reply to#1624656
On Mon, 17 Apr 2017, Icenowy Zheng wrote:

> AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64
> via RSB bus. The PMIC itself is like AXP288, but with RSB support and
> dedicated VBUS and ACIN.
> 
> Add support for it in the axp20x mfd driver.
> 
> Currently only power key function is supported.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
> This patch is said to be applied by Lee Jones, however, I didn't see it
> in the linux-next, so I included it in the patchset now.
> 
> Changes in v2:
> - Share regmap configs with AXP288.
> - Place AXP803 bits before AXP806/809.
> 
>  drivers/mfd/axp20x-rsb.c   |  1 +
>  drivers/mfd/axp20x.c       | 79 ++++++++++++++++++++++++++++++++++++++++++++++
>  include/linux/mfd/axp20x.h | 40 ++++++++++++++++++++++-
>  3 files changed, 119 insertions(+), 1 deletion(-)

Applied, thanks.

> diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c
> index a732cb50bcff..fd5c7267b136 100644
> --- a/drivers/mfd/axp20x-rsb.c
> +++ b/drivers/mfd/axp20x-rsb.c
> @@ -61,6 +61,7 @@ static int axp20x_rsb_remove(struct sunxi_rsb_device *rdev)
>  
>  static const struct of_device_id axp20x_rsb_of_match[] = {
>  	{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
> +	{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
>  	{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
>  	{ .compatible = "x-powers,axp809", .data = (void *)AXP809_ID },
>  	{ },
> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
> index e6f55079876e..1dc6235778eb 100644
> --- a/drivers/mfd/axp20x.c
> +++ b/drivers/mfd/axp20x.c
> @@ -41,6 +41,7 @@ static const char * const axp20x_model_names[] = {
>  	"AXP221",
>  	"AXP223",
>  	"AXP288",
> +	"AXP803",
>  	"AXP806",
>  	"AXP809",
>  };
> @@ -117,6 +118,7 @@ static const struct regmap_access_table axp22x_volatile_table = {
>  	.n_yes_ranges	= ARRAY_SIZE(axp22x_volatile_ranges),
>  };
>  
> +/* AXP288 ranges are shared with the AXP803, as they cover the same range */
>  static const struct regmap_range axp288_writeable_ranges[] = {
>  	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
>  	regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
> @@ -264,6 +266,20 @@ static struct resource axp288_fuel_gauge_resources[] = {
>  	},
>  };
>  
> +static struct resource axp803_pek_resources[] = {
> +	{
> +		.name   = "PEK_DBR",
> +		.start  = AXP803_IRQ_PEK_RIS_EDGE,
> +		.end    = AXP803_IRQ_PEK_RIS_EDGE,
> +		.flags  = IORESOURCE_IRQ,
> +	}, {
> +		.name   = "PEK_DBF",
> +		.start  = AXP803_IRQ_PEK_FAL_EDGE,
> +		.end    = AXP803_IRQ_PEK_FAL_EDGE,
> +		.flags  = IORESOURCE_IRQ,
> +	},
> +};
> +
>  static struct resource axp809_pek_resources[] = {
>  	{
>  		.name   = "PEK_DBR",
> @@ -457,6 +473,43 @@ static const struct regmap_irq axp288_regmap_irqs[] = {
>  	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
>  };
>  
> +static const struct regmap_irq axp803_regmap_irqs[] = {
> +	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
> +	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
> +	INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,	        0, 5),
> +	INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,		0, 4),
> +	INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,		0, 3),
> +	INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,	        0, 2),
> +	INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,		1, 7),
> +	INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,	        1, 6),
> +	INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,	1, 5),
> +	INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,	1, 4),
> +	INIT_REGMAP_IRQ(AXP803, CHARG,		        1, 3),
> +	INIT_REGMAP_IRQ(AXP803, CHARG_DONE,		1, 2),
> +	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,	2, 7),
> +	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END,	2, 6),
> +	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,	2, 5),
> +	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,	2, 4),
> +	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,	2, 3),
> +	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END,	2, 2),
> +	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,	2, 1),
> +	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,	2, 0),
> +	INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,	        3, 7),
> +	INIT_REGMAP_IRQ(AXP803, GPADC,		        3, 2),
> +	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,	        3, 1),
> +	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,	        3, 0),
> +	INIT_REGMAP_IRQ(AXP803, TIMER,		        4, 7),
> +	INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,	        4, 6),
> +	INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,	        4, 5),
> +	INIT_REGMAP_IRQ(AXP803, PEK_SHORT,		4, 4),
> +	INIT_REGMAP_IRQ(AXP803, PEK_LONG,		4, 3),
> +	INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,		4, 2),
> +	INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,		4, 1),
> +	INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,		4, 0),
> +	INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
> +	INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
> +};
> +
>  static const struct regmap_irq axp806_regmap_irqs[] = {
>  	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1,	0, 0),
>  	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2,	0, 1),
> @@ -557,6 +610,18 @@ static const struct regmap_irq_chip axp288_regmap_irq_chip = {
>  
>  };
>  
> +static const struct regmap_irq_chip axp803_regmap_irq_chip = {
> +	.name			= "axp803",
> +	.status_base		= AXP20X_IRQ1_STATE,
> +	.ack_base		= AXP20X_IRQ1_STATE,
> +	.mask_base		= AXP20X_IRQ1_EN,
> +	.mask_invert		= true,
> +	.init_ack_masked	= true,
> +	.irqs			= axp803_regmap_irqs,
> +	.num_irqs		= ARRAY_SIZE(axp803_regmap_irqs),
> +	.num_regs		= 6,
> +};
> +
>  static const struct regmap_irq_chip axp806_regmap_irq_chip = {
>  	.name			= "axp806",
>  	.status_base		= AXP20X_IRQ1_STATE,
> @@ -778,6 +843,14 @@ static struct mfd_cell axp288_cells[] = {
>  	},
>  };
>  
> +static struct mfd_cell axp803_cells[] = {
> +	{
> +		.name			= "axp20x-pek",
> +		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
> +		.resources		= axp803_pek_resources,
> +	}
> +};
> +
>  static struct mfd_cell axp806_cells[] = {
>  	{
>  		.id			= 2,
> @@ -864,6 +937,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
>  		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
>  		axp20x->irq_flags = IRQF_TRIGGER_LOW;
>  		break;
> +	case AXP803_ID:
> +		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
> +		axp20x->cells = axp803_cells;
> +		axp20x->regmap_cfg = &axp288_regmap_config;
> +		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
> +		break;
>  	case AXP806_ID:
>  		axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
>  		axp20x->cells = axp806_cells;
> diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
> index dc8798cf2a24..cde56cfe8446 100644
> --- a/include/linux/mfd/axp20x.h
> +++ b/include/linux/mfd/axp20x.h
> @@ -20,6 +20,7 @@ enum axp20x_variants {
>  	AXP221_ID,
>  	AXP223_ID,
>  	AXP288_ID,
> +	AXP803_ID,
>  	AXP806_ID,
>  	AXP809_ID,
>  	NR_AXP20X_VARIANTS,
> @@ -234,7 +235,7 @@ enum axp20x_variants {
>  #define AXP22X_TS_ADC_L			0x59
>  #define AXP22X_BATLOW_THRES1		0xe6
>  
> -/* AXP288 specific registers */
> +/* AXP288/AXP803 specific registers */
>  #define AXP288_POWER_REASON		0x02
>  #define AXP288_BC_GLOBAL		0x2c
>  #define AXP288_BC_VBUS_CNTL		0x2d
> @@ -475,6 +476,43 @@ enum axp288_irqs {
>  	AXP288_IRQ_BC_USB_CHNG,
>  };
>  
> +enum axp803_irqs {
> +	AXP803_IRQ_ACIN_OVER_V = 1,
> +	AXP803_IRQ_ACIN_PLUGIN,
> +	AXP803_IRQ_ACIN_REMOVAL,
> +	AXP803_IRQ_VBUS_OVER_V,
> +	AXP803_IRQ_VBUS_PLUGIN,
> +	AXP803_IRQ_VBUS_REMOVAL,
> +	AXP803_IRQ_BATT_PLUGIN,
> +	AXP803_IRQ_BATT_REMOVAL,
> +	AXP803_IRQ_BATT_ENT_ACT_MODE,
> +	AXP803_IRQ_BATT_EXIT_ACT_MODE,
> +	AXP803_IRQ_CHARG,
> +	AXP803_IRQ_CHARG_DONE,
> +	AXP803_IRQ_BATT_CHG_TEMP_HIGH,
> +	AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
> +	AXP803_IRQ_BATT_CHG_TEMP_LOW,
> +	AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
> +	AXP803_IRQ_BATT_ACT_TEMP_HIGH,
> +	AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
> +	AXP803_IRQ_BATT_ACT_TEMP_LOW,
> +	AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
> +	AXP803_IRQ_DIE_TEMP_HIGH,
> +	AXP803_IRQ_GPADC,
> +	AXP803_IRQ_LOW_PWR_LVL1,
> +	AXP803_IRQ_LOW_PWR_LVL2,
> +	AXP803_IRQ_TIMER,
> +	AXP803_IRQ_PEK_RIS_EDGE,
> +	AXP803_IRQ_PEK_FAL_EDGE,
> +	AXP803_IRQ_PEK_SHORT,
> +	AXP803_IRQ_PEK_LONG,
> +	AXP803_IRQ_PEK_OVER_OFF,
> +	AXP803_IRQ_GPIO1_INPUT,
> +	AXP803_IRQ_GPIO0_INPUT,
> +	AXP803_IRQ_BC_USB_CHNG,
> +	AXP803_IRQ_MV_CHNG,
> +};
> +
>  enum axp806_irqs {
>  	AXP806_IRQ_DIE_TEMP_HIGH_LV1,
>  	AXP806_IRQ_DIE_TEMP_HIGH_LV2,

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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#1624657 — [PATCH v3 06/12] arm64: allwinner: a64: add AXP803 node to Pine64 device tree

FromIcenowy Zheng <icenowy@aosc.io>
Date2017-04-17 14:10 +0200
Subject[PATCH v3 06/12] arm64: allwinner: a64: add AXP803 node to Pine64 device tree
Message-ID<txdDI-uj-29@gated-at.bofh.it>
In reply to#1624646
The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.

Add its device node.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index c680ed385da3..2132d8e6cb3d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -95,6 +95,17 @@
 	status = "okay";
 };
 
+&r_rsb {
+	status = "okay";
+
+	axp803: pmic@3a3 {
+		compatible = "x-powers,axp803";
+		reg = <0x3a3>;
+		interrupt-parent = <&nmi_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;
-- 
2.12.2

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