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Groups > linux.kernel > #1621685 > unrolled thread
| Started by | Fabio Estevam <festevam@gmail.com> |
|---|---|
| First post | 2017-04-12 01:30 +0200 |
| Last post | 2017-04-12 01:30 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances Fabio Estevam <festevam@gmail.com> - 2017-04-12 01:30 +0200
| From | Fabio Estevam <festevam@gmail.com> |
|---|---|
| Date | 2017-04-12 01:30 +0200 |
| Subject | Re: [PATCH 2/2] ARM: dts: imx7: add USDHC NAND clock to SDHC instances |
| Message-ID | <tvdot-5c0-1@gated-at.bofh.it> |
On Mon, Apr 10, 2017 at 11:59 PM, Dong Aisheng <dongas86@gmail.com> wrote: > This is caused by ahb_root_clk gets disabled accidently and system hangs. > > Because this patch defines ipg_root_clk earlier before its parent > (ahb_root_clk) got registered, then it will be marked as a orphan clk > temporarily. Until the parent ahb_root_clk got registered, the clk core > will reparent it to the newly found parent. (see __clk_core_init() function). > > Due to CLK_SET_RATE_PARENT flag, the ahb clk will be enabled during > set_parent operation and then disabled after that. > Then system hang cause we still get no chance to run init_on clks. > > I just send out a proper fix patch with correct register sequence. Excellent, thanks!
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