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| Started by | Yunying Sun <yunying.sun@intel.com> |
|---|---|
| First post | 2017-04-13 10:20 +0200 |
| Last post | 2017-04-13 15:50 +0200 |
| Articles | 2 — 2 participants |
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[PATCH] perf/x86/intel: Add hardware cache event support for Intel Gemini Lake Yunying Sun <yunying.sun@intel.com> - 2017-04-13 10:20 +0200
Re: [PATCH] perf/x86/intel: Add hardware cache event support for Intel Gemini Lake Andi Kleen <ak@linux.intel.com> - 2017-04-13 15:50 +0200
| From | Yunying Sun <yunying.sun@intel.com> |
|---|---|
| Date | 2017-04-13 10:20 +0200 |
| Subject | [PATCH] perf/x86/intel: Add hardware cache event support for Intel Gemini Lake |
| Message-ID | <tvI8W-cb-7@gated-at.bofh.it> |
Gemini Lake is a Goldmont core based Apollo Lake successor with better CPU performance. Currently there is no hardware cache events available if checking with "perf list cache" on Gemini Lake. Perf hardware cache event test always fail because of this. This patch adds INTEL_FAM6_ATOM_GEMINI_LAKE case to use same Goldmont hardware cache events table for Gemini Lake. With this patch, below hardware cache events are available on Gemini Lake, and perf hardware cache event test can pass. L1-dcache-loads L1-dcache-stores L1-icache-load-misses L1-icache-loads LLC-load-misses LLC-loads LLC-prefetch-misses LLC-prefetches LLC-store-misses LLC-stores branch-load-misses branch-loads dTLB-loads dTLB-stores iTLB-load-misses iTLB-loads Signed-off-by: Yunying Sun <yunying.sun@intel.com> Tested-by: Yunying Sun <yunying.sun@intel.com> --- arch/x86/events/intel/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index eb1484c..f80c3a3 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3731,6 +3731,7 @@ __init int intel_pmu_init(void) case INTEL_FAM6_ATOM_GOLDMONT: case INTEL_FAM6_ATOM_DENVERTON: + case INTEL_FAM6_ATOM_GEMINI_LAKE: memcpy(hw_cache_event_ids, glm_hw_cache_event_ids, sizeof(hw_cache_event_ids)); memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs, -- 2.9.3
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| From | Andi Kleen <ak@linux.intel.com> |
|---|---|
| Date | 2017-04-13 15:50 +0200 |
| Subject | Re: [PATCH] perf/x86/intel: Add hardware cache event support for Intel Gemini Lake |
| Message-ID | <tvNij-3GT-35@gated-at.bofh.it> |
| In reply to | #1622806 |
On Thu, Apr 13, 2017 at 04:19:13PM +0800, Yunying Sun wrote: > Gemini Lake is a Goldmont core based Apollo Lake successor with better > CPU performance. Currently there is no hardware cache events available > if checking with "perf list cache" on Gemini Lake. Perf hardware cache > event test always fail because of this. > > This patch adds INTEL_FAM6_ATOM_GEMINI_LAKE case to use same Goldmont > hardware cache events table for Gemini Lake. With this patch, below > hardware cache events are available on Gemini Lake, and perf hardware > cache event test can pass. Gemini Lake needs more changes. Kan has been working on a more complete patch kit. -Andi
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