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Groups > linux.kernel > #1618650 > unrolled thread
| Started by | Laxman Dewangan <ldewangan@nvidia.com> |
|---|---|
| First post | 2017-04-07 12:00 +0200 |
| Last post | 2017-04-07 12:00 +0200 |
| Articles | 1 — 1 participant |
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[PATCH V3 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups Laxman Dewangan <ldewangan@nvidia.com> - 2017-04-07 12:00 +0200
| From | Laxman Dewangan <ldewangan@nvidia.com> |
|---|---|
| Date | 2017-04-07 12:00 +0200 |
| Subject | [PATCH V3 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups |
| Message-ID | <ttyQq-5pF-9@gated-at.bofh.it> |
This patch series have following fixes:
- Add more precession in PWM period register value calculation
for lower pwm frequency.
- Add support to configure PWM pins in different state in the
suspend/resume.
Changes from v1:
- Use standard pinctrl names for sleep and active state.
- Use API pinctrl_pm_select_*()
Changes from V2:
- Type fixes, rephrases commit message and use pinctrl_pm_state* return
value.
Laxman Dewangan (4):
pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local
implementation
pwm: tegra: Increase precision in pwm rate calculation
pwm: tegra: Add DT binding details to configure pin in suspends/resume
pwm: tegra: Add support to configure pin state in suspends/resume
.../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 43 ++++++++++++
drivers/pwm/pwm-tegra.c | 77 ++++++++++++++++++++--
2 files changed, 116 insertions(+), 4 deletions(-)
--
2.1.4
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