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Groups > linux.kernel > #1618438 > unrolled thread
| Started by | "Wei.Xu" <xuwei5@hisilicon.com> |
|---|---|
| First post | 2017-04-07 03:40 +0200 |
| Last post | 2017-04-08 09:00 +0200 |
| Articles | 4 — 2 participants |
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[PATCH 0/5] arm64: dts: hisi: add NIC, RoCE and SAS support for hip07 "Wei.Xu" <xuwei5@hisilicon.com> - 2017-04-07 03:40 +0200
[PATCH 5/5] arm64: dts: hisi: enalbe the NIC and SAS for the hip07-d05 board "Wei.Xu" <xuwei5@hisilicon.com> - 2017-04-07 03:40 +0200
[PATCH 3/5] arm64: dts: hisi: add RoCE nodes for the hip07 SoC "Wei.Xu" <xuwei5@hisilicon.com> - 2017-04-07 03:40 +0200
Re: [PATCH 0/5] arm64: dts: hisi: add NIC, RoCE and SAS support for hip07 Wei Xu <xuwei5@hisilicon.com> - 2017-04-08 09:00 +0200
| From | "Wei.Xu" <xuwei5@hisilicon.com> |
|---|---|
| Date | 2017-04-07 03:40 +0200 |
| Subject | [PATCH 0/5] arm64: dts: hisi: add NIC, RoCE and SAS support for hip07 |
| Message-ID | <ttr2x-oT-3@gated-at.bofh.it> |
This patch series adds Mbigen, NIC, RoCE and SAS nodes for the hip07 SoC and enables the NIC, RoCE and SAS on the hip07 d05 board. Wei Xu (5): arm64: dts: hisi: add mbigen nodes for the hip07 SoC arm64: dts: hisi: add network related nodes for the hip07 SoC arm64: dts: hisi: add RoCE nodes for the hip07 SoC arm64: dts: hisi: add SAS nodes for the hip07 SoC arm64: dts: hisi: enalbe the NIC and SAS for the hip07-d05 board arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 24 ++ arch/arm64/boot/dts/hisilicon/hip07.dtsi | 479 ++++++++++++++++++++++++++++ 2 files changed, 503 insertions(+) -- 1.9.1
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| From | "Wei.Xu" <xuwei5@hisilicon.com> |
|---|---|
| Date | 2017-04-07 03:40 +0200 |
| Subject | [PATCH 5/5] arm64: dts: hisi: enalbe the NIC and SAS for the hip07-d05 board |
| Message-ID | <ttr2x-oT-9@gated-at.bofh.it> |
| In reply to | #1618438 |
From: Wei Xu <xuwei5@hisilicon.com>
Enalbe the NIC and SAS nodes for the hip07-d05 board
to support related functions.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
index e058442..5bdca80 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
@@ -64,3 +64,27 @@
&usb_ehci {
status = "ok";
};
+
+ð0 {
+ status = "ok";
+};
+
+ð1 {
+ status = "ok";
+};
+
+ð2 {
+ status = "ok";
+};
+
+ð3 {
+ status = "ok";
+};
+
+&p0_pcie2_a {
+ status = "ok";
+};
+
+&sas1 {
+ status = "ok";
+};
--
1.9.1
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| From | "Wei.Xu" <xuwei5@hisilicon.com> |
|---|---|
| Date | 2017-04-07 03:40 +0200 |
| Subject | [PATCH 3/5] arm64: dts: hisi: add RoCE nodes for the hip07 SoC |
| Message-ID | <ttr2y-oT-13@gated-at.bofh.it> |
| In reply to | #1618438 |
From: Wei Xu <xuwei5@hisilicon.com>
Add the infiniband node to support the RoCE function
on the hip07 SoC.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
---
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 81 ++++++++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 2feb362..bc54b61 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1324,5 +1324,86 @@
status = "disabled";
dma-coherent;
};
+
+ infiniband@c4000000 {
+ compatible = "hisilicon,hns-roce-v1";
+ reg = <0x0 0xc4000000 0x0 0x100000>;
+ dma-coherent;
+ eth-handle = <ð2 ð3 0 0 ð0 ð1>;
+ dsaf-handle = <&dsaf0>;
+ node-guid = [00 9A CD 00 00 01 02 03];
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mbigen_dsa_roce>;
+ interrupts = <722 1>,
+ <723 1>,
+ <724 1>,
+ <725 1>,
+ <726 1>,
+ <727 1>,
+ <728 1>,
+ <729 1>,
+ <730 1>,
+ <731 1>,
+ <732 1>,
+ <733 1>,
+ <734 1>,
+ <735 1>,
+ <736 1>,
+ <737 1>,
+ <738 1>,
+ <739 1>,
+ <740 1>,
+ <741 1>,
+ <742 1>,
+ <743 1>,
+ <744 1>,
+ <745 1>,
+ <746 1>,
+ <747 1>,
+ <748 1>,
+ <749 1>,
+ <750 1>,
+ <751 1>,
+ <752 1>,
+ <753 1>,
+ <785 1>,
+ <754 4>;
+
+ interrupt-names = "hns-roce-comp-0",
+ "hns-roce-comp-1",
+ "hns-roce-comp-2",
+ "hns-roce-comp-3",
+ "hns-roce-comp-4",
+ "hns-roce-comp-5",
+ "hns-roce-comp-6",
+ "hns-roce-comp-7",
+ "hns-roce-comp-8",
+ "hns-roce-comp-9",
+ "hns-roce-comp-10",
+ "hns-roce-comp-11",
+ "hns-roce-comp-12",
+ "hns-roce-comp-13",
+ "hns-roce-comp-14",
+ "hns-roce-comp-15",
+ "hns-roce-comp-16",
+ "hns-roce-comp-17",
+ "hns-roce-comp-18",
+ "hns-roce-comp-19",
+ "hns-roce-comp-20",
+ "hns-roce-comp-21",
+ "hns-roce-comp-22",
+ "hns-roce-comp-23",
+ "hns-roce-comp-24",
+ "hns-roce-comp-25",
+ "hns-roce-comp-26",
+ "hns-roce-comp-27",
+ "hns-roce-comp-28",
+ "hns-roce-comp-29",
+ "hns-roce-comp-30",
+ "hns-roce-comp-31",
+ "hns-roce-async",
+ "hns-roce-common";
+ };
};
};
--
1.9.1
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| From | Wei Xu <xuwei5@hisilicon.com> |
|---|---|
| Date | 2017-04-08 09:00 +0200 |
| Subject | Re: [PATCH 0/5] arm64: dts: hisi: add NIC, RoCE and SAS support for hip07 |
| Message-ID | <ttSvL-1Tp-5@gated-at.bofh.it> |
| In reply to | #1618438 |
Hi All, On 2017/4/7 10:07, Wei.Xu wrote: > This patch series adds Mbigen, NIC, RoCE and SAS nodes for the hip07 > SoC and enables the NIC, RoCE and SAS on the hip07 d05 board. > > Wei Xu (5): > arm64: dts: hisi: add mbigen nodes for the hip07 SoC > arm64: dts: hisi: add network related nodes for the hip07 SoC > arm64: dts: hisi: add RoCE nodes for the hip07 SoC > arm64: dts: hisi: add SAS nodes for the hip07 SoC > arm64: dts: hisi: enalbe the NIC and SAS for the hip07-d05 board > > arch/arm64/boot/dts/hisilicon/hip07-d05.dts | 24 ++ > arch/arm64/boot/dts/hisilicon/hip07.dtsi | 479 ++++++++++++++++++++++++++++ > 2 files changed, 503 insertions(+) > After removed the PCIe node in the patch 5, the series has been applied to the hisilicon arm64 dt tree since this series patches just to add the nodes and the binding has been reviewed before. Best Regards, Wei
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