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Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver

Started byCyrille Pitchen <cyrille.pitchen@wedev4u.fr>
First post2017-03-29 19:30 +0200
Last post2017-04-07 00:40 +0200
Articles 5 — 3 participants

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  Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> - 2017-03-29 19:30 +0200
    Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Ludovic BARRE <ludovic.barre@st.com> - 2017-03-30 09:40 +0200
      Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Marek Vasut <marek.vasut@gmail.com> - 2017-03-30 12:20 +0200
        Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Ludovic BARRE <ludovic.barre@st.com> - 2017-04-05 18:30 +0200
        Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> - 2017-04-07 00:40 +0200

#1612176 — Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver

FromCyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Date2017-03-29 19:30 +0200
SubjectRe: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver
Message-ID<tqpzY-1Bd-11@gated-at.bofh.it>
Hi Ludovic,

Le 27/03/2017 à 14:54, Ludovic Barre a écrit :
> From: Ludovic Barre <ludovic.barre@st.com>
> 
> This patch set adds a SPI-NOR driver for stm32 QSPI controller.
> It is a specialized SPI interface for serial Flash devices.
> It supports 1 or 2 Flash device with single, dual and quad SPI Flash memories.
> 
> It can operate in any of the following modes:
> -indirect mode: all the operations are performed using the quadspi
>  registers
> -read memory-mapped mode: the external Flash memory is mapped to the
>  microcontroller address space and is seen by the system as if it was
>  an internal memory
> 
> Ludovic Barre (2):
>   dt-bindings: Document the STM32 QSPI bindings
>   mtd: spi-nor: add driver for STM32 quad spi flash controller
> 
>  .../devicetree/bindings/mtd/stm32-quadspi.txt      |  45 ++
>  drivers/mtd/spi-nor/Kconfig                        |   7 +
>  drivers/mtd/spi-nor/Makefile                       |   1 +
>  drivers/mtd/spi-nor/stm32-quadspi.c                | 679 +++++++++++++++++++++
>  4 files changed, 732 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
>  create mode 100644 drivers/mtd/spi-nor/stm32-quadspi.c
> 

Just a small word to warn you that I'm likely to ask you to rebase this
series onto the patch "mtd: spi-nor: introduce more SPI protocols and
the Dual Transfer Mode". Indeed, I need to synchronize with Marek first
but I plan to merge this patch within few days.


Best regards,

Cyrille

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#1612673

FromLudovic BARRE <ludovic.barre@st.com>
Date2017-03-30 09:40 +0200
Message-ID<tqCQz-2Ql-33@gated-at.bofh.it>
In reply to#1612176
hi Cyrille

I see your patch series

[PATCH v5 0/6] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories

No problem, I rebase my V2 onto your patch


BR
Ludo

On 03/29/2017 06:51 PM, Cyrille Pitchen wrote:
> Hi Ludovic,
>
> Le 27/03/2017 à 14:54, Ludovic Barre a écrit :
>> From: Ludovic Barre <ludovic.barre@st.com>
>>
>> This patch set adds a SPI-NOR driver for stm32 QSPI controller.
>> It is a specialized SPI interface for serial Flash devices.
>> It supports 1 or 2 Flash device with single, dual and quad SPI Flash memories.
>>
>> It can operate in any of the following modes:
>> -indirect mode: all the operations are performed using the quadspi
>>   registers
>> -read memory-mapped mode: the external Flash memory is mapped to the
>>   microcontroller address space and is seen by the system as if it was
>>   an internal memory
>>
>> Ludovic Barre (2):
>>    dt-bindings: Document the STM32 QSPI bindings
>>    mtd: spi-nor: add driver for STM32 quad spi flash controller
>>
>>   .../devicetree/bindings/mtd/stm32-quadspi.txt      |  45 ++
>>   drivers/mtd/spi-nor/Kconfig                        |   7 +
>>   drivers/mtd/spi-nor/Makefile                       |   1 +
>>   drivers/mtd/spi-nor/stm32-quadspi.c                | 679 +++++++++++++++++++++
>>   4 files changed, 732 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
>>   create mode 100644 drivers/mtd/spi-nor/stm32-quadspi.c
>>
> Just a small word to warn you that I'm likely to ask you to rebase this
> series onto the patch "mtd: spi-nor: introduce more SPI protocols and
> the Dual Transfer Mode". Indeed, I need to synchronize with Marek first
> but I plan to merge this patch within few days.
>
>
> Best regards,
>
> Cyrille

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#1612877

FromMarek Vasut <marek.vasut@gmail.com>
Date2017-03-30 12:20 +0200
Message-ID<tqFlp-4ME-41@gated-at.bofh.it>
In reply to#1612673
On 03/30/2017 09:31 AM, Ludovic BARRE wrote:
> hi Cyrille
> 
> I see your patch series
> 
> [PATCH v5 0/6] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories
> 
> No problem, I rebase my V2 onto your patch

I still didn't review that, so it might take a bit until it hits
mainline. I think the stm32 stuff looks pretty OK, so we can take that
before the SFDP stuff, no?

-- 
Best regards,
Marek Vasut

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#1617120

FromLudovic BARRE <ludovic.barre@st.com>
Date2017-04-05 18:30 +0200
Message-ID<tsVYK-4Y7-25@gated-at.bofh.it>
In reply to#1612877
hi Cyrille, Marek

I've re-based and tested my patchset onto

"mtd: spi-nor: introduce more SPI protocols and the Dual Transfer Mode"

So I can deliver my patchset before or after Cyrille patchset

How do you wish process? what version do you want for the v3?


BR

Ludo

On 03/30/2017 12:15 PM, Marek Vasut wrote:
> On 03/30/2017 09:31 AM, Ludovic BARRE wrote:
>> hi Cyrille
>>
>> I see your patch series
>>
>> [PATCH v5 0/6] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories
>>
>> No problem, I rebase my V2 onto your patch
> I still didn't review that, so it might take a bit until it hits
> mainline. I think the stm32 stuff looks pretty OK, so we can take that
> before the SFDP stuff, no?
>

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#1618380

FromCyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Date2017-04-07 00:40 +0200
Message-ID<ttoel-6ZA-1@gated-at.bofh.it>
In reply to#1612877
Hi all,

Le 30/03/2017 à 12:15, Marek Vasut a écrit :
> On 03/30/2017 09:31 AM, Ludovic BARRE wrote:
>> hi Cyrille
>>
>> I see your patch series
>>
>> [PATCH v5 0/6] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories
>>
>> No problem, I rebase my V2 onto your patch
> 
> I still didn't review that, so it might take a bit until it hits
> mainline. I think the stm32 stuff looks pretty OK, so we can take that
> before the SFDP stuff, no?
> 

About the SFDP patches they are still RFC so yes, they can wait, no
problem with that. Anyway I was working on them this afternoon so they
are not finalized yet.

However the first 3 patches of the series, especially patch
"mtd: spi-nor: introduce more SPI protocols and the Dual Transfer Mode",
are needed as a base to fix other long time pending issues.

Those patches are available from both the github/spi-nor and linux-next
tree. So I think Ludovic can rebase his patches, test them then send v3
to the linux-mtd mailing list with the relevant ChangeLog in the cover
letter.

For your information:
2016-06-20 https://patchwork.ozlabs.org/patch/638138/
2016-10-04 https://patchwork.ozlabs.org/patch/678162/
2016-10-05 https://patchwork.ozlabs.org/patch/678404/
2016-10-24 https://patchwork.ozlabs.org/patch/685981/
2016-11-21 https://patchwork.ozlabs.org/patch/697268/
2017-01-25 https://patchwork.ozlabs.org/patch/719777/
2017-03-22 https://patchwork.ozlabs.org/patch/742376/


Sorry but I think the patch changing the 3rd argument of spi_nor_scan()
has precedence over newer patches in the queue to be mainlined.

Best regards,

Cyrille

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