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Groups > linux.kernel > #1616696 > unrolled thread

[PATCH] net: davinci_mdio: add GPIO reset logic

Started byRoger Quadros <rogerq@ti.com>
First post2017-04-05 10:40 +0200
Last post2017-04-10 10:00 +0200
Articles 9 — 4 participants

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Contents

  [PATCH] net: davinci_mdio: add GPIO reset logic Roger Quadros <rogerq@ti.com> - 2017-04-05 10:40 +0200
    Re: [PATCH] net: davinci_mdio: add GPIO reset logic Andrew Lunn <andrew@lunn.ch> - 2017-04-05 17:10 +0200
      Re: [PATCH] net: davinci_mdio: add GPIO reset logic Roger Quadros <rogerq@ti.com> - 2017-04-06 11:30 +0200
        Re: [PATCH] net: davinci_mdio: add GPIO reset logic Andrew Lunn <andrew@lunn.ch> - 2017-04-06 14:10 +0200
          Re: [PATCH] net: davinci_mdio: add GPIO reset logic Roger Quadros <rogerq@ti.com> - 2017-04-06 18:50 +0200
    Re: [PATCH] net: davinci_mdio: add GPIO reset logic David Miller <davem@davemloft.net> - 2017-04-08 16:00 +0200
      Re: [PATCH] net: davinci_mdio: add GPIO reset logic Andrew Lunn <andrew@lunn.ch> - 2017-04-08 17:20 +0200
        Re: [PATCH] net: davinci_mdio: add GPIO reset logic Florian Fainelli <f.fainelli@gmail.com> - 2017-04-08 17:20 +0200
          Re: [PATCH] net: davinci_mdio: add GPIO reset logic Roger Quadros <rogerq@ti.com> - 2017-04-10 10:00 +0200

#1616696 — [PATCH] net: davinci_mdio: add GPIO reset logic

FromRoger Quadros <rogerq@ti.com>
Date2017-04-05 10:40 +0200
Subject[PATCH] net: davinci_mdio: add GPIO reset logic
Message-ID<tsODU-f3-17@gated-at.bofh.it>
Some boards [1] leave the PHYs at an invalid state
during system power-up or reset thus causing unreliability
issues with the PHY like not being detected by the mdio bus
or link not functional. To work around these boards have
a GPIO connected to the PHY's reset pin.

Implement GPIO reset handling for such cases.

[1] - am572x-idk, am571x-idk, a437x-idk.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 .../devicetree/bindings/net/davinci-mdio.txt       |  2 +
 drivers/net/ethernet/ti/davinci_mdio.c             | 68 +++++++++++++++++++---
 2 files changed, 62 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/davinci-mdio.txt b/Documentation/devicetree/bindings/net/davinci-mdio.txt
index 621156c..fd6ebe7 100644
--- a/Documentation/devicetree/bindings/net/davinci-mdio.txt
+++ b/Documentation/devicetree/bindings/net/davinci-mdio.txt
@@ -12,6 +12,8 @@ Required properties:
 
 Optional properties:
 - ti,hwmods		: Must be "davinci_mdio"
+- reset-gpios		: array of GPIO specifier for PHY hardware reset control
+- reset-delay-us	: reset assertion time [in microseconds]
 
 Note: "ti,hwmods" field is used to fetch the base address and irq
 resources from TI, omap hwmod data base during device registration.
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 33df340..c6f9e55 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -40,6 +40,9 @@
 #include <linux/of_device.h>
 #include <linux/of_mdio.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of_gpio.h>
 
 /*
  * This timeout definition is a worst-case ultra defensive measure against
@@ -53,6 +56,8 @@
 
 #define DEF_OUT_FREQ		2200000		/* 2.2 MHz */
 
+#define DEFAULT_GPIO_RESET_DELAY	10	/* in microseconds */
+
 struct davinci_mdio_of_param {
 	int autosuspend_delay_ms;
 };
@@ -104,6 +109,9 @@ struct davinci_mdio_data {
 	 */
 	bool		skip_scan;
 	u32		clk_div;
+	struct gpio_desc **gpio_reset;
+	int		num_gpios;
+	int		reset_delay_us;
 };
 
 static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
@@ -142,6 +150,20 @@ static void davinci_mdio_enable(struct davinci_mdio_data *data)
 	__raw_writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
 }
 
+static void __davinci_gpio_reset(struct davinci_mdio_data *data)
+{
+	int i;
+
+	for (i = 0; i < data->num_gpios; i++) {
+		if (!data->gpio_reset[i])
+			continue;
+
+		gpiod_set_value_cansleep(data->gpio_reset[i], 1);
+		udelay(data->reset_delay_us);
+		gpiod_set_value_cansleep(data->gpio_reset[i], 0);
+	}
+}
+
 static int davinci_mdio_reset(struct mii_bus *bus)
 {
 	struct davinci_mdio_data *data = bus->priv;
@@ -317,20 +339,50 @@ static int davinci_mdio_write(struct mii_bus *bus, int phy_id,
 }
 
 #if IS_ENABLED(CONFIG_OF)
-static int davinci_mdio_probe_dt(struct mdio_platform_data *data,
-			 struct platform_device *pdev)
+static int davinci_mdio_probe_dt(struct davinci_mdio_data *data,
+				 struct platform_device *pdev)
 {
 	struct device_node *node = pdev->dev.of_node;
 	u32 prop;
-
-	if (!node)
-		return -EINVAL;
+	int error;
+	int i;
+	struct gpio_desc *gpiod;
 
 	if (of_property_read_u32(node, "bus_freq", &prop)) {
 		dev_err(&pdev->dev, "Missing bus_freq property in the DT.\n");
-		return -EINVAL;
+		data->pdata = default_pdata;
+	} else {
+		data->pdata.bus_freq = prop;
+	}
+
+	i = of_gpio_named_count(node, "reset-gpios");
+	if (i > 0) {
+		data->num_gpios = i;
+		data->gpio_reset = devm_kcalloc(&pdev->dev, i,
+						sizeof(struct gpio_desc *),
+						GFP_KERNEL);
+		if (!data->gpio_reset)
+			return -ENOMEM;
+
+		for (i = 0; i < data->num_gpios; i++) {
+			gpiod = devm_gpiod_get_index(&pdev->dev, "reset", i,
+						     GPIOD_OUT_LOW);
+			if (IS_ERR(gpiod)) {
+				error = PTR_ERR(gpiod);
+				if (error == -ENOENT)
+					continue;
+				else
+					return error;
+			}
+			data->gpio_reset[i] = gpiod;
+		}
+
+		if (of_property_read_u32(node, "reset-delay-us",
+					 &data->reset_delay_us))
+			data->reset_delay_us = DEFAULT_GPIO_RESET_DELAY;
+
+		__davinci_gpio_reset(data);
 	}
-	data->bus_freq = prop;
 
 	return 0;
 }
@@ -372,7 +424,7 @@ static int davinci_mdio_probe(struct platform_device *pdev)
 	if (dev->of_node) {
 		const struct of_device_id	*of_id;
 
-		ret = davinci_mdio_probe_dt(&data->pdata, pdev);
+		ret = davinci_mdio_probe_dt(data, pdev);
 		if (ret)
 			return ret;
 		snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
-- 
2.7.4

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#1617032

FromAndrew Lunn <andrew@lunn.ch>
Date2017-04-05 17:10 +0200
Message-ID<tsUJk-4eA-17@gated-at.bofh.it>
In reply to#1616696
On Wed, Apr 05, 2017 at 11:33:57AM +0300, Roger Quadros wrote:
> Some boards [1] leave the PHYs at an invalid state
> during system power-up or reset thus causing unreliability
> issues with the PHY like not being detected by the mdio bus
> or link not functional. To work around these boards have
> a GPIO connected to the PHY's reset pin.
> 
> Implement GPIO reset handling for such cases.
> 
> [1] - am572x-idk, am571x-idk, a437x-idk.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
>  .../devicetree/bindings/net/davinci-mdio.txt       |  2 +
>  drivers/net/ethernet/ti/davinci_mdio.c             | 68 +++++++++++++++++++---
>  2 files changed, 62 insertions(+), 8 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/davinci-mdio.txt b/Documentation/devicetree/bindings/net/davinci-mdio.txt
> index 621156c..fd6ebe7 100644
> --- a/Documentation/devicetree/bindings/net/davinci-mdio.txt
> +++ b/Documentation/devicetree/bindings/net/davinci-mdio.txt
> @@ -12,6 +12,8 @@ Required properties:
>  
>  Optional properties:
>  - ti,hwmods		: Must be "davinci_mdio"
> +- reset-gpios		: array of GPIO specifier for PHY hardware reset control
> +- reset-delay-us	: reset assertion time [in microseconds]
>  
>  Note: "ti,hwmods" field is used to fetch the base address and irq
>  resources from TI, omap hwmod data base during device registration.
> diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
> index 33df340..c6f9e55 100644
> --- a/drivers/net/ethernet/ti/davinci_mdio.c
> +++ b/drivers/net/ethernet/ti/davinci_mdio.c
> @@ -40,6 +40,9 @@
>  #include <linux/of_device.h>
>  #include <linux/of_mdio.h>
>  #include <linux/pinctrl/consumer.h>
> +#include <linux/gpio.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/of_gpio.h>
>  
>  /*
>   * This timeout definition is a worst-case ultra defensive measure against
> @@ -53,6 +56,8 @@
>  
>  #define DEF_OUT_FREQ		2200000		/* 2.2 MHz */
>  
> +#define DEFAULT_GPIO_RESET_DELAY	10	/* in microseconds */
> +
>  struct davinci_mdio_of_param {
>  	int autosuspend_delay_ms;
>  };
> @@ -104,6 +109,9 @@ struct davinci_mdio_data {
>  	 */
>  	bool		skip_scan;
>  	u32		clk_div;
> +	struct gpio_desc **gpio_reset;
> +	int		num_gpios;
> +	int		reset_delay_us;
>  };
>  
>  static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
> @@ -142,6 +150,20 @@ static void davinci_mdio_enable(struct davinci_mdio_data *data)
>  	__raw_writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
>  }
>  
> +static void __davinci_gpio_reset(struct davinci_mdio_data *data)
> +{
> +	int i;
> +
> +	for (i = 0; i < data->num_gpios; i++) {
> +		if (!data->gpio_reset[i])
> +			continue;
> +
> +		gpiod_set_value_cansleep(data->gpio_reset[i], 1);
> +		udelay(data->reset_delay_us);
> +		gpiod_set_value_cansleep(data->gpio_reset[i], 0);
> +	}
> +}

Do you really need more than one GPIO? A single gpio would make all
this code a lot simpler.

     Andrew

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#1617754

FromRoger Quadros <rogerq@ti.com>
Date2017-04-06 11:30 +0200
Message-ID<ttbTP-6GC-3@gated-at.bofh.it>
In reply to#1617032
Hi,

On 05/04/17 18:03, Andrew Lunn wrote:
> On Wed, Apr 05, 2017 at 11:33:57AM +0300, Roger Quadros wrote:
>> Some boards [1] leave the PHYs at an invalid state
>> during system power-up or reset thus causing unreliability
>> issues with the PHY like not being detected by the mdio bus
>> or link not functional. To work around these boards have
>> a GPIO connected to the PHY's reset pin.
>>
>> Implement GPIO reset handling for such cases.
>>
>> [1] - am572x-idk, am571x-idk, a437x-idk.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>> ---
>>  .../devicetree/bindings/net/davinci-mdio.txt       |  2 +
>>  drivers/net/ethernet/ti/davinci_mdio.c             | 68 +++++++++++++++++++---
>>  2 files changed, 62 insertions(+), 8 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/davinci-mdio.txt b/Documentation/devicetree/bindings/net/davinci-mdio.txt
>> index 621156c..fd6ebe7 100644
>> --- a/Documentation/devicetree/bindings/net/davinci-mdio.txt
>> +++ b/Documentation/devicetree/bindings/net/davinci-mdio.txt
>> @@ -12,6 +12,8 @@ Required properties:
>>  
>>  Optional properties:
>>  - ti,hwmods		: Must be "davinci_mdio"
>> +- reset-gpios		: array of GPIO specifier for PHY hardware reset control
>> +- reset-delay-us	: reset assertion time [in microseconds]
>>  
>>  Note: "ti,hwmods" field is used to fetch the base address and irq
>>  resources from TI, omap hwmod data base during device registration.
>> diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
>> index 33df340..c6f9e55 100644
>> --- a/drivers/net/ethernet/ti/davinci_mdio.c
>> +++ b/drivers/net/ethernet/ti/davinci_mdio.c
>> @@ -40,6 +40,9 @@
>>  #include <linux/of_device.h>
>>  #include <linux/of_mdio.h>
>>  #include <linux/pinctrl/consumer.h>
>> +#include <linux/gpio.h>
>> +#include <linux/gpio/consumer.h>
>> +#include <linux/of_gpio.h>
>>  
>>  /*
>>   * This timeout definition is a worst-case ultra defensive measure against
>> @@ -53,6 +56,8 @@
>>  
>>  #define DEF_OUT_FREQ		2200000		/* 2.2 MHz */
>>  
>> +#define DEFAULT_GPIO_RESET_DELAY	10	/* in microseconds */
>> +
>>  struct davinci_mdio_of_param {
>>  	int autosuspend_delay_ms;
>>  };
>> @@ -104,6 +109,9 @@ struct davinci_mdio_data {
>>  	 */
>>  	bool		skip_scan;
>>  	u32		clk_div;
>> +	struct gpio_desc **gpio_reset;
>> +	int		num_gpios;
>> +	int		reset_delay_us;
>>  };
>>  
>>  static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
>> @@ -142,6 +150,20 @@ static void davinci_mdio_enable(struct davinci_mdio_data *data)
>>  	__raw_writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);
>>  }
>>  
>> +static void __davinci_gpio_reset(struct davinci_mdio_data *data)
>> +{
>> +	int i;
>> +
>> +	for (i = 0; i < data->num_gpios; i++) {
>> +		if (!data->gpio_reset[i])
>> +			continue;
>> +
>> +		gpiod_set_value_cansleep(data->gpio_reset[i], 1);
>> +		udelay(data->reset_delay_us);
>> +		gpiod_set_value_cansleep(data->gpio_reset[i], 0);
>> +	}
>> +}
> 
> Do you really need more than one GPIO? A single gpio would make all
> this code a lot simpler.
> 

Yes we need. Some of our boards have separate GPIO RESET lines for
different PHYs on the same MDIO bus.

cheers,
-roger

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#1617910

FromAndrew Lunn <andrew@lunn.ch>
Date2017-04-06 14:10 +0200
Message-ID<tteoF-8jD-13@gated-at.bofh.it>
In reply to#1617754
> > Do you really need more than one GPIO? A single gpio would make all
> > this code a lot simpler.
> > 
> 
> Yes we need. Some of our boards have separate GPIO RESET lines for
> different PHYs on the same MDIO bus.

If you have a one-to-one mapping of GPIO and PHY, you should really be
modelling that differently. You want to be able to reset just a single
PHY, i.e. make it part of the PHY driver, or maybe the PHY core.

     Andrew

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#1618183

FromRoger Quadros <rogerq@ti.com>
Date2017-04-06 18:50 +0200
Message-ID<ttiLE-3md-35@gated-at.bofh.it>
In reply to#1617910
On 06/04/17 15:05, Andrew Lunn wrote:
>>> Do you really need more than one GPIO? A single gpio would make all
>>> this code a lot simpler.
>>>
>>
>> Yes we need. Some of our boards have separate GPIO RESET lines for
>> different PHYs on the same MDIO bus.
> 
> If you have a one-to-one mapping of GPIO and PHY, you should really be
> modelling that differently. You want to be able to reset just a single
> PHY, i.e. make it part of the PHY driver, or maybe the PHY core.
> 
>      Andrew
> 


I'm not sure how it would be modelled. We have never had the need to reset
just one PHY on the MDIO bus.
Some boards have a single RESET line to multiple PHYs whereas others have individual
RESET lines. In all cases we just want to do the RESET once per boot.

cheers,
-roger

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#1619283

FromDavid Miller <davem@davemloft.net>
Date2017-04-08 16:00 +0200
Message-ID<ttZ4d-5ZB-1@gated-at.bofh.it>
In reply to#1616696
From: Roger Quadros <rogerq@ti.com>
Date: Wed, 5 Apr 2017 11:33:57 +0300

> Some boards [1] leave the PHYs at an invalid state
> during system power-up or reset thus causing unreliability
> issues with the PHY like not being detected by the mdio bus
> or link not functional. To work around these boards have
> a GPIO connected to the PHY's reset pin.
> 
> Implement GPIO reset handling for such cases.
> 
> [1] - am572x-idk, am571x-idk, a437x-idk.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>

I have not seen a resolution in this discussion.

My understanding is that there are several cases (single MDIO bus whose
reset does a reset on all that MDIO bus's PHYs, etc.) and it's unclear
how to handle all such cases cleanly.

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#1619300

FromAndrew Lunn <andrew@lunn.ch>
Date2017-04-08 17:20 +0200
Message-ID<tu0jD-6UX-3@gated-at.bofh.it>
In reply to#1619283
On Sat, Apr 08, 2017 at 06:55:45AM -0700, David Miller wrote:
> From: Roger Quadros <rogerq@ti.com>
> Date: Wed, 5 Apr 2017 11:33:57 +0300
> 
> > Some boards [1] leave the PHYs at an invalid state
> > during system power-up or reset thus causing unreliability
> > issues with the PHY like not being detected by the mdio bus
> > or link not functional. To work around these boards have
> > a GPIO connected to the PHY's reset pin.
> > 
> > Implement GPIO reset handling for such cases.
> > 
> > [1] - am572x-idk, am571x-idk, a437x-idk.
> > 
> > Signed-off-by: Roger Quadros <rogerq@ti.com>
> > Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> 
> I have not seen a resolution in this discussion.
> 
> My understanding is that there are several cases (single MDIO bus whose
> reset does a reset on all that MDIO bus's PHYs, etc.) and it's unclear
> how to handle all such cases cleanly.

I see it falling into two cases.

1) We have a GPIO which resets one PHY. In this case, the GPIO is a
PHY property, it should be documented in
Documentation/devicetree/bindings/net/phy.txt. Hopefully there is
nothing PHY driver specific here, so all the handling can be placed in
the core PHY code.

2) We have one or more GPIOs which reset more than one PHY. In this
case, the GPIOs are MDIO bus properties. Again, there should not be
anything which is MDIO bus driver specific, so all the handling can be
placed in the core MDIO bus code.

       Andrew

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#1619304

FromFlorian Fainelli <f.fainelli@gmail.com>
Date2017-04-08 17:20 +0200
Message-ID<tu0jE-6UX-15@gated-at.bofh.it>
In reply to#1619300

On 04/08/2017 08:10 AM, Andrew Lunn wrote:
> On Sat, Apr 08, 2017 at 06:55:45AM -0700, David Miller wrote:
>> From: Roger Quadros <rogerq@ti.com>
>> Date: Wed, 5 Apr 2017 11:33:57 +0300
>>
>>> Some boards [1] leave the PHYs at an invalid state
>>> during system power-up or reset thus causing unreliability
>>> issues with the PHY like not being detected by the mdio bus
>>> or link not functional. To work around these boards have
>>> a GPIO connected to the PHY's reset pin.
>>>
>>> Implement GPIO reset handling for such cases.
>>>
>>> [1] - am572x-idk, am571x-idk, a437x-idk.
>>>
>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>>
>> I have not seen a resolution in this discussion.
>>
>> My understanding is that there are several cases (single MDIO bus whose
>> reset does a reset on all that MDIO bus's PHYs, etc.) and it's unclear
>> how to handle all such cases cleanly.
> 
> I see it falling into two cases.
> 
> 1) We have a GPIO which resets one PHY. In this case, the GPIO is a
> PHY property, it should be documented in
> Documentation/devicetree/bindings/net/phy.txt. Hopefully there is
> nothing PHY driver specific here, so all the handling can be placed in
> the core PHY code.

I suspect we would have to release the PHY GPIO reset line within a
mii_bus::reset callback, which occurs before the PHY registers are read.
There is this chicken and egg problem where you can't probe for a PHY
unless you can successfully read from it, and you can't do the PHY reset
in the PHY drivers' probe function unless you were able to find a PHY
device.

NB: you can work around that by using an Ethernet PHY device compatible
string in Device Tree that already has the PHY OUI specified, although
that usually does not scale to many different boards/designs.

> 
> 2) We have one or more GPIOs which reset more than one PHY. In this
> case, the GPIOs are MDIO bus properties. Again, there should not be
> anything which is MDIO bus driver specific, so all the handling can be
> placed in the core MDIO bus code.

Agreed.

I would do something like:

- if the MDIO bus node has a "gpio" reset property, use it and release
the device from reset
- for each available child node:
	- if the PHY/MDIO device's node have a "gpio" reset property use it and
release the PHYs from reset.

All of this should probably be placed somewhere in drivers/of/of_mdio.c
and deal with conditional GPIO/RESET controller support.
-- 
Florian

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#1619697

FromRoger Quadros <rogerq@ti.com>
Date2017-04-10 10:00 +0200
Message-ID<tuCoV-6gF-13@gated-at.bofh.it>
In reply to#1619304
On 08/04/17 18:18, Florian Fainelli wrote:
> 
> 
> On 04/08/2017 08:10 AM, Andrew Lunn wrote:
>> On Sat, Apr 08, 2017 at 06:55:45AM -0700, David Miller wrote:
>>> From: Roger Quadros <rogerq@ti.com>
>>> Date: Wed, 5 Apr 2017 11:33:57 +0300
>>>
>>>> Some boards [1] leave the PHYs at an invalid state
>>>> during system power-up or reset thus causing unreliability
>>>> issues with the PHY like not being detected by the mdio bus
>>>> or link not functional. To work around these boards have
>>>> a GPIO connected to the PHY's reset pin.
>>>>
>>>> Implement GPIO reset handling for such cases.
>>>>
>>>> [1] - am572x-idk, am571x-idk, a437x-idk.
>>>>
>>>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>>>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>>>
>>> I have not seen a resolution in this discussion.
>>>
>>> My understanding is that there are several cases (single MDIO bus whose
>>> reset does a reset on all that MDIO bus's PHYs, etc.) and it's unclear
>>> how to handle all such cases cleanly.
>>
>> I see it falling into two cases.
>>
>> 1) We have a GPIO which resets one PHY. In this case, the GPIO is a
>> PHY property, it should be documented in
>> Documentation/devicetree/bindings/net/phy.txt. Hopefully there is
>> nothing PHY driver specific here, so all the handling can be placed in
>> the core PHY code.
> 
> I suspect we would have to release the PHY GPIO reset line within a
> mii_bus::reset callback, which occurs before the PHY registers are read.
> There is this chicken and egg problem where you can't probe for a PHY
> unless you can successfully read from it, and you can't do the PHY reset
> in the PHY drivers' probe function unless you were able to find a PHY
> device.

+1
This is the exact problem we were facing so the reset has to be done at
MDIO bus level, before PHY probe.

> 
> NB: you can work around that by using an Ethernet PHY device compatible
> string in Device Tree that already has the PHY OUI specified, although
> that usually does not scale to many different boards/designs.
> 
>>
>> 2) We have one or more GPIOs which reset more than one PHY. In this
>> case, the GPIOs are MDIO bus properties. Again, there should not be
>> anything which is MDIO bus driver specific, so all the handling can be
>> placed in the core MDIO bus code.
> 
> Agreed.
> 
> I would do something like:
> 
> - if the MDIO bus node has a "gpio" reset property, use it and release
> the device from reset
> - for each available child node:
> 	- if the PHY/MDIO device's node have a "gpio" reset property use it and
> release the PHYs from reset.
> 
> All of this should probably be placed somewhere in drivers/of/of_mdio.c
> and deal with conditional GPIO/RESET controller support.
> 

I agree with this proposal. Just need to spend some time to rework this patch.

cheers,
-roger

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