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Groups > linux.kernel > #1615958 > unrolled thread
| Started by | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| First post | 2017-04-04 14:20 +0200 |
| Last post | 2017-04-04 18:00 +0200 |
| Articles | 6 — 1 participant |
Back to article view | Back to linux.kernel
[PATCH v3 00/11] drm/meson: Initial support for HDMI Output Neil Armstrong <narmstrong@baylibre.com> - 2017-04-04 14:20 +0200
[PATCH v3 08/11] dt-bindings: Add bindings for the Amlogic Meson dw-hdmi extension Neil Armstrong <narmstrong@baylibre.com> - 2017-04-04 14:20 +0200
[PATCH v3 09/11] drm/meson: Convert existing documentation to actual kerneldoc Neil Armstrong <narmstrong@baylibre.com> - 2017-04-04 14:20 +0200
[PATCH v3 03/11] drm/meson: Add support for components Neil Armstrong <narmstrong@baylibre.com> - 2017-04-04 14:20 +0200
[PATCH v3 01/11] drm/meson: Use crtc_state for hdisplay and fix atomic flush/enable sync for vsync commit Neil Armstrong <narmstrong@baylibre.com> - 2017-04-04 14:20 +0200
Re: [PATCH v3 00/11] drm/meson: Initial support for HDMI Output Neil Armstrong <narmstrong@baylibre.com> - 2017-04-04 18:00 +0200
| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-04-04 14:20 +0200 |
| Subject | [PATCH v3 00/11] drm/meson: Initial support for HDMI Output |
| Message-ID | <tsvBg-4KM-9@gated-at.bofh.it> |
The Amlogic GX SoCs implements a Synopsys DesignWare HDMI TX Controller
in combination with a very custom PHY.
This patchset depends on Laurent Pinchart patchset merged in drm-misc-next
and my v6 patchset at [1] to permit PHY control from outside the dw-hdmi driver.
The Synopsys DesignWare HDMI TX Controller is integrated like :
___________________________________
| HDMI TOP |<= HPD
|___________________________________|
| | |
HDMI-TX-| Synopsys HDMI | HDMI PHY |=> TMDS
| Controller |________________|
|___________________________________|<=> DDC
And uses the following paths for Pixels Encoding :
_____ _____ ____________________
vd1---| |-| | | VENC /---------|----VDAC
vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|\
osd1--| |-| | | \ | X--HDMI-TX
osd2--|_____|-|_____| | |\-ENCP--ENCP_DVI-|/
| | |
| \--ENCL-----------|----LVDS
|____________________|
The ENCI and ENCP encoders pre-formats the data for the ENCI-DVI and
ENCP-DVI encoders. Those DVI encoders will format the pixels for the
Synopsys DesignWare HDMI TX Controller.
In order to support display modes, the ENCI and ENCP encoders needs very
specific parameters for *each* display modes, so usage of the CEA VIC
identifier is necessary. But the DVI timings are generated from the
drm_mode structure in a generic way.
To simplify the first push, only the main CEA modes are supported up to
1920x1080p60. Supporting the 480i and 576i needs tweaking in the dw-hdmi
in order to support the Clock Doubling necessary for these modes.
Support for more traditional modes like the EDID fallback modes is planned
but will need tome additionnal handling along the CEA modes.
Support for 4k2k modes needs to be able to get the EDID HDMI modes, but
for now only the HDMI 1.4 modes are currently available in the drm_edid
implementation.
This patchset does :
- Fixes the CRTC handling
- Fixes the registers definitions
- Adds support for device components registration along of-graph
- Adds support for HDMI clocks
- Adds support for HDMI VENC video modes
- Adds support for the Custom HDMI PHY using callbacks added in [1]
- Adds CMA node to reserve enougth memory for 1080p display
- Adds the HDMI controller et connector modes on selected boards
- Adds a proper dt-bindings for the HDMI controller et connector
- Add RST documentation for Meson DRM driver
- Updates the MAINTAINERS file to track the new files
Changes since v2 patchset at [4] :
- Dropped already merged DT patches
- Added Daniel Vetter's acks
- Rebased on drm-misc-next at 9c4ad466d1dd
Changes since v1 patchset at [2] :
- Add the meson drm documentation from [3] to this patchset
- Update with new bus formats and HPD callbacks
- Drop all the of_machine_is_compatible
[1] http://lkml.kernel.org/r/1491230558-10804-1-git-send-email-narmstrong@baylibre.com
[2] http://lkml.kernel.org/r/1488469207-523-1-git-send-email-narmstrong@baylibre.com
[3] http://lkml.kernel.org/r/1488536068-9407-1-git-send-email-narmstrong@baylibre.com
[4] http://lkml.kernel.org/r/1490109950-21421-1-git-send-email-narmstrong@baylibre.com
Neil Armstrong (11):
drm/meson: Use crtc_state for hdisplay and fix atomic flush/enable
sync for vsync commit
drm/meson: Add missing HDMI register
drm/meson: Add support for components
drm/meson: venc_cvbs: no more return -ENODEV if CVBS is not available
drm/meson: add support for HDMI clock support
drm/meson: Add support for HDMI venc modes and settings
drm/meson: Add support for HDMI encoder and DW-HDMI bridge + PHY
dt-bindings: Add bindings for the Amlogic Meson dw-hdmi extension
drm/meson: Convert existing documentation to actual kerneldoc
drm/meson: Add RST to bring together kerneldoc
MAINTAINERS: update files for Amlogic DRM Driver
.../bindings/display/amlogic,meson-dw-hdmi.txt | 111 ++
Documentation/gpu/index.rst | 1 +
Documentation/gpu/meson.rst | 61 +
MAINTAINERS | 2 +
drivers/gpu/drm/meson/Kconfig | 6 +
drivers/gpu/drm/meson/Makefile | 1 +
drivers/gpu/drm/meson/meson_canvas.c | 4 +-
drivers/gpu/drm/meson/meson_crtc.c | 15 +-
drivers/gpu/drm/meson/meson_drv.c | 118 +-
drivers/gpu/drm/meson/meson_drv.h | 3 +
drivers/gpu/drm/meson/meson_dw_hdmi.c | 919 ++++++++++++++
drivers/gpu/drm/meson/meson_dw_hdmi.h | 146 +++
drivers/gpu/drm/meson/meson_registers.h | 1 +
drivers/gpu/drm/meson/meson_vclk.c | 632 +++++++++-
drivers/gpu/drm/meson/meson_vclk.h | 6 +-
drivers/gpu/drm/meson/meson_venc.c | 1254 +++++++++++++++++++-
drivers/gpu/drm/meson/meson_venc.h | 7 +
drivers/gpu/drm/meson/meson_venc_cvbs.c | 11 +-
drivers/gpu/drm/meson/meson_viu.c | 6 +-
drivers/gpu/drm/meson/meson_vpp.c | 8 +-
drivers/gpu/drm/meson/meson_vpp.h | 2 +
21 files changed, 3267 insertions(+), 47 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt
create mode 100644 Documentation/gpu/meson.rst
create mode 100644 drivers/gpu/drm/meson/meson_dw_hdmi.c
create mode 100644 drivers/gpu/drm/meson/meson_dw_hdmi.h
--
1.9.1
[toc] | [next] | [standalone]
| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-04-04 14:20 +0200 |
| Subject | [PATCH v3 08/11] dt-bindings: Add bindings for the Amlogic Meson dw-hdmi extension |
| Message-ID | <tsvBh-4KM-45@gated-at.bofh.it> |
| In reply to | #1615958 |
This binding describes the Amlogic Meson specific extension to the
Synopsys Designware HDMI Controller.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../bindings/display/amlogic,meson-dw-hdmi.txt | 111 +++++++++++++++++++++
1 file changed, 111 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt
diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt b/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt
new file mode 100644
index 0000000..7f040ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt
@@ -0,0 +1,111 @@
+Amlogic specific extensions to the Synopsys Designware HDMI Controller
+======================================================================
+
+The Amlogic Meson Synopsys Designware Integration is composed of :
+- A Synopsys DesignWare HDMI Controller IP
+- A TOP control block controlling the Clocks and PHY
+- A custom HDMI PHY in order to convert video to TMDS signal
+ ___________________________________
+| HDMI TOP |<= HPD
+|___________________________________|
+| | |
+| Synopsys HDMI | HDMI PHY |=> TMDS
+| Controller |________________|
+|___________________________________|<=> DDC
+
+The HDMI TOP block only supports HPD sensing.
+The Synopsys HDMI Controller interrupt is routed through the
+TOP Block interrupt.
+Communication to the TOP Block and the Synopsys HDMI Controller is done
+via a pair of dedicated addr+read/write registers.
+The HDMI PHY is configured by registers in the HHI register block.
+
+Pixel data arrives in 4:4:4 format from the VENC block and the VPU HDMI mux
+selects either the ENCI encoder for the 576i or 480i formats or the ENCP
+encoder for all the other formats including interlaced HD formats.
+
+The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
+DVI timings for the HDMI controller.
+
+Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare
+HDMI TX IP version 2.01a with HDCP and I2C & S/PDIF
+audio source interfaces.
+
+Required properties:
+- compatible: value should be different for each SoC family as :
+ - GXBB (S905) : "amlogic,meson-gxbb-dw-hdmi"
+ - GXL (S905X, S905D) : "amlogic,meson-gxl-dw-hdmi"
+ - GXM (S912) : "amlogic,meson-gxm-dw-hdmi"
+ followed by the common "amlogic,meson-gx-dw-hdmi"
+- reg: Physical base address and length of the controller's registers.
+- interrupts: The HDMI interrupt number
+- clocks, clock-names : must have the phandles to the HDMI iahb and isfr clocks,
+ and the Amlogic Meson venci clocks as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt,
+ the clocks are soc specific, the clock-names should be "iahb", "isfr", "venci"
+- resets, resets-names: must have the phandles to the HDMI apb, glue and phy
+ resets as described in :
+ Documentation/devicetree/bindings/reset/reset.txt,
+ the reset-names should be "hdmitx_apb", "hdmitx", "hdmitx_phy"
+
+Required nodes:
+
+The connections to the HDMI ports are modeled using the OF graph
+bindings specified in Documentation/devicetree/bindings/graph.txt.
+
+The following table lists for each supported model the port number
+corresponding to each HDMI output and input.
+
+ Port 0 Port 1
+-----------------------------------------
+ S905 (GXBB) VENC Input TMDS Output
+ S905X (GXL) VENC Input TMDS Output
+ S905D (GXL) VENC Input TMDS Output
+ S912 (GXM) VENC Input TMDS Output
+
+Example:
+
+hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&hdmi_tx_tmds_out>;
+ };
+ };
+};
+
+hdmi_tx: hdmi-tx@c883a000 {
+ compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
+ reg = <0x0 0xc883a000 0x0 0x1c>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
+ resets = <&reset RESET_HDMITX_CAPB3>,
+ <&reset RESET_HDMI_SYSTEM_RESET>,
+ <&reset RESET_HDMI_TX>;
+ reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
+ clocks = <&clkc CLKID_HDMI_PCLK>,
+ <&clkc CLKID_CLK81>,
+ <&clkc CLKID_GCLK_VENCI_INT0>;
+ clock-names = "isfr", "iahb", "venci";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* VPU VENC Input */
+ hdmi_tx_venc_port: port@0 {
+ reg = <0>;
+
+ hdmi_tx_in: endpoint {
+ remote-endpoint = <&hdmi_tx_out>;
+ };
+ };
+
+ /* TMDS Output */
+ hdmi_tx_tmds_port: port@1 {
+ reg = <1>;
+
+ hdmi_tx_tmds_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+};
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-04-04 14:20 +0200 |
| Subject | [PATCH v3 09/11] drm/meson: Convert existing documentation to actual kerneldoc |
| Message-ID | <tsvBh-4KM-49@gated-at.bofh.it> |
| In reply to | #1615958 |
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- drivers/gpu/drm/meson/meson_canvas.c | 4 +++- drivers/gpu/drm/meson/meson_drv.c | 5 +++-- drivers/gpu/drm/meson/meson_dw_hdmi.c | 25 +++++++++++++++++-------- drivers/gpu/drm/meson/meson_vclk.c | 22 +++++++++++++++------- drivers/gpu/drm/meson/meson_venc.c | 25 ++++++++++++++++--------- drivers/gpu/drm/meson/meson_viu.c | 6 +++++- drivers/gpu/drm/meson/meson_vpp.c | 8 ++++++-- 7 files changed, 65 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_canvas.c b/drivers/gpu/drm/meson/meson_canvas.c index 4109e36..08f6073 100644 --- a/drivers/gpu/drm/meson/meson_canvas.c +++ b/drivers/gpu/drm/meson/meson_canvas.c @@ -24,7 +24,9 @@ #include "meson_canvas.h" #include "meson_registers.h" -/* +/** + * DOC: Canvas + * * CANVAS is a memory zone where physical memory frames information * are stored for the VIU to scanout. */ diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c index a2e9f56..75382f5 100644 --- a/drivers/gpu/drm/meson/meson_drv.c +++ b/drivers/gpu/drm/meson/meson_drv.c @@ -52,13 +52,14 @@ #define DRIVER_NAME "meson" #define DRIVER_DESC "Amlogic Meson DRM driver" -/* - * Video Processing Unit +/** + * DOC: Video Processing Unit * * VPU Handles the Global Video Processing, it includes management of the * clocks gates, blocks reset lines and power domains. * * What is missing : + * * - Full reset of entire video processing HW blocks * - Scaling and setup of the VPU clock * - Bus clock gates diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c index 8851dcb..7b86eb7 100644 --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c @@ -42,18 +42,25 @@ #define DRIVER_NAME "meson-dw-hdmi" #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver" -/* +/** + * DOC: HDMI Output + * * HDMI Output is composed of : + * * - A Synopsys DesignWare HDMI Controller IP * - A TOP control block controlling the Clocks and PHY * - A custom HDMI PHY in order convert video to TMDS signal - * ___________________________________ - * | HDMI TOP |<= HPD - * |___________________________________| - * | | | - * | Synopsys HDMI | HDMI PHY |=> TMDS - * | Controller |________________| - * |___________________________________|<=> DDC + * + * .. code:: + * + * ___________________________________ + * | HDMI TOP |<= HPD + * |___________________________________| + * | | | + * | Synopsys HDMI | HDMI PHY |=> TMDS + * | Controller |________________| + * |___________________________________|<=> DDC + * * * The HDMI TOP block only supports HPD sensing. * The Synopsys HDMI Controller interrupt is routed @@ -78,6 +85,7 @@ * audio source interfaces. * * We handle the following features : + * * - HPD Rise & Fall interrupt * - HDMI Controller Interrupt * - HDMI PHY Init for 480i to 1080p60 @@ -85,6 +93,7 @@ * - VENC Mode setup for 480i to 1080p60 * * What is missing : + * * - PHY, Clock and Mode setup for 2k && 4k modes * - SDDC Scrambling mode for HDMI 2.0a * - HDCP Setup diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c index 3731479..4767704 100644 --- a/drivers/gpu/drm/meson/meson_vclk.c +++ b/drivers/gpu/drm/meson/meson_vclk.c @@ -23,21 +23,29 @@ #include "meson_drv.h" #include "meson_vclk.h" -/* +/** + * DOC: Video Clocks + * * VCLK is the "Pixel Clock" frequency generator from a dedicated PLL. * We handle the following encodings : + * * - CVBS 27MHz generator via the VCLK2 to the VENCI and VDAC blocks * - HDMI Pixel Clocks generation + * * What is missing : + * * - Genenate Pixel clocks for 2K/4K 10bit formats * * Clock generator scheme : - * __________ _________ _____ - * | | | | | |--ENCI - * | HDMI PLL |-| PLL_DIV |--- VCLK--| |--ENCL - * |__________| |_________| \ | MUX |--ENCP - * --VCLK2-| |--VDAC - * |_____|--HDMI-TX + * + * .. code:: + * + * __________ _________ _____ + * | | | | | |--ENCI + * | HDMI PLL |-| PLL_DIV |--- VCLK--| |--ENCL + * |__________| |_________| \ | MUX |--ENCP + * --VCLK2-| |--VDAC + * |_____|--HDMI-TX * * Final clocks can take input for either VCLK or VCLK2, but * VCLK is the preferred path for HDMI clocking and VCLK2 is the diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c index 31dc275..9509017 100644 --- a/drivers/gpu/drm/meson/meson_venc.c +++ b/drivers/gpu/drm/meson/meson_venc.c @@ -26,26 +26,33 @@ #include "meson_vclk.h" #include "meson_registers.h" -/* +/** + * DOC: Video Encoder + * * VENC Handle the pixels encoding to the output formats. * We handle the following encodings : + * * - CVBS Encoding via the ENCI encoder and VDAC digital to analog converter * - TMDS/HDMI Encoding via ENCI_DIV and ENCP * - Setup of more clock rates for HDMI modes * * What is missing : + * * - LCD Panel encoding via ENCL * - TV Panel encoding via ENCT * * VENC paths : - * _____ _____ ____________________ - * vd1---| |-| | | VENC /---------|----VDAC - * vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|\ - * osd1--| |-| | | \ | X--HDMI-TX - * osd2--|_____|-|_____| | |\-ENCP--ENCP_DVI-|/ - * | | | - * | \--ENCL-----------|----LVDS - * |____________________| + * + * .. code:: + * + * _____ _____ ____________________ + * vd1---| |-| | | VENC /---------|----VDAC + * vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|-| + * osd1--| |-| | | \ | X--HDMI-TX + * osd2--|_____|-|_____| | |\-ENCP--ENCP_DVI-|-| + * | | | + * | \--ENCL-----------|----LVDS + * |____________________| * * The ENCI is designed for PAl or NTSC encoding and can go through the VDAC * directly for CVBS encoding or through the ENCI_DVI encoder for HDMI. diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c index a6de8ba..6bcfa52 100644 --- a/drivers/gpu/drm/meson/meson_viu.c +++ b/drivers/gpu/drm/meson/meson_viu.c @@ -28,9 +28,12 @@ #include "meson_canvas.h" #include "meson_registers.h" -/* +/** + * DOC: Video Input Unit + * * VIU Handles the Pixel scanout and the basic Colorspace conversions * We handle the following features : + * * - OSD1 RGB565/RGB888/xRGB8888 scanout * - RGB conversion to x/cb/cr * - Progressive or Interlace buffer scanout @@ -38,6 +41,7 @@ * - HDR OSD matrix for GXL/GXM * * What is missing : + * * - BGR888/xBGR8888/BGRx8888/BGRx8888 modes * - YUV4:2:2 Y0CbY1Cr scanout * - Conversion to YUV 4:4:4 from 4:2:2 input diff --git a/drivers/gpu/drm/meson/meson_vpp.c b/drivers/gpu/drm/meson/meson_vpp.c index 671909d..27356f8 100644 --- a/drivers/gpu/drm/meson/meson_vpp.c +++ b/drivers/gpu/drm/meson/meson_vpp.c @@ -25,16 +25,20 @@ #include "meson_vpp.h" #include "meson_registers.h" -/* +/** + * DOC: Video Post Processing + * * VPP Handles all the Post Processing after the Scanout from the VIU * We handle the following post processings : - * - Postblend : Blends the OSD1 only + * + * - Postblend, Blends the OSD1 only * We exclude OSD2, VS1, VS1 and Preblend output * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and * use it only for interlace scanout * - Intermediate FIFO with default Amlogic values * * What is missing : + * * - Preblend for video overlay pre-scaling * - OSD2 support for cursor framebuffer * - Video pre-scaling before postblend -- 1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-04-04 14:20 +0200 |
| Subject | [PATCH v3 03/11] drm/meson: Add support for components |
| Message-ID | <tsvBh-4KM-47@gated-at.bofh.it> |
| In reply to | #1615958 |
This patch adds support for optional components connected through the
Device Tree endpoints scheme.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/gpu/drm/meson/meson_drv.c | 113 +++++++++++++++++++++++++++++++++-----
1 file changed, 99 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
index bc562a0..a2e9f56 100644
--- a/drivers/gpu/drm/meson/meson_drv.c
+++ b/drivers/gpu/drm/meson/meson_drv.c
@@ -24,6 +24,7 @@
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
+#include <linux/component.h>
#include <linux/of_graph.h>
#include <drm/drmP.h>
@@ -150,9 +151,9 @@ static bool meson_vpu_has_available_connectors(struct device *dev)
.max_register = 0x1000,
};
-static int meson_drv_probe(struct platform_device *pdev)
+static int meson_drv_bind(struct device *dev)
{
- struct device *dev = &pdev->dev;
+ struct platform_device *pdev = to_platform_device(dev);
struct meson_drm *priv;
struct drm_device *drm;
struct resource *res;
@@ -215,6 +216,15 @@ static int meson_drv_probe(struct platform_device *pdev)
drm_vblank_init(drm, 1);
drm_mode_config_init(drm);
+ drm->mode_config.max_width = 3840;
+ drm->mode_config.max_height = 2160;
+ drm->mode_config.funcs = &meson_mode_config_funcs;
+
+ /* Hardware Initialization */
+
+ meson_venc_init(priv);
+ meson_vpp_init(priv);
+ meson_viu_init(priv);
/* Encoder Initialization */
@@ -222,11 +232,11 @@ static int meson_drv_probe(struct platform_device *pdev)
if (ret)
goto free_drm;
- /* Hardware Initialization */
-
- meson_venc_init(priv);
- meson_vpp_init(priv);
- meson_viu_init(priv);
+ ret = component_bind_all(drm->dev, drm);
+ if (ret) {
+ dev_err(drm->dev, "Couldn't bind all components\n");
+ goto free_drm;
+ }
ret = meson_plane_create(priv);
if (ret)
@@ -241,9 +251,6 @@ static int meson_drv_probe(struct platform_device *pdev)
goto free_drm;
drm_mode_config_reset(drm);
- drm->mode_config.max_width = 8192;
- drm->mode_config.max_height = 8192;
- drm->mode_config.funcs = &meson_mode_config_funcs;
priv->fbdev = drm_fbdev_cma_init(drm, 32,
drm->mode_config.num_connector);
@@ -268,9 +275,9 @@ static int meson_drv_probe(struct platform_device *pdev)
return ret;
}
-static int meson_drv_remove(struct platform_device *pdev)
+static void meson_drv_unbind(struct device *dev)
{
- struct drm_device *drm = dev_get_drvdata(&pdev->dev);
+ struct drm_device *drm = dev_get_drvdata(dev);
struct meson_drm *priv = drm->dev_private;
drm_dev_unregister(drm);
@@ -280,9 +287,88 @@ static int meson_drv_remove(struct platform_device *pdev)
drm_vblank_cleanup(drm);
drm_dev_unref(drm);
- return 0;
}
+static const struct component_master_ops meson_drv_master_ops = {
+ .bind = meson_drv_bind,
+ .unbind = meson_drv_unbind,
+};
+
+static int compare_of(struct device *dev, void *data)
+{
+ DRM_DEBUG_DRIVER("Comparing of node %s with %s\n",
+ of_node_full_name(dev->of_node),
+ of_node_full_name(data));
+
+ return dev->of_node == data;
+}
+
+/* Possible connectors nodes to ignore */
+static const struct of_device_id connectors_match[] = {
+ { .compatible = "composite-video-connector" },
+ { .compatible = "svideo-connector" },
+ { .compatible = "hdmi-connector" },
+ { .compatible = "dvi-connector" },
+ {}
+};
+
+static int meson_probe_remote(struct platform_device *pdev,
+ struct component_match **match,
+ struct device_node *parent,
+ struct device_node *remote)
+{
+ struct device_node *ep, *remote_node;
+ int count = 1;
+
+ /* If node is a connector, return and do not add to match table */
+ if (of_match_node(connectors_match, remote))
+ return 1;
+
+ component_match_add(&pdev->dev, match, compare_of, remote);
+
+ for_each_endpoint_of_node(remote, ep) {
+ remote_node = of_graph_get_remote_port_parent(ep);
+ if (!remote_node ||
+ remote_node == parent || /* Ignore parent endpoint */
+ !of_device_is_available(remote_node))
+ continue;
+
+ count += meson_probe_remote(pdev, match, remote, remote_node);
+
+ of_node_put(remote_node);
+ }
+
+ return count;
+}
+
+static int meson_drv_probe(struct platform_device *pdev)
+{
+ struct component_match *match = NULL;
+ struct device_node *np = pdev->dev.of_node;
+ struct device_node *ep, *remote;
+ int count = 0;
+
+ for_each_endpoint_of_node(np, ep) {
+ remote = of_graph_get_remote_port_parent(ep);
+ if (!remote || !of_device_is_available(remote))
+ continue;
+
+ count += meson_probe_remote(pdev, &match, np, remote);
+ }
+
+ /* If some endpoints were found, initialize the nodes */
+ if (count) {
+ dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
+
+ return component_master_add_with_match(&pdev->dev,
+ &meson_drv_master_ops,
+ match);
+ }
+
+ /* If no output endpoints were available, simply bail out */
+ return 0;
+};
+
static const struct of_device_id dt_match[] = {
{ .compatible = "amlogic,meson-gxbb-vpu" },
{ .compatible = "amlogic,meson-gxl-vpu" },
@@ -293,7 +379,6 @@ static int meson_drv_remove(struct platform_device *pdev)
static struct platform_driver meson_drm_platform_driver = {
.probe = meson_drv_probe,
- .remove = meson_drv_remove,
.driver = {
.name = "meson-drm",
.of_match_table = dt_match,
--
1.9.1
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| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-04-04 14:20 +0200 |
| Subject | [PATCH v3 01/11] drm/meson: Use crtc_state for hdisplay and fix atomic flush/enable sync for vsync commit |
| Message-ID | <tsvBh-4KM-51@gated-at.bofh.it> |
| In reply to | #1615958 |
Clean the crtc_enable by using the proper crtc_state instead of the state
of the primary plane state data.
Also fix the dependency to commit the plane changes even if enable is called
after the flush.
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/gpu/drm/meson/meson_crtc.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
index 0fe49ec..c986eb0 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -82,11 +82,18 @@ static void meson_crtc_disable_vblank(struct drm_crtc *crtc)
static void meson_crtc_enable(struct drm_crtc *crtc)
{
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
- struct drm_plane *plane = meson_crtc->priv->primary_plane;
+ struct drm_crtc_state *crtc_state = crtc->state;
struct meson_drm *priv = meson_crtc->priv;
+ DRM_DEBUG_DRIVER("\n");
+
+ if (!crtc_state) {
+ DRM_ERROR("Invalid crtc_state\n");
+ return;
+ }
+
/* Enable VPP Postblend */
- writel(plane->state->crtc_w,
+ writel(crtc_state->mode.hdisplay,
priv->io_base + _REG(VPP_POSTBLEND_H_SIZE));
writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE,
@@ -101,6 +108,7 @@ static void meson_crtc_disable(struct drm_crtc *crtc)
struct meson_drm *priv = meson_crtc->priv;
priv->viu.osd1_enabled = false;
+ priv->viu.osd1_commit = false;
/* Disable VPP Postblend */
writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0,
@@ -137,8 +145,7 @@ static void meson_crtc_atomic_flush(struct drm_crtc *crtc,
struct meson_crtc *meson_crtc = to_meson_crtc(crtc);
struct meson_drm *priv = meson_crtc->priv;
- if (priv->viu.osd1_enabled)
- priv->viu.osd1_commit = true;
+ priv->viu.osd1_commit = true;
}
static const struct drm_crtc_helper_funcs meson_crtc_helper_funcs = {
--
1.9.1
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| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-04-04 18:00 +0200 |
| Message-ID | <tsz2a-6Qd-3@gated-at.bofh.it> |
| In reply to | #1615958 |
On 04/04/2017 02:15 PM, Neil Armstrong wrote: > The Amlogic GX SoCs implements a Synopsys DesignWare HDMI TX Controller > in combination with a very custom PHY. > > This patchset depends on Laurent Pinchart patchset merged in drm-misc-next > and my v6 patchset at [1] to permit PHY control from outside the dw-hdmi driver. > > The Synopsys DesignWare HDMI TX Controller is integrated like : > ___________________________________ > | HDMI TOP |<= HPD > |___________________________________| > | | | > HDMI-TX-| Synopsys HDMI | HDMI PHY |=> TMDS > | Controller |________________| > |___________________________________|<=> DDC > > And uses the following paths for Pixels Encoding : > _____ _____ ____________________ > vd1---| |-| | | VENC /---------|----VDAC > vd2---| VIU |-| VPP |-|-----ENCI/-ENCI_DVI-|\ > osd1--| |-| | | \ | X--HDMI-TX > osd2--|_____|-|_____| | |\-ENCP--ENCP_DVI-|/ > | | | > | \--ENCL-----------|----LVDS > |____________________| > > The ENCI and ENCP encoders pre-formats the data for the ENCI-DVI and > ENCP-DVI encoders. Those DVI encoders will format the pixels for the > Synopsys DesignWare HDMI TX Controller. > > In order to support display modes, the ENCI and ENCP encoders needs very > specific parameters for *each* display modes, so usage of the CEA VIC > identifier is necessary. But the DVI timings are generated from the > drm_mode structure in a generic way. > > To simplify the first push, only the main CEA modes are supported up to > 1920x1080p60. Supporting the 480i and 576i needs tweaking in the dw-hdmi > in order to support the Clock Doubling necessary for these modes. > > Support for more traditional modes like the EDID fallback modes is planned > but will need tome additionnal handling along the CEA modes. > Support for 4k2k modes needs to be able to get the EDID HDMI modes, but > for now only the HDMI 1.4 modes are currently available in the drm_edid > implementation. > > This patchset does : > - Fixes the CRTC handling > - Fixes the registers definitions > - Adds support for device components registration along of-graph > - Adds support for HDMI clocks > - Adds support for HDMI VENC video modes > - Adds support for the Custom HDMI PHY using callbacks added in [1] > - Adds CMA node to reserve enougth memory for 1080p display > - Adds the HDMI controller et connector modes on selected boards > - Adds a proper dt-bindings for the HDMI controller et connector > - Add RST documentation for Meson DRM driver > - Updates the MAINTAINERS file to track the new files > > Changes since v2 patchset at [4] : > - Dropped already merged DT patches > - Added Daniel Vetter's acks > - Rebased on drm-misc-next at 9c4ad466d1dd > > Changes since v1 patchset at [2] : > - Add the meson drm documentation from [3] to this patchset > - Update with new bus formats and HPD callbacks > - Drop all the of_machine_is_compatible > > [1] http://lkml.kernel.org/r/1491230558-10804-1-git-send-email-narmstrong@baylibre.com > [2] http://lkml.kernel.org/r/1488469207-523-1-git-send-email-narmstrong@baylibre.com > [3] http://lkml.kernel.org/r/1488536068-9407-1-git-send-email-narmstrong@baylibre.com > [4] http://lkml.kernel.org/r/1490109950-21421-1-git-send-email-narmstrong@baylibre.com > > Neil Armstrong (11): > drm/meson: Use crtc_state for hdisplay and fix atomic flush/enable > sync for vsync commit > drm/meson: Add missing HDMI register > drm/meson: Add support for components > drm/meson: venc_cvbs: no more return -ENODEV if CVBS is not available > drm/meson: add support for HDMI clock support > drm/meson: Add support for HDMI venc modes and settings > drm/meson: Add support for HDMI encoder and DW-HDMI bridge + PHY > dt-bindings: Add bindings for the Amlogic Meson dw-hdmi extension > drm/meson: Convert existing documentation to actual kerneldoc > drm/meson: Add RST to bring together kerneldoc > MAINTAINERS: update files for Amlogic DRM Driver > > .../bindings/display/amlogic,meson-dw-hdmi.txt | 111 ++ > Documentation/gpu/index.rst | 1 + > Documentation/gpu/meson.rst | 61 + > MAINTAINERS | 2 + > drivers/gpu/drm/meson/Kconfig | 6 + > drivers/gpu/drm/meson/Makefile | 1 + > drivers/gpu/drm/meson/meson_canvas.c | 4 +- > drivers/gpu/drm/meson/meson_crtc.c | 15 +- > drivers/gpu/drm/meson/meson_drv.c | 118 +- > drivers/gpu/drm/meson/meson_drv.h | 3 + > drivers/gpu/drm/meson/meson_dw_hdmi.c | 919 ++++++++++++++ > drivers/gpu/drm/meson/meson_dw_hdmi.h | 146 +++ > drivers/gpu/drm/meson/meson_registers.h | 1 + > drivers/gpu/drm/meson/meson_vclk.c | 632 +++++++++- > drivers/gpu/drm/meson/meson_vclk.h | 6 +- > drivers/gpu/drm/meson/meson_venc.c | 1254 +++++++++++++++++++- > drivers/gpu/drm/meson/meson_venc.h | 7 + > drivers/gpu/drm/meson/meson_venc_cvbs.c | 11 +- > drivers/gpu/drm/meson/meson_viu.c | 6 +- > drivers/gpu/drm/meson/meson_vpp.c | 8 +- > drivers/gpu/drm/meson/meson_vpp.h | 2 + > 21 files changed, 3267 insertions(+), 47 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt > create mode 100644 Documentation/gpu/meson.rst > create mode 100644 drivers/gpu/drm/meson/meson_dw_hdmi.c > create mode 100644 drivers/gpu/drm/meson/meson_dw_hdmi.h > Applied to drm-misc-next Thanks Daniel, Sean, Neil
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