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| Started by | Thierry Escande <thierry.escande@collabora.com> |
|---|---|
| First post | 2017-03-28 18:20 +0200 |
| Last post | 2017-04-03 16:40 +0200 |
| Articles | 2 — 2 participants |
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[PATCH v2 4/5] firmware: Add coreboot device tree binding documentation Thierry Escande <thierry.escande@collabora.com> - 2017-03-28 18:20 +0200
Re: [PATCH v2 4/5] firmware: Add coreboot device tree binding documentation Rob Herring <robh@kernel.org> - 2017-04-03 16:40 +0200
| From | Thierry Escande <thierry.escande@collabora.com> |
|---|---|
| Date | 2017-03-28 18:20 +0200 |
| Subject | [PATCH v2 4/5] firmware: Add coreboot device tree binding documentation |
| Message-ID | <tq20G-1Mi-23@gated-at.bofh.it> |
From: Julius Werner <jwerner@chromium.org>
This patch adds documentation describing a device tree binding for the
coreboot firmware. It is meant to be dynamically added during boot and
contains address definitions for the coreboot table (a list of
variable-sized descriptors providing information about various compile-
and run-time generated firmware parameters) and the CBMEM area (the
structure containing most run-time resident memory regions set up by
coreboot).
These definitions allow kernel drivers to easily access data contained
in and pointed to by these regions (such as coreboot's in-memory log).
(An example implementation can be seen in the following patch)
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
---
.../devicetree/bindings/firmware/coreboot.txt | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/firmware/coreboot.txt
diff --git a/Documentation/devicetree/bindings/firmware/coreboot.txt b/Documentation/devicetree/bindings/firmware/coreboot.txt
new file mode 100644
index 0000000..4c95570
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/coreboot.txt
@@ -0,0 +1,33 @@
+COREBOOT firmware information
+
+The device tree node to communicate the location of coreboot's memory-resident
+bookkeeping structures to the kernel. Since coreboot itself cannot boot a
+device-tree-based kernel (yet), this node needs to be inserted by a
+second-stage bootloader (a coreboot "payload").
+
+Required properties:
+ - compatible: Should be "coreboot"
+ - reg: Address and length of the following two memory regions, in order:
+ 1.) The coreboot table. This is a list of variable-sized descriptors
+ that contain various compile- and run-time generated firmware
+ parameters. It is identified by the magic string "LBIO" in its first
+ four bytes.
+ See coreboot's src/commonlib/include/commonlib/coreboot_tables.h for
+ details.
+ 2.) The CBMEM area. This is a downward-growing memory region used by
+ coreboot to dynamically allocate data structures that remain resident.
+ It may or may not include the coreboot table as one of its members. It
+ is identified by a root node descriptor with the magic number
+ 0xc0389481 that resides in the topmost 8 bytes of the area.
+ See coreboot's src/include/imd.h for details.
+
+Example:
+ firmware {
+ ranges;
+
+ coreboot {
+ compatible = "coreboot";
+ reg = <0xfdfea000 0x264>,
+ <0xfdfea000 0x16000>;
+ }
+ };
--
2.7.4
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2017-04-03 16:40 +0200 |
| Subject | Re: [PATCH v2 4/5] firmware: Add coreboot device tree binding documentation |
| Message-ID | <tsbjd-84l-35@gated-at.bofh.it> |
| In reply to | #1611163 |
On Tue, Mar 28, 2017 at 06:11:28PM +0200, Thierry Escande wrote: > From: Julius Werner <jwerner@chromium.org> > > This patch adds documentation describing a device tree binding for the > coreboot firmware. It is meant to be dynamically added during boot and > contains address definitions for the coreboot table (a list of > variable-sized descriptors providing information about various compile- > and run-time generated firmware parameters) and the CBMEM area (the > structure containing most run-time resident memory regions set up by > coreboot). > > These definitions allow kernel drivers to easily access data contained > in and pointed to by these regions (such as coreboot's in-memory log). > (An example implementation can be seen in the following patch) > > Signed-off-by: Julius Werner <jwerner@chromium.org> > Signed-off-by: Thierry Escande <thierry.escande@collabora.com> > --- > .../devicetree/bindings/firmware/coreboot.txt | 33 ++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/coreboot.txt Acked-by: Rob Herring <robh@kernel.org>
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