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| Started by | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> |
|---|---|
| First post | 2017-04-05 11:10 +0200 |
| Last post | 2017-04-05 11:10 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH 2/2] ASoC: codec: wm8960: Relax bit clock computation when using PLL Charles Keepax <ckeepax@opensource.wolfsonmicro.com> - 2017-04-05 11:10 +0200
| From | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> |
|---|---|
| Date | 2017-04-05 11:10 +0200 |
| Subject | Re: [PATCH 2/2] ASoC: codec: wm8960: Relax bit clock computation when using PLL |
| Message-ID | <tsP6X-FR-63@gated-at.bofh.it> |
On Tue, Apr 04, 2017 at 07:45:14PM +0300, Daniel Baluta wrote:
> Bitclk is derived from sysclk using bclk_divs.
> Sysclk can be derived in two ways:
> (1) directly from MLCK
> (2) MCLK via PLL
>
> Commit 3c01b9ee2ab9d0d ("ASoC: codec: wm8960: Relax bit clock computation")
> relaxed bitclk computation when sysclk is directly derived from MCLK.
>
> Lets do the same thing when sysclk is derived via PLL.
>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Thanks,
Charles
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