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Groups > linux.kernel > #1613629 > unrolled thread
| Started by | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| First post | 2017-03-31 06:30 +0200 |
| Last post | 2017-04-03 08:30 +0200 |
| Articles | 2 — 1 participant |
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[PATCH] arm64: dts: uniphier: add input-delay properties to Cadence eMMC node Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-31 06:30 +0200
Re: [PATCH] arm64: dts: uniphier: add input-delay properties to Cadence eMMC node Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-04-03 08:30 +0200
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-31 06:30 +0200 |
| Subject | [PATCH] arm64: dts: uniphier: add input-delay properties to Cadence eMMC node |
| Message-ID | <tqWmd-85W-1@gated-at.bofh.it> |
Since commit a04e2b383401 ("mmc: sdhci-cadence: Update PHY delay
configuration"), PHY parameters must be specified by DT.
The hard-coded settings have been converted as follows:
- SDHCI_CDNS_PHY_DLY_SD_DEFAULT -> cdns,phy-input-delay-legacy
- SDHCI_CDNS_PHY_DLY_EMMC_SDR -> cdns,phy-input-delay-mmc-highspeed
- SDHCI_CDNS_PHY_DLY_EMMC_DDR -> cdns,phy-input-delay-mmc-ddr
The following have not been moved:
- SDHCI_CDNS_PHY_DLY_SD_HS
this is unneeded in the eMMC configuration
- SDHCI_CDNS_PHY_DLY_EMMC_LEGACY
this is never enabled by the driver as it is covered by
SDHCI_CDNS_PHY_DLY_SD_DEFAULT
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 +++
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 +++
2 files changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5dc5124..b6ebdc9 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -310,6 +310,9 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
+ cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-mmc-highspeed = <2>;
+ cdns,phy-input-delay-mmc-ddr = <3>;
};
usb0: usb@5a800100 {
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 6c9a72d..0ab6c2e 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -394,6 +394,9 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
+ cdns,phy-input-delay-legacy = <4>;
+ cdns,phy-input-delay-mmc-highspeed = <2>;
+ cdns,phy-input-delay-mmc-ddr = <3>;
};
sd: sdhc@5a400000 {
--
2.7.4
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| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-04-03 08:30 +0200 |
| Subject | Re: [PATCH] arm64: dts: uniphier: add input-delay properties to Cadence eMMC node |
| Message-ID | <ts3EZ-3d5-1@gated-at.bofh.it> |
| In reply to | #1613629 |
MTD developers,
Please ignore this patch.
I accidentally sent this patch to a wrong ML.
Sorry for the noise.
2017-03-31 13:20 GMT+09:00 Masahiro Yamada <yamada.masahiro@socionext.com>:
> Since commit a04e2b383401 ("mmc: sdhci-cadence: Update PHY delay
> configuration"), PHY parameters must be specified by DT.
>
> The hard-coded settings have been converted as follows:
> - SDHCI_CDNS_PHY_DLY_SD_DEFAULT -> cdns,phy-input-delay-legacy
> - SDHCI_CDNS_PHY_DLY_EMMC_SDR -> cdns,phy-input-delay-mmc-highspeed
> - SDHCI_CDNS_PHY_DLY_EMMC_DDR -> cdns,phy-input-delay-mmc-ddr
>
> The following have not been moved:
> - SDHCI_CDNS_PHY_DLY_SD_HS
> this is unneeded in the eMMC configuration
> - SDHCI_CDNS_PHY_DLY_EMMC_LEGACY
> this is never enabled by the driver as it is covered by
> SDHCI_CDNS_PHY_DLY_SD_DEFAULT
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
> arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 +++
> arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
> index 5dc5124..b6ebdc9 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
> @@ -310,6 +310,9 @@
> bus-width = <8>;
> mmc-ddr-1_8v;
> mmc-hs200-1_8v;
> + cdns,phy-input-delay-legacy = <4>;
> + cdns,phy-input-delay-mmc-highspeed = <2>;
> + cdns,phy-input-delay-mmc-ddr = <3>;
> };
>
> usb0: usb@5a800100 {
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> index 6c9a72d..0ab6c2e 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> @@ -394,6 +394,9 @@
> bus-width = <8>;
> mmc-ddr-1_8v;
> mmc-hs200-1_8v;
> + cdns,phy-input-delay-legacy = <4>;
> + cdns,phy-input-delay-mmc-highspeed = <2>;
> + cdns,phy-input-delay-mmc-ddr = <3>;
> };
>
> sd: sdhc@5a400000 {
> --
> 2.7.4
>
> --
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--
Best Regards
Masahiro Yamada
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