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Groups > linux.kernel > #1613870 > unrolled thread

[PATCH 0/2] Fix v4.11 malta_defconfig regressions

Started byMatt Redfearn <matt.redfearn@imgtec.com>
First post2017-03-31 13:10 +0200
Last post2017-03-31 15:30 +0200
Articles 4 — 2 participants

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  [PATCH 0/2] Fix v4.11 malta_defconfig regressions Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-31 13:10 +0200
    Re: [PATCH 0/2] Fix v4.11 malta_defconfig regressions Marc Zyngier <marc.zyngier@arm.com> - 2017-03-31 14:10 +0200
      Re: [PATCH 0/2] Fix v4.11 malta_defconfig regressions Matt Redfearn <matt.redfearn@imgtec.com> - 2017-03-31 15:00 +0200
        Re: [PATCH 0/2] Fix v4.11 malta_defconfig regressions Marc Zyngier <marc.zyngier@arm.com> - 2017-03-31 15:30 +0200

#1613870 — [PATCH 0/2] Fix v4.11 malta_defconfig regressions

FromMatt Redfearn <matt.redfearn@imgtec.com>
Date2017-03-31 13:10 +0200
Subject[PATCH 0/2] Fix v4.11 malta_defconfig regressions
Message-ID<tr2Bj-3PV-5@gated-at.bofh.it>
Since v4.11-rc1, 3 regressions have been observed on the Malta platform,
using malta_defconfig. which prevent it booting. These patches fix 2 of
them. The third one is that malta_defconfig, which uses SMP-MT, no
longer sets up its IPIs correctly resulting is a string of messages
like:

irq 23: nobody cared (try booting with the "irqpoll" option)
CPU: 1 PID: 0 Comm: swapper/1 Tainted: G        W       4.11.0-rc4 #421
Stack : 00000000 00000000 00000000 00000000 807cdff2 00000047 00000000 0000003d
        80741327 8f093194 806c191c 00000000 00000001 807c9acc 80756078 807d0000
        807cdbe4 80177c78 00000003 0000003c 00000006 80177a04 806c70a8 8f02be8c
        00000006 801b4c8c 00000000 00000000 ffffffff 00000000 8f02be8c 80740000
        00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
        ...
Call Trace:
[<8010c6c0>] show_stack+0x88/0xa4
[<80380fb8>] dump_stack+0x88/0xd0
[<8017cf64>] __report_bad_irq+0x48/0x108
[<8017d2d4>] note_interrupt+0x1c0/0x2fc
[<80179ed4>] handle_irq_event_percpu+0x4c/0x64
[<8017eafc>] handle_percpu_irq+0x88/0xb8
[<801791c0>] generic_handle_irq+0x40/0x58
[<80108664>] do_IRQ+0x18/0x24
[<803b83fc>] plat_irq_dispatch+0x54/0xa8
handlers:
Disabling IRQ #23

This regression is fixed by Paul Burtons series "MIPS/irqchip: Use IPI
IRQ domains for CPU interrupt controller IPIs", but it is a large change
for this stage in the cycle so I don't know how best to proceed with
that one.



Matt Redfearn (2):
  MIPS: Malta: Fix i8259 irqchip setup
  irqchip/mips-gic: Fix Local compare interrupt

 arch/mips/mti-malta/malta-int.c | 13 +++++++++++++
 drivers/irqchip/irq-mips-gic.c  |  4 ++++
 2 files changed, 17 insertions(+)

-- 
2.7.4

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#1613942

FromMarc Zyngier <marc.zyngier@arm.com>
Date2017-03-31 14:10 +0200
Message-ID<tr3xn-4rg-7@gated-at.bofh.it>
In reply to#1613870
Hi Matt,

On 31/03/17 12:05, Matt Redfearn wrote:
> 
> Since v4.11-rc1, 3 regressions have been observed on the Malta platform,
> using malta_defconfig. which prevent it booting. These patches fix 2 of
> them. The third one is that malta_defconfig, which uses SMP-MT, no
> longer sets up its IPIs correctly resulting is a string of messages
> like:
> 
> irq 23: nobody cared (try booting with the "irqpoll" option)
> CPU: 1 PID: 0 Comm: swapper/1 Tainted: G        W       4.11.0-rc4 #421
> Stack : 00000000 00000000 00000000 00000000 807cdff2 00000047 00000000 0000003d
>         80741327 8f093194 806c191c 00000000 00000001 807c9acc 80756078 807d0000
>         807cdbe4 80177c78 00000003 0000003c 00000006 80177a04 806c70a8 8f02be8c
>         00000006 801b4c8c 00000000 00000000 ffffffff 00000000 8f02be8c 80740000
>         00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
>         ...
> Call Trace:
> [<8010c6c0>] show_stack+0x88/0xa4
> [<80380fb8>] dump_stack+0x88/0xd0
> [<8017cf64>] __report_bad_irq+0x48/0x108
> [<8017d2d4>] note_interrupt+0x1c0/0x2fc
> [<80179ed4>] handle_irq_event_percpu+0x4c/0x64
> [<8017eafc>] handle_percpu_irq+0x88/0xb8
> [<801791c0>] generic_handle_irq+0x40/0x58
> [<80108664>] do_IRQ+0x18/0x24
> [<803b83fc>] plat_irq_dispatch+0x54/0xa8
> handlers:
> Disabling IRQ #23
> 
> This regression is fixed by Paul Burtons series "MIPS/irqchip: Use IPI
> IRQ domains for CPU interrupt controller IPIs", but it is a large change
> for this stage in the cycle so I don't know how best to proceed with
> that one.
> 
> 
> 
> Matt Redfearn (2):
>   MIPS: Malta: Fix i8259 irqchip setup
>   irqchip/mips-gic: Fix Local compare interrupt
> 
>  arch/mips/mti-malta/malta-int.c | 13 +++++++++++++
>  drivers/irqchip/irq-mips-gic.c  |  4 ++++
>  2 files changed, 17 insertions(+)
> 

I can take the GIC patch through the irq tree if that's convenient (I
was about to send a PR anyway). Just let me know.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

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#1613979

FromMatt Redfearn <matt.redfearn@imgtec.com>
Date2017-03-31 15:00 +0200
Message-ID<tr4jM-4Kh-21@gated-at.bofh.it>
In reply to#1613942
Hi Marc,


On 31/03/17 13:04, Marc Zyngier wrote:
> Hi Matt,
>
> On 31/03/17 12:05, Matt Redfearn wrote:
>> Since v4.11-rc1, 3 regressions have been observed on the Malta platform,
>> using malta_defconfig. which prevent it booting. These patches fix 2 of
>> them. The third one is that malta_defconfig, which uses SMP-MT, no
>> longer sets up its IPIs correctly resulting is a string of messages
>> like:
>>
>> irq 23: nobody cared (try booting with the "irqpoll" option)
>> CPU: 1 PID: 0 Comm: swapper/1 Tainted: G        W       4.11.0-rc4 #421
>> Stack : 00000000 00000000 00000000 00000000 807cdff2 00000047 00000000 0000003d
>>          80741327 8f093194 806c191c 00000000 00000001 807c9acc 80756078 807d0000
>>          807cdbe4 80177c78 00000003 0000003c 00000006 80177a04 806c70a8 8f02be8c
>>          00000006 801b4c8c 00000000 00000000 ffffffff 00000000 8f02be8c 80740000
>>          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
>>          ...
>> Call Trace:
>> [<8010c6c0>] show_stack+0x88/0xa4
>> [<80380fb8>] dump_stack+0x88/0xd0
>> [<8017cf64>] __report_bad_irq+0x48/0x108
>> [<8017d2d4>] note_interrupt+0x1c0/0x2fc
>> [<80179ed4>] handle_irq_event_percpu+0x4c/0x64
>> [<8017eafc>] handle_percpu_irq+0x88/0xb8
>> [<801791c0>] generic_handle_irq+0x40/0x58
>> [<80108664>] do_IRQ+0x18/0x24
>> [<803b83fc>] plat_irq_dispatch+0x54/0xa8
>> handlers:
>> Disabling IRQ #23
>>
>> This regression is fixed by Paul Burtons series "MIPS/irqchip: Use IPI
>> IRQ domains for CPU interrupt controller IPIs", but it is a large change
>> for this stage in the cycle so I don't know how best to proceed with
>> that one.
>>
>>
>>
>> Matt Redfearn (2):
>>    MIPS: Malta: Fix i8259 irqchip setup
>>    irqchip/mips-gic: Fix Local compare interrupt
>>
>>   arch/mips/mti-malta/malta-int.c | 13 +++++++++++++
>>   drivers/irqchip/irq-mips-gic.c  |  4 ++++
>>   2 files changed, 17 insertions(+)
>>
> I can take the GIC patch through the irq tree if that's convenient (I
> was about to send a PR anyway). Just let me know.
>
> Thanks,
>
> 	M.

Yes that would be great, please. Ralf has just acked it.

Thanks,
Matt

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#1614020

FromMarc Zyngier <marc.zyngier@arm.com>
Date2017-03-31 15:30 +0200
Message-ID<tr4MN-59K-1@gated-at.bofh.it>
In reply to#1613979
On 31/03/17 13:55, Matt Redfearn wrote:
> Hi Marc,
> 
> 
> On 31/03/17 13:04, Marc Zyngier wrote:
>> Hi Matt,
>>
>> On 31/03/17 12:05, Matt Redfearn wrote:
>>> Since v4.11-rc1, 3 regressions have been observed on the Malta platform,
>>> using malta_defconfig. which prevent it booting. These patches fix 2 of
>>> them. The third one is that malta_defconfig, which uses SMP-MT, no
>>> longer sets up its IPIs correctly resulting is a string of messages
>>> like:
>>>
>>> irq 23: nobody cared (try booting with the "irqpoll" option)
>>> CPU: 1 PID: 0 Comm: swapper/1 Tainted: G        W       4.11.0-rc4 #421
>>> Stack : 00000000 00000000 00000000 00000000 807cdff2 00000047 00000000 0000003d
>>>          80741327 8f093194 806c191c 00000000 00000001 807c9acc 80756078 807d0000
>>>          807cdbe4 80177c78 00000003 0000003c 00000006 80177a04 806c70a8 8f02be8c
>>>          00000006 801b4c8c 00000000 00000000 ffffffff 00000000 8f02be8c 80740000
>>>          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
>>>          ...
>>> Call Trace:
>>> [<8010c6c0>] show_stack+0x88/0xa4
>>> [<80380fb8>] dump_stack+0x88/0xd0
>>> [<8017cf64>] __report_bad_irq+0x48/0x108
>>> [<8017d2d4>] note_interrupt+0x1c0/0x2fc
>>> [<80179ed4>] handle_irq_event_percpu+0x4c/0x64
>>> [<8017eafc>] handle_percpu_irq+0x88/0xb8
>>> [<801791c0>] generic_handle_irq+0x40/0x58
>>> [<80108664>] do_IRQ+0x18/0x24
>>> [<803b83fc>] plat_irq_dispatch+0x54/0xa8
>>> handlers:
>>> Disabling IRQ #23
>>>
>>> This regression is fixed by Paul Burtons series "MIPS/irqchip: Use IPI
>>> IRQ domains for CPU interrupt controller IPIs", but it is a large change
>>> for this stage in the cycle so I don't know how best to proceed with
>>> that one.
>>>
>>>
>>>
>>> Matt Redfearn (2):
>>>    MIPS: Malta: Fix i8259 irqchip setup
>>>    irqchip/mips-gic: Fix Local compare interrupt
>>>
>>>   arch/mips/mti-malta/malta-int.c | 13 +++++++++++++
>>>   drivers/irqchip/irq-mips-gic.c  |  4 ++++
>>>   2 files changed, 17 insertions(+)
>>>
>> I can take the GIC patch through the irq tree if that's convenient (I
>> was about to send a PR anyway). Just let me know.
>>
>> Thanks,
>>
>> 	M.
> 
> Yes that would be great, please. Ralf has just acked it.

OK. I'll you and Ralf deal with the i8259 patch separately.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

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