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Groups > linux.kernel > #1610358 > unrolled thread

Re: [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging

Started byIngo Molnar <mingo@kernel.org>
First post2017-03-28 08:30 +0200
Last post2017-03-30 09:40 +0200
Articles 10 — 5 participants

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  Re: [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging Ingo Molnar <mingo@kernel.org> - 2017-03-28 08:30 +0200
    Re: [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-28 11:50 +0200
      Re: [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging Ingo Molnar <mingo@kernel.org> - 2017-03-28 11:50 +0200
        [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-03-28 13:00 +0200
          Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging Borislav Petkov <bp@alien8.de> - 2017-03-28 21:00 +0200
            Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-28 23:20 +0200
              Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging Borislav Petkov <bp@alien8.de> - 2017-03-28 23:50 +0200
              Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2017-03-29 17:30 +0200
                Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging Ingo Molnar <mingo@kernel.org> - 2017-03-30 08:30 +0200
          [tip:x86/mm] x86/dump_pagetables: Add support for 5-level paging "tip-bot for Kirill A. Shutemov" <tipbot@zytor.com> - 2017-03-30 09:40 +0200

#1610358 — Re: [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging

FromIngo Molnar <mingo@kernel.org>
Date2017-03-28 08:30 +0200
SubjectRe: [PATCH 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tpSNI-3ya-7@gated-at.bofh.it>
* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:

> +#if PTRS_PER_P4D > 1
> +
> +static void walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
> +							unsigned long P)

Pretty ugly line break. Either don't break the line, or break it in a more logical 
place, like:

static void
walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr, unsigned long P)

> +	start = (p4d_t *) pgd_page_vaddr(addr);

The space between the type cast and the function invocation is not needed.

Thanks,

	Ingo

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#1610491

From"Kirill A. Shutemov" <kirill@shutemov.name>
Date2017-03-28 11:50 +0200
Message-ID<tpVVf-5DA-1@gated-at.bofh.it>
In reply to#1610358
On Tue, Mar 28, 2017 at 08:12:59AM +0200, Ingo Molnar wrote:
> 
> * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> 
> > +#if PTRS_PER_P4D > 1
> > +
> > +static void walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
> > +							unsigned long P)
> 
> Pretty ugly line break. Either don't break the line, or break it in a more logical 
> place, like:
> 
> static void
> walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr, unsigned long P)
> 
> > +	start = (p4d_t *) pgd_page_vaddr(addr);
> 
> The space between the type cast and the function invocation is not needed.

Both style issues you have pointed to are inherited from handling of other
page table levels.

Do you want me to adjust them too?

This kind of inconsistency bother me more than style issues itself.

-- 
 Kirill A. Shutemov

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#1610502

FromIngo Molnar <mingo@kernel.org>
Date2017-03-28 11:50 +0200
Message-ID<tpVVh-5DA-41@gated-at.bofh.it>
In reply to#1610491
* Kirill A. Shutemov <kirill@shutemov.name> wrote:

> On Tue, Mar 28, 2017 at 08:12:59AM +0200, Ingo Molnar wrote:
> > 
> > * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> > 
> > > +#if PTRS_PER_P4D > 1
> > > +
> > > +static void walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
> > > +							unsigned long P)
> > 
> > Pretty ugly line break. Either don't break the line, or break it in a more logical 
> > place, like:
> > 
> > static void
> > walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr, unsigned long P)
> > 
> > > +	start = (p4d_t *) pgd_page_vaddr(addr);
> > 
> > The space between the type cast and the function invocation is not needed.
> 
> Both style issues you have pointed to are inherited from handling of other
> page table levels.
> 
> Do you want me to adjust them too?

Yes, pre-existing uncleanlinesses are not a reason to replicate them going 
forward. Feel free to do it in a separate preparatory patch if the noise
is too large.

Thanks,

	Ingo

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#1610564 — [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging

From"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Date2017-03-28 13:00 +0200
Subject[PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tpX0Z-6nN-9@gated-at.bofh.it>
In reply to#1610502
Simple extension to support one more page table level.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
 arch/x86/mm/dump_pagetables.c | 59 +++++++++++++++++++++++++++++++++----------
 1 file changed, 45 insertions(+), 14 deletions(-)

diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 58b5bee7ea27..9f305be71a72 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -110,7 +110,8 @@ static struct addr_marker address_markers[] = {
 #define PTE_LEVEL_MULT (PAGE_SIZE)
 #define PMD_LEVEL_MULT (PTRS_PER_PTE * PTE_LEVEL_MULT)
 #define PUD_LEVEL_MULT (PTRS_PER_PMD * PMD_LEVEL_MULT)
-#define PGD_LEVEL_MULT (PTRS_PER_PUD * PUD_LEVEL_MULT)
+#define P4D_LEVEL_MULT (PTRS_PER_PUD * PUD_LEVEL_MULT)
+#define PGD_LEVEL_MULT (PTRS_PER_PUD * P4D_LEVEL_MULT)
 
 #define pt_dump_seq_printf(m, to_dmesg, fmt, args...)		\
 ({								\
@@ -286,14 +287,13 @@ static void note_page(struct seq_file *m, struct pg_state *st,
 	}
 }
 
-static void walk_pte_level(struct seq_file *m, struct pg_state *st, pmd_t addr,
-							unsigned long P)
+static void walk_pte_level(struct seq_file *m, struct pg_state *st, pmd_t addr, unsigned long P)
 {
 	int i;
 	pte_t *start;
 	pgprotval_t prot;
 
-	start = (pte_t *) pmd_page_vaddr(addr);
+	start = (pte_t *)pmd_page_vaddr(addr);
 	for (i = 0; i < PTRS_PER_PTE; i++) {
 		prot = pte_flags(*start);
 		st->current_address = normalize_addr(P + i * PTE_LEVEL_MULT);
@@ -304,14 +304,13 @@ static void walk_pte_level(struct seq_file *m, struct pg_state *st, pmd_t addr,
 
 #if PTRS_PER_PMD > 1
 
-static void walk_pmd_level(struct seq_file *m, struct pg_state *st, pud_t addr,
-							unsigned long P)
+static void walk_pmd_level(struct seq_file *m, struct pg_state *st, pud_t addr, unsigned long P)
 {
 	int i;
 	pmd_t *start;
 	pgprotval_t prot;
 
-	start = (pmd_t *) pud_page_vaddr(addr);
+	start = (pmd_t *)pud_page_vaddr(addr);
 	for (i = 0; i < PTRS_PER_PMD; i++) {
 		st->current_address = normalize_addr(P + i * PMD_LEVEL_MULT);
 		if (!pmd_none(*start)) {
@@ -347,15 +346,14 @@ static bool pud_already_checked(pud_t *prev_pud, pud_t *pud, bool checkwx)
 	return checkwx && prev_pud && (pud_val(*prev_pud) == pud_val(*pud));
 }
 
-static void walk_pud_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
-							unsigned long P)
+static void walk_pud_level(struct seq_file *m, struct pg_state *st, p4d_t addr, unsigned long P)
 {
 	int i;
 	pud_t *start;
 	pgprotval_t prot;
 	pud_t *prev_pud = NULL;
 
-	start = (pud_t *) pgd_page_vaddr(addr);
+	start = (pud_t *)p4d_page_vaddr(addr);
 
 	for (i = 0; i < PTRS_PER_PUD; i++) {
 		st->current_address = normalize_addr(P + i * PUD_LEVEL_MULT);
@@ -377,9 +375,42 @@ static void walk_pud_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
 }
 
 #else
-#define walk_pud_level(m,s,a,p) walk_pmd_level(m,s,__pud(pgd_val(a)),p)
-#define pgd_large(a) pud_large(__pud(pgd_val(a)))
-#define pgd_none(a)  pud_none(__pud(pgd_val(a)))
+#define walk_pud_level(m,s,a,p) walk_pmd_level(m,s,__pud(p4d_val(a)),p)
+#define p4d_large(a) pud_large(__pud(p4d_val(a)))
+#define p4d_none(a)  pud_none(__pud(p4d_val(a)))
+#endif
+
+#if PTRS_PER_P4D > 1
+
+static void walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr, unsigned long P)
+{
+	int i;
+	p4d_t *start;
+	pgprotval_t prot;
+
+	start = (p4d_t *)pgd_page_vaddr(addr);
+
+	for (i = 0; i < PTRS_PER_P4D; i++) {
+		st->current_address = normalize_addr(P + i * P4D_LEVEL_MULT);
+		if (!p4d_none(*start)) {
+			if (p4d_large(*start) || !p4d_present(*start)) {
+				prot = p4d_flags(*start);
+				note_page(m, st, __pgprot(prot), 2);
+			} else {
+				walk_pud_level(m, st, *start,
+					       P + i * P4D_LEVEL_MULT);
+			}
+		} else
+			note_page(m, st, __pgprot(0), 2);
+
+		start++;
+	}
+}
+
+#else
+#define walk_p4d_level(m,s,a,p) walk_pud_level(m,s,__p4d(pgd_val(a)),p)
+#define pgd_large(a) p4d_large(__p4d(pgd_val(a)))
+#define pgd_none(a)  p4d_none(__p4d(pgd_val(a)))
 #endif
 
 static inline bool is_hypervisor_range(int idx)
@@ -424,7 +455,7 @@ static void ptdump_walk_pgd_level_core(struct seq_file *m, pgd_t *pgd,
 				prot = pgd_flags(*start);
 				note_page(m, &st, __pgprot(prot), 1);
 			} else {
-				walk_pud_level(m, &st, *start,
+				walk_p4d_level(m, &st, *start,
 					       i * PGD_LEVEL_MULT);
 			}
 		} else
-- 
2.11.0

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#1611280 — Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging

FromBorislav Petkov <bp@alien8.de>
Date2017-03-28 21:00 +0200
SubjectRe: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tq4vw-3mI-15@gated-at.bofh.it>
In reply to#1610564
On Tue, Mar 28, 2017 at 01:48:06PM +0300, Kirill A. Shutemov wrote:
> Simple extension to support one more page table level.
> 
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> ---
>  arch/x86/mm/dump_pagetables.c | 59 +++++++++++++++++++++++++++++++++----------
>  1 file changed, 45 insertions(+), 14 deletions(-)

Hmm, so without this I get the splat below.

Can we do something about this bisection breakage? I mean, this is the
second explosion caused by 5level paging I trigger. Maybe we should
merge the whole thing into a single big patch when everything is applied
and tested, more or less, so that bisection is fine.

Or someone might have a better idea...

[    2.801262] BUG: unable to handle kernel paging request at ffffc753f000f000
[    2.803013] IP: ptdump_walk_pgd_level_core+0x236/0x3a0
[    2.804472] PGD 0 
[    2.804473] P4D 0 
[    2.805231] 
[    2.805231] Oops: 0000 [#1] PREEMPT SMP
[    2.805231] Modules linked in:
[    2.805231] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.11.0-rc4+ #1
[    2.805231] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Debian-1.8.2-1 04/01/2014
[    2.805231] task: ffff88007c1c8040 task.stack: ffffc90000008000
[    2.805231] RIP: 0010:ptdump_walk_pgd_level_core+0x236/0x3a0
[    2.805231] RSP: 0018:ffffc9000000be48 EFLAGS: 00010256
[    2.805231] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000000
[    2.805231] RDX: ffff880000001000 RSI: ffff880000000000 RDI: ffffc9000000bed0
[    2.805231] RBP: ffffc9000000bef8 R08: 0000000000000000 R09: 000000000000017f
[    2.805231] R10: 000000000000001f R11: 0000000000000001 R12: ffffc9000000be90
[    2.805231] R13: 0000000000000000 R14: ffffc753f000f000 R15: 00000000ffffff00
[    2.805231] FS:  0000000000000000(0000) GS:ffff88007ed00000(0000) knlGS:0000000000000000
[    2.805231] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[    2.805231] CR2: ffffc753f000f000 CR3: 0000000001c09000 CR4: 00000000000406e0
[    2.805231] Call Trace:
[    2.805231]  ? 0xffffffff81000000
[    2.805231]  ptdump_walk_pgd_level_checkwx+0x17/0x20
[    2.805231]  mark_rodata_ro+0xec/0x100
[    2.805231]  ? rest_init+0x90/0x90
[    2.805231]  kernel_init+0x2a/0x100
[    2.805231]  ret_from_fork+0x2e/0x40
[    2.805231] Code: 00 88 ff ff 48 8b 5d 88 4c 8d 34 10 48 ba 00 10 00 00 00 88 ff ff 48 01 d0 48 89 85 70 ff ff ff 48 89 d8 48 c1 f8 10 48 89 45 b0 <49> 8b 06 48 a9 9f ff ff ff 74 7c 48 89 c1 48 be ff 0f 00 00 00 
[    2.805231] RIP: ptdump_walk_pgd_level_core+0x236/0x3a0 RSP: ffffc9000000be48
[    2.805231] CR2: ffffc753f000f000
[    2.805231] ---[ end trace 3ec6e2c757df799d ]---
[    2.805231] Kernel panic - not syncing: Fatal exception
[    2.805231] Kernel Offset: disabled
[    2.805231] ---[ end Kernel panic - not syncing: Fatal exception

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

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#1611367 — Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging

From"Kirill A. Shutemov" <kirill@shutemov.name>
Date2017-03-28 23:20 +0200
SubjectRe: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tq6H0-586-13@gated-at.bofh.it>
In reply to#1611280
On Tue, Mar 28, 2017 at 08:55:22PM +0200, Borislav Petkov wrote:
> On Tue, Mar 28, 2017 at 01:48:06PM +0300, Kirill A. Shutemov wrote:
> > Simple extension to support one more page table level.
> > 
> > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > ---
> >  arch/x86/mm/dump_pagetables.c | 59 +++++++++++++++++++++++++++++++++----------
> >  1 file changed, 45 insertions(+), 14 deletions(-)
> 
> Hmm, so without this I get the splat below.

On current tip/master?

> Can we do something about this bisection breakage? I mean, this is the
> second explosion caused by 5level paging I trigger. Maybe we should
> merge the whole thing into a single big patch when everything is applied
> and tested, more or less, so that bisection is fine.
> 
> Or someone might have a better idea...

I'm not sure that collapsing history in one commit to fix bisectability is
any better than having broken bisectability.

I'll try to look more into this issue tomorrow.

Sorry for this.

-- 
 Kirill A. Shutemov

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#1611389 — Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging

FromBorislav Petkov <bp@alien8.de>
Date2017-03-28 23:50 +0200
SubjectRe: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tq7a2-5nl-21@gated-at.bofh.it>
In reply to#1611367
On Wed, Mar 29, 2017 at 12:15:07AM +0300, Kirill A. Shutemov wrote:
> On current tip/master?

tip/master from Monday:

commit d3b6ed97fbc63219e262faca86da2fe62885eff2 (refs/remotes/tip/master)
Merge: 399c980bd22b f2a6a7050109
Author: Ingo Molnar <mingo@kernel.org>
Date:   Mon Mar 27 10:48:30 2017 +0200

    Merge branch 'x86/mm'

> I'm not sure that collapsing history in one commit to fix bisectability is
> any better than having broken bisectability.

Of course it is better. How do you tell everyone who bisects in the
future to jump over those commits?

So perhaps not a single commit but at least meld those together which
change pagetable walking like the current example and cause a breakage.

Thanks.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

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#1612052 — Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging

From"Kirill A. Shutemov" <kirill@shutemov.name>
Date2017-03-29 17:30 +0200
SubjectRe: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tqnHQ-lp-17@gated-at.bofh.it>
In reply to#1611367
On Wed, Mar 29, 2017 at 12:15:07AM +0300, Kirill A. Shutemov wrote:
> I'll try to look more into this issue tomorrow.

Putting this commit before seems f2a6a7050109 ("x86: Convert the rest of
the code to support p4d_t") seems fixes the issue.

-- 
 Kirill A. Shutemov

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#1612587 — Re: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging

FromIngo Molnar <mingo@kernel.org>
Date2017-03-30 08:30 +0200
SubjectRe: [PATCHv2 6/8] x86/dump_pagetables: Add support 5-level paging
Message-ID<tqBKO-2aA-5@gated-at.bofh.it>
In reply to#1612052
* Kirill A. Shutemov <kirill@shutemov.name> wrote:

> On Wed, Mar 29, 2017 at 12:15:07AM +0300, Kirill A. Shutemov wrote:
> > I'll try to look more into this issue tomorrow.
> 
> Putting this commit before seems f2a6a7050109 ("x86: Convert the rest of
> the code to support p4d_t") seems fixes the issue.

Ok, I've applied this patch standalone to make tip:x86/mm boot again.

Since half of the patches in this series got iterated please send out a clean v3 
series against the tip:x86/mm that I'm going to push out later today.

Thanks,

	Ingo

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#1612669 — [tip:x86/mm] x86/dump_pagetables: Add support for 5-level paging

From"tip-bot for Kirill A. Shutemov" <tipbot@zytor.com>
Date2017-03-30 09:40 +0200
Subject[tip:x86/mm] x86/dump_pagetables: Add support for 5-level paging
Message-ID<tqCQy-2Ql-19@gated-at.bofh.it>
In reply to#1610564
Commit-ID:  fdd3d8ce0ea62c32b039af45cc5538b728e366d9
Gitweb:     http://git.kernel.org/tip/fdd3d8ce0ea62c32b039af45cc5538b728e366d9
Author:     Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
AuthorDate: Tue, 28 Mar 2017 13:48:06 +0300
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Thu, 30 Mar 2017 08:20:17 +0200

x86/dump_pagetables: Add support for 5-level paging

Simple extension to support one more page table level.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20170328104806.41711-1-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/mm/dump_pagetables.c | 59 +++++++++++++++++++++++++++++++++----------
 1 file changed, 45 insertions(+), 14 deletions(-)

diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 58b5bee..9f305be 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -110,7 +110,8 @@ static struct addr_marker address_markers[] = {
 #define PTE_LEVEL_MULT (PAGE_SIZE)
 #define PMD_LEVEL_MULT (PTRS_PER_PTE * PTE_LEVEL_MULT)
 #define PUD_LEVEL_MULT (PTRS_PER_PMD * PMD_LEVEL_MULT)
-#define PGD_LEVEL_MULT (PTRS_PER_PUD * PUD_LEVEL_MULT)
+#define P4D_LEVEL_MULT (PTRS_PER_PUD * PUD_LEVEL_MULT)
+#define PGD_LEVEL_MULT (PTRS_PER_PUD * P4D_LEVEL_MULT)
 
 #define pt_dump_seq_printf(m, to_dmesg, fmt, args...)		\
 ({								\
@@ -286,14 +287,13 @@ static void note_page(struct seq_file *m, struct pg_state *st,
 	}
 }
 
-static void walk_pte_level(struct seq_file *m, struct pg_state *st, pmd_t addr,
-							unsigned long P)
+static void walk_pte_level(struct seq_file *m, struct pg_state *st, pmd_t addr, unsigned long P)
 {
 	int i;
 	pte_t *start;
 	pgprotval_t prot;
 
-	start = (pte_t *) pmd_page_vaddr(addr);
+	start = (pte_t *)pmd_page_vaddr(addr);
 	for (i = 0; i < PTRS_PER_PTE; i++) {
 		prot = pte_flags(*start);
 		st->current_address = normalize_addr(P + i * PTE_LEVEL_MULT);
@@ -304,14 +304,13 @@ static void walk_pte_level(struct seq_file *m, struct pg_state *st, pmd_t addr,
 
 #if PTRS_PER_PMD > 1
 
-static void walk_pmd_level(struct seq_file *m, struct pg_state *st, pud_t addr,
-							unsigned long P)
+static void walk_pmd_level(struct seq_file *m, struct pg_state *st, pud_t addr, unsigned long P)
 {
 	int i;
 	pmd_t *start;
 	pgprotval_t prot;
 
-	start = (pmd_t *) pud_page_vaddr(addr);
+	start = (pmd_t *)pud_page_vaddr(addr);
 	for (i = 0; i < PTRS_PER_PMD; i++) {
 		st->current_address = normalize_addr(P + i * PMD_LEVEL_MULT);
 		if (!pmd_none(*start)) {
@@ -347,15 +346,14 @@ static bool pud_already_checked(pud_t *prev_pud, pud_t *pud, bool checkwx)
 	return checkwx && prev_pud && (pud_val(*prev_pud) == pud_val(*pud));
 }
 
-static void walk_pud_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
-							unsigned long P)
+static void walk_pud_level(struct seq_file *m, struct pg_state *st, p4d_t addr, unsigned long P)
 {
 	int i;
 	pud_t *start;
 	pgprotval_t prot;
 	pud_t *prev_pud = NULL;
 
-	start = (pud_t *) pgd_page_vaddr(addr);
+	start = (pud_t *)p4d_page_vaddr(addr);
 
 	for (i = 0; i < PTRS_PER_PUD; i++) {
 		st->current_address = normalize_addr(P + i * PUD_LEVEL_MULT);
@@ -377,9 +375,42 @@ static void walk_pud_level(struct seq_file *m, struct pg_state *st, pgd_t addr,
 }
 
 #else
-#define walk_pud_level(m,s,a,p) walk_pmd_level(m,s,__pud(pgd_val(a)),p)
-#define pgd_large(a) pud_large(__pud(pgd_val(a)))
-#define pgd_none(a)  pud_none(__pud(pgd_val(a)))
+#define walk_pud_level(m,s,a,p) walk_pmd_level(m,s,__pud(p4d_val(a)),p)
+#define p4d_large(a) pud_large(__pud(p4d_val(a)))
+#define p4d_none(a)  pud_none(__pud(p4d_val(a)))
+#endif
+
+#if PTRS_PER_P4D > 1
+
+static void walk_p4d_level(struct seq_file *m, struct pg_state *st, pgd_t addr, unsigned long P)
+{
+	int i;
+	p4d_t *start;
+	pgprotval_t prot;
+
+	start = (p4d_t *)pgd_page_vaddr(addr);
+
+	for (i = 0; i < PTRS_PER_P4D; i++) {
+		st->current_address = normalize_addr(P + i * P4D_LEVEL_MULT);
+		if (!p4d_none(*start)) {
+			if (p4d_large(*start) || !p4d_present(*start)) {
+				prot = p4d_flags(*start);
+				note_page(m, st, __pgprot(prot), 2);
+			} else {
+				walk_pud_level(m, st, *start,
+					       P + i * P4D_LEVEL_MULT);
+			}
+		} else
+			note_page(m, st, __pgprot(0), 2);
+
+		start++;
+	}
+}
+
+#else
+#define walk_p4d_level(m,s,a,p) walk_pud_level(m,s,__p4d(pgd_val(a)),p)
+#define pgd_large(a) p4d_large(__p4d(pgd_val(a)))
+#define pgd_none(a)  p4d_none(__p4d(pgd_val(a)))
 #endif
 
 static inline bool is_hypervisor_range(int idx)
@@ -424,7 +455,7 @@ static void ptdump_walk_pgd_level_core(struct seq_file *m, pgd_t *pgd,
 				prot = pgd_flags(*start);
 				note_page(m, &st, __pgprot(prot), 1);
 			} else {
-				walk_pud_level(m, &st, *start,
+				walk_p4d_level(m, &st, *start,
 					       i * PGD_LEVEL_MULT);
 			}
 		} else

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