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| Started by | Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> |
|---|---|
| First post | 2017-03-27 10:10 +0200 |
| Last post | 2017-03-28 09:00 +0200 |
| Articles | 3 — 2 participants |
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[PATCH v2 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-03-27 10:10 +0200
Re: [PATCH v2 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers Masami Hiramatsu <mhiramat@kernel.org> - 2017-03-27 16:20 +0200
Re: [PATCH v2 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> - 2017-03-28 09:00 +0200
| From | Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> |
|---|---|
| Date | 2017-03-27 10:10 +0200 |
| Subject | [PATCH v2 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers |
| Message-ID | <tpxSV-4Xx-5@gated-at.bofh.it> |
I found couple of events using al, bl, cl and dl registers for
argument. These are not directly accepted by uprobe_events and
thus needs to be mapped to ax, bx, cx and dx respectively.
Few ex,
/usr/bin/qemu-system-s390x
css_adapter_interrupt: 1@%bl
css_chpid_add: 1@%cl 1@%sil 1@%dl
dma_bdrv_io: 8@%rbx 8@%rbp -8@%r14 1@%al
/usr/bin/postgres
buffer__read__done: ... -1@-bash -1@%al
buffer__read__start: ... -1@%al
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
---
tools/perf/arch/x86/util/perf_regs.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c
index d8a8dcf..99faab4 100644
--- a/tools/perf/arch/x86/util/perf_regs.c
+++ b/tools/perf/arch/x86/util/perf_regs.c
@@ -40,12 +40,16 @@ struct sdt_name_reg {
static const struct sdt_name_reg sdt_reg_renamings[] = {
SDT_NAME_REG(eax, ax),
SDT_NAME_REG(rax, ax),
+ SDT_NAME_REG(al, ax),
SDT_NAME_REG(ebx, bx),
SDT_NAME_REG(rbx, bx),
+ SDT_NAME_REG(bl, ax),
SDT_NAME_REG(ecx, cx),
SDT_NAME_REG(rcx, cx),
+ SDT_NAME_REG(cl, ax),
SDT_NAME_REG(edx, dx),
SDT_NAME_REG(rdx, dx),
+ SDT_NAME_REG(dl, ax),
SDT_NAME_REG(esi, si),
SDT_NAME_REG(rsi, si),
SDT_NAME_REG(sil, si),
--
2.9.3
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| From | Masami Hiramatsu <mhiramat@kernel.org> |
|---|---|
| Date | 2017-03-27 16:20 +0200 |
| Subject | Re: [PATCH v2 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers |
| Message-ID | <tpDF0-QR-29@gated-at.bofh.it> |
| In reply to | #1609551 |
On Mon, 27 Mar 2017 13:28:27 +0530
Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> wrote:
> I found couple of events using al, bl, cl and dl registers for
> argument. These are not directly accepted by uprobe_events and
> thus needs to be mapped to ax, bx, cx and dx respectively.
>
> Few ex,
>
> /usr/bin/qemu-system-s390x
> css_adapter_interrupt: 1@%bl
> css_chpid_add: 1@%cl 1@%sil 1@%dl
> dma_bdrv_io: 8@%rbx 8@%rbp -8@%r14 1@%al
>
> /usr/bin/postgres
> buffer__read__done: ... -1@-bash -1@%al
> buffer__read__start: ... -1@%al
Of course, it should be suppoted. BTW, wouldn't we take care about ah, bh ... too?
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Thanks!
>
> Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
> ---
> tools/perf/arch/x86/util/perf_regs.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c
> index d8a8dcf..99faab4 100644
> --- a/tools/perf/arch/x86/util/perf_regs.c
> +++ b/tools/perf/arch/x86/util/perf_regs.c
> @@ -40,12 +40,16 @@ struct sdt_name_reg {
> static const struct sdt_name_reg sdt_reg_renamings[] = {
> SDT_NAME_REG(eax, ax),
> SDT_NAME_REG(rax, ax),
> + SDT_NAME_REG(al, ax),
> SDT_NAME_REG(ebx, bx),
> SDT_NAME_REG(rbx, bx),
> + SDT_NAME_REG(bl, ax),
> SDT_NAME_REG(ecx, cx),
> SDT_NAME_REG(rcx, cx),
> + SDT_NAME_REG(cl, ax),
> SDT_NAME_REG(edx, dx),
> SDT_NAME_REG(rdx, dx),
> + SDT_NAME_REG(dl, ax),
> SDT_NAME_REG(esi, si),
> SDT_NAME_REG(rsi, si),
> SDT_NAME_REG(sil, si),
> --
> 2.9.3
>
--
Masami Hiramatsu <mhiramat@kernel.org>
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| From | Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> |
|---|---|
| Date | 2017-03-28 09:00 +0200 |
| Subject | Re: [PATCH v2 1/3] perf/sdt/x86: Add renaming logic for (missing) 8 bit registers |
| Message-ID | <tpTgJ-3Jy-1@gated-at.bofh.it> |
| In reply to | #1609878 |
Hi Masami, Thanks for the review. On Monday 27 March 2017 07:47 PM, Masami Hiramatsu wrote: > On Mon, 27 Mar 2017 13:28:27 +0530 > Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> wrote: > >> I found couple of events using al, bl, cl and dl registers for >> argument. These are not directly accepted by uprobe_events and >> thus needs to be mapped to ax, bx, cx and dx respectively. >> >> Few ex, >> >> /usr/bin/qemu-system-s390x >> css_adapter_interrupt: 1@%bl >> css_chpid_add: 1@%cl 1@%sil 1@%dl >> dma_bdrv_io: 8@%rbx 8@%rbp -8@%r14 1@%al >> >> /usr/bin/postgres >> buffer__read__done: ... -1@-bash -1@%al >> buffer__read__start: ... -1@%al > Of course, it should be suppoted. BTW, wouldn't we take care about ah, bh ... too? I thought about them while preparing this patch, but I couldn't find any events using those registers. So I ignored them. But I think no one stops compiler to use those registers for sdt argument. And if so, they should get included. Will send v3 for this. Thanks, Ravi
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