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Groups > linux.kernel > #1607232 > unrolled thread

[PATCH v4 0/6] Pad retentions support for Exynos5433

Started byMarek Szyprowski <m.szyprowski@samsung.com>
First post2017-03-23 09:10 +0100
Last post2017-04-04 12:10 +0200
Articles 15 — 4 participants

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  [PATCH v4 0/6] Pad retentions support for Exynos5433 Marek Szyprowski <m.szyprowski@samsung.com> - 2017-03-23 09:10 +0100
    [PATCH v4 2/6] pinctrl: samsung: Add support for pad retention control  for Exynos5433 SoCs Marek Szyprowski <m.szyprowski@samsung.com> - 2017-03-23 09:10 +0100
      Re: [PATCH v4 2/6] pinctrl: samsung: Add support for pad retention  control for Exynos5433 SoCs Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-23 20:20 +0100
    [PATCH v4 6/6] mfd: exynos-lpass: Add runtime PM support Marek Szyprowski <m.szyprowski@samsung.com> - 2017-03-23 09:10 +0100
    [PATCH v4 1/6] pinctrl: samsung: Ensure that pad retention is disabled  on driver init Marek Szyprowski <m.szyprowski@samsung.com> - 2017-03-23 09:10 +0100
      Re: [PATCH v4 1/6] pinctrl: samsung: Ensure that pad retention is  disabled on driver init Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-23 20:20 +0100
    [PATCH v4 4/6] mfd: exynos-lpass: Add support for clocks Marek Szyprowski <m.szyprowski@samsung.com> - 2017-03-23 09:10 +0100
    [PATCH v4 3/6] mfd: exynos-lpass: Remove pad retention control Marek Szyprowski <m.szyprowski@samsung.com> - 2017-03-23 09:10 +0100
    Re: [PATCH v4 0/6] Pad retentions support for Exynos5433 Linus Walleij <linus.walleij@linaro.org> - 2017-03-28 11:30 +0200
      Re: [PATCH v4 0/6] Pad retentions support for Exynos5433 Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-28 12:20 +0200
    [GIT PULL] mfd: exynos-lpass: Pinctrl dependency Krzysztof Kozlowski <krzk@kernel.org> - 2017-03-28 17:50 +0200
      Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency Lee Jones <lee.jones@linaro.org> - 2017-04-03 12:20 +0200
        Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency Krzysztof Kozlowski <krzk@kernel.org> - 2017-04-04 10:30 +0200
          Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency Lee Jones <lee.jones@linaro.org> - 2017-04-04 12:00 +0200
            Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency Krzysztof Kozlowski <krzk@kernel.org> - 2017-04-04 12:10 +0200

#1607232 — [PATCH v4 0/6] Pad retentions support for Exynos5433

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-03-23 09:10 +0100
Subject[PATCH v4 0/6] Pad retentions support for Exynos5433
Message-ID<to5YK-7Ts-27@gated-at.bofh.it>
Hello,

This patchset is a next step to add support for all power domains on
Exynos5433 SoCs. This patchset contains patches for Exynos pin control
driver and Exynos LPASS MFD driver, which are needed to make the
platform ready for adding power domains support.

Patches in this patchset have runtime dependency. They are order in such
a way to make the changes bisectable (mfd lpass changes should be applied
after pinctrl patches). Other dependencies mentioned previously in v3 of
this patchset has been finally merged to v4.11-rc1.

Patches have been rebased on top of linux v4.11-rc3.

Best regards
Marek Szyprowski
Samsung R&D Institute Poland


Changelog:
v4:
- rebased onto v4.11-rc3
- added missing Acks from Lee Jones and Rob Herring

v3: https://lkml.org/lkml/2017/1/30/358
- moved adding new PMU register defines to separate patch (requested by
  Krzysztof Kozlowski)
- rebased onto Linux next-20170130 (removed "soc: samsung: pmu: Add dummy
  support for Exynos5433 SoC" and "arm64: dts: exynos: Add clocks to
  Exynos5433 LPASS module" patches, which are already merged)

v2: https://lkml.org/lkml/2017/1/26/57
- fixed issues pointed by Krzysztof Kozlowski:
  1. added more checks to Exynos PMU driver for NULL drvdata
  2. reused EXYNOS_WAKEUP_FROM_LOWPWR in retention data for Exynos5433
  3. converted lpass driver to devm_clk_get
  4. added missing ->remove callback to lpass driver

v1: https://lkml.org/lkml/2017/1/25/214
- initial version


Patch summary:

Marek Szyprowski (6):
  pinctrl: samsung: Ensure that pad retention is disabled on driver init
  pinctrl: samsung: Add support for pad retention control for Exynos5433
    SoCs
  mfd: exynos-lpass: Remove pad retention control
  mfd: exynos-lpass: Add support for clocks
  mfd: exynos-lpass: Add missing remove() function
  mfd: exynos-lpass: Add runtime PM support

 .../bindings/mfd/samsung,exynos5433-lpass.txt      |  8 ++-
 drivers/mfd/exynos-lpass.c                         | 48 ++++++++++-------
 drivers/pinctrl/samsung/pinctrl-exynos.c           | 63 ++++++++++++++++++++++
 include/linux/mfd/syscon/exynos5-pmu.h             |  3 --
 4 files changed, 99 insertions(+), 23 deletions(-)

-- 
1.9.1

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#1607233 — [PATCH v4 2/6] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-03-23 09:10 +0100
Subject[PATCH v4 2/6] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<to5YK-7Ts-31@gated-at.bofh.it>
In reply to#1607232
This patch adds support for retention control for Exynos5433 SoCs. Three
groups of pins has been defined for retention control: common shared group
for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
separate control for FSYS and AUD pin banks, for which PMU retention
registers match whole banks.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 drivers/pinctrl/samsung/pinctrl-exynos.c | 58 ++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index fa8bdd9ae198..c0dfd31c0fa2 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1551,6 +1551,54 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 	EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
 };
 
+/* PMU pin retention groups registers for Exynos5433 (without audio & fsys) */
+static const u32 exynos5433_retention_regs[] = {
+	EXYNOS5433_PAD_RETENTION_TOP_OPTION,
+	EXYNOS5433_PAD_RETENTION_UART_OPTION,
+	EXYNOS5433_PAD_RETENTION_EBIA_OPTION,
+	EXYNOS5433_PAD_RETENTION_EBIB_OPTION,
+	EXYNOS5433_PAD_RETENTION_SPI_OPTION,
+	EXYNOS5433_PAD_RETENTION_MIF_OPTION,
+	EXYNOS5433_PAD_RETENTION_USBXTI_OPTION,
+	EXYNOS5433_PAD_RETENTION_BOOTLDO_OPTION,
+	EXYNOS5433_PAD_RETENTION_UFS_OPTION,
+	EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION,
+};
+
+static const struct samsung_retention_data exynos5433_retention_data __initconst = {
+	.regs	 = exynos5433_retention_regs,
+	.nr_regs = ARRAY_SIZE(exynos5433_retention_regs),
+	.value	 = EXYNOS_WAKEUP_FROM_LOWPWR,
+	.refcnt	 = &exynos_shared_retention_refcnt,
+	.init	 = exynos_retention_init,
+};
+
+/* PMU retention control for audio pins can be tied to audio pin bank */
+static const u32 exynos5433_audio_retention_regs[] = {
+	EXYNOS5433_PAD_RETENTION_AUD_OPTION,
+};
+
+static const struct samsung_retention_data exynos5433_audio_retention_data __initconst = {
+	.regs	 = exynos5433_audio_retention_regs,
+	.nr_regs = ARRAY_SIZE(exynos5433_audio_retention_regs),
+	.value	 = EXYNOS_WAKEUP_FROM_LOWPWR,
+	.init	 = exynos_retention_init,
+};
+
+/* PMU retention control for mmc pins can be tied to fsys pin bank */
+static const u32 exynos5433_fsys_retention_regs[] = {
+	EXYNOS5433_PAD_RETENTION_MMC0_OPTION,
+	EXYNOS5433_PAD_RETENTION_MMC1_OPTION,
+	EXYNOS5433_PAD_RETENTION_MMC2_OPTION,
+};
+
+static const struct samsung_retention_data exynos5433_fsys_retention_data __initconst = {
+	.regs	 = exynos5433_fsys_retention_regs,
+	.nr_regs = ARRAY_SIZE(exynos5433_fsys_retention_regs),
+	.value	 = EXYNOS_WAKEUP_FROM_LOWPWR,
+	.init	 = exynos_retention_init,
+};
+
 /*
  * Samsung pinctrl driver data for Exynos5433 SoC. Exynos5433 SoC includes
  * ten gpio/pin-mux/pinconfig controllers.
@@ -1564,6 +1612,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
 		.nr_ext_resources = 1,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 1 data */
 		.pin_banks	= exynos5433_pin_banks1,
@@ -1571,6 +1620,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_audio_retention_data,
 	}, {
 		/* pin-controller instance 2 data */
 		.pin_banks	= exynos5433_pin_banks2,
@@ -1578,6 +1628,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 3 data */
 		.pin_banks	= exynos5433_pin_banks3,
@@ -1585,6 +1636,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 4 data */
 		.pin_banks	= exynos5433_pin_banks4,
@@ -1592,6 +1644,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 5 data */
 		.pin_banks	= exynos5433_pin_banks5,
@@ -1599,6 +1652,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_fsys_retention_data,
 	}, {
 		/* pin-controller instance 6 data */
 		.pin_banks	= exynos5433_pin_banks6,
@@ -1606,6 +1660,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 7 data */
 		.pin_banks	= exynos5433_pin_banks7,
@@ -1613,6 +1668,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 8 data */
 		.pin_banks	= exynos5433_pin_banks8,
@@ -1620,6 +1676,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	}, {
 		/* pin-controller instance 9 data */
 		.pin_banks	= exynos5433_pin_banks9,
@@ -1627,6 +1684,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 		.eint_gpio_init = exynos_eint_gpio_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.retention_data	= &exynos5433_retention_data,
 	},
 };
 
-- 
1.9.1

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#1607821 — Re: [PATCH v4 2/6] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-03-23 20:20 +0100
SubjectRe: [PATCH v4 2/6] pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
Message-ID<togr7-6L0-11@gated-at.bofh.it>
In reply to#1607233
On Thu, Mar 23, 2017 at 09:03:23AM +0100, Marek Szyprowski wrote:
> This patch adds support for retention control for Exynos5433 SoCs. Three
> groups of pins has been defined for retention control: common shared group
> for ALIVE, CPIF, eSE, FINGER, IMEM, NFC, PERIC, TOUCH pin banks and
> separate control for FSYS and AUD pin banks, for which PMU retention
> registers match whole banks.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>  drivers/pinctrl/samsung/pinctrl-exynos.c | 58 ++++++++++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 

Thanks, applied.

Let it settle for one day so auto-builders will catch up and then I will
provide a stable tag for Lee (MFD).

Best regards,
Krzysztof

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#1607235 — [PATCH v4 6/6] mfd: exynos-lpass: Add runtime PM support

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-03-23 09:10 +0100
Subject[PATCH v4 6/6] mfd: exynos-lpass: Add runtime PM support
Message-ID<to5YL-7Ts-43@gated-at.bofh.it>
In reply to#1607232
Convert exisitng lpass-suspend/resume callbacks into runtime PM callbacks.
This way Exynos LPASS driver will be ready for use with power domains
enabled. LPASS will be runtime resumed/suspended as a result of its child
devices runtime PM transitions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
---
 drivers/mfd/exynos-lpass.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
index 9dbbedad916f..6d735e22acda 100644
--- a/drivers/mfd/exynos-lpass.c
+++ b/drivers/mfd/exynos-lpass.c
@@ -22,6 +22,7 @@
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/types.h>
 
@@ -132,6 +133,8 @@ static int exynos_lpass_probe(struct platform_device *pdev)
 	}
 
 	platform_set_drvdata(pdev, lpass);
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
 	exynos_lpass_enable(lpass);
 
 	return of_platform_populate(dev->of_node, NULL, NULL, dev);
@@ -141,7 +144,9 @@ static int exynos_lpass_remove(struct platform_device *pdev)
 {
 	struct exynos_lpass *lpass = platform_get_drvdata(pdev);
 
-	exynos_lpass_disable(lpass);
+	pm_runtime_disable(&pdev->dev);
+	if (!pm_runtime_status_suspended(&pdev->dev))
+		exynos_lpass_disable(lpass);
 	regmap_exit(lpass->top);
 
 	return 0;
@@ -165,8 +170,11 @@ static int __maybe_unused exynos_lpass_resume(struct device *dev)
 	return 0;
 }
 
-static SIMPLE_DEV_PM_OPS(lpass_pm_ops, exynos_lpass_suspend,
-					exynos_lpass_resume);
+static const struct dev_pm_ops lpass_pm_ops = {
+	SET_RUNTIME_PM_OPS(exynos_lpass_suspend, exynos_lpass_resume, NULL)
+	SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				     pm_runtime_force_resume)
+};
 
 static const struct of_device_id exynos_lpass_of_match[] = {
 	{ .compatible = "samsung,exynos5433-lpass" },
-- 
1.9.1

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#1607236 — [PATCH v4 1/6] pinctrl: samsung: Ensure that pad retention is disabled on driver init

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-03-23 09:10 +0100
Subject[PATCH v4 1/6] pinctrl: samsung: Ensure that pad retention is disabled on driver init
Message-ID<to5YL-7Ts-47@gated-at.bofh.it>
In reply to#1607232
When pin controller device is a part of power domain, there is no guarantee
that the power domain was not turned off and then on during boot process
before probing of the pin control driver. If it happened, then pin control
driver should ensure that pad retention is turned off during its probe call.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 drivers/pinctrl/samsung/pinctrl-exynos.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index f9b49967f512..fa8bdd9ae198 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -777,6 +777,7 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 {
 	struct samsung_retention_ctrl *ctrl;
 	struct regmap *pmu_regs;
+	int i;
 
 	ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL);
 	if (!ctrl)
@@ -794,6 +795,10 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 	ctrl->enable = exynos_retention_enable;
 	ctrl->disable = exynos_retention_disable;
 
+	/* Ensure that retention is disabled on driver init */
+	for (i = 0; i < ctrl->nr_regs; i++)
+		regmap_write(pmu_regs, ctrl->regs[i], ctrl->value);
+
 	return ctrl;
 }
 
-- 
1.9.1

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#1607822 — Re: [PATCH v4 1/6] pinctrl: samsung: Ensure that pad retention is disabled on driver init

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-03-23 20:20 +0100
SubjectRe: [PATCH v4 1/6] pinctrl: samsung: Ensure that pad retention is disabled on driver init
Message-ID<togr7-6L0-13@gated-at.bofh.it>
In reply to#1607236
On Thu, Mar 23, 2017 at 09:03:22AM +0100, Marek Szyprowski wrote:
> When pin controller device is a part of power domain, there is no guarantee
> that the power domain was not turned off and then on during boot process
> before probing of the pin control driver. If it happened, then pin control
> driver should ensure that pad retention is turned off during its probe call.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>  drivers/pinctrl/samsung/pinctrl-exynos.c | 5 +++++
>  1 file changed, 5 insertions(+)
>

Thanks, applied.

Let it settle for one day so auto-builders will catch up and then I will
provide a stable tag for Lee (MFD).

Best regards,
Krzysztof

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#1607237 — [PATCH v4 4/6] mfd: exynos-lpass: Add support for clocks

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-03-23 09:10 +0100
Subject[PATCH v4 4/6] mfd: exynos-lpass: Add support for clocks
Message-ID<to5YL-7Ts-53@gated-at.bofh.it>
In reply to#1607232
Exynos LPASS requires some clocks to be enabled to make any access to its
registers. This patch adds code for handling such clocks. For current set
of registers it is enough to keep sfr0_ctrl clock enabled. Till now it
worked only because those clocks were enabled by bootloader and driver
probe() happened before they were disabled by clock core because of lack
of users. Handling those clocks is also needed to make it possible to
enable support for audio power domain.

This patch requires adding sfr0_ctrl clock to device tree.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
---
 .../devicetree/bindings/mfd/samsung,exynos5433-lpass.txt       |  6 ++++++
 drivers/mfd/exynos-lpass.c                                     | 10 ++++++++++
 2 files changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
index a8deaee82c44..df664018c148 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
+++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
@@ -5,6 +5,10 @@ Required properties:
  - compatible		: "samsung,exynos5433-lpass"
  - reg			: should contain the LPASS top SFR region location
 			  and size
+ - clock-names		: should contain following required clocks: "sfr0_ctrl"
+ - clocks		: should contain clock specifiers of all clocks, which
+			  input names have been specified in clock-names
+			  property, in same order.
  - #address-cells	: should be 1
  - #size-cells		: should be 1
  - ranges		: must be present
@@ -24,6 +28,8 @@ Example:
 audio-subsystem {
 	compatible = "samsung,exynos5433-lpass";
 	reg = <0x11400000 0x100>, <0x11500000 0x08>;
+	clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
+	clock-names = "sfr0_ctrl";
 	#address-cells = <1>;
 	#size-cells = <1>;
 	ranges;
diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
index 17915daa2e80..be264988bdc9 100644
--- a/drivers/mfd/exynos-lpass.c
+++ b/drivers/mfd/exynos-lpass.c
@@ -14,6 +14,7 @@
  * only version 2 as published by the Free Software Foundation.
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/module.h>
@@ -52,6 +53,7 @@
 struct exynos_lpass {
 	/* pointer to the LPASS TOP regmap */
 	struct regmap *top;
+	struct clk *sfr0_clk;
 };
 
 static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask)
@@ -71,6 +73,8 @@ static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask)
 
 static void exynos_lpass_enable(struct exynos_lpass *lpass)
 {
+	clk_prepare_enable(lpass->sfr0_clk);
+
 	/* Unmask SFR, DMA and I2S interrupt */
 	regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK,
 		     LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
@@ -88,6 +92,8 @@ static void exynos_lpass_disable(struct exynos_lpass *lpass)
 	/* Mask any unmasked IP interrupt sources */
 	regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0);
 	regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0);
+
+	clk_disable_unprepare(lpass->sfr0_clk);
 }
 
 static const struct regmap_config exynos_lpass_reg_conf = {
@@ -114,6 +120,10 @@ static int exynos_lpass_probe(struct platform_device *pdev)
 	if (IS_ERR(base_top))
 		return PTR_ERR(base_top);
 
+	lpass->sfr0_clk = devm_clk_get(dev, "sfr0_ctrl");
+	if (IS_ERR(lpass->sfr0_clk))
+		return PTR_ERR(lpass->sfr0_clk);
+
 	lpass->top = regmap_init_mmio(dev, base_top,
 					&exynos_lpass_reg_conf);
 	if (IS_ERR(lpass->top)) {
-- 
1.9.1

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#1607238 — [PATCH v4 3/6] mfd: exynos-lpass: Remove pad retention control

FromMarek Szyprowski <m.szyprowski@samsung.com>
Date2017-03-23 09:10 +0100
Subject[PATCH v4 3/6] mfd: exynos-lpass: Remove pad retention control
Message-ID<to5YL-7Ts-57@gated-at.bofh.it>
In reply to#1607232
Pad retention should be controlled from pin control driver, so remove it
from Exynos LPASS driver. After this change, no more access to PMU regmap
is needed, so remove also the code for handling PMU regmap.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
---
 .../bindings/mfd/samsung,exynos5433-lpass.txt           |  2 --
 drivers/mfd/exynos-lpass.c                              | 17 -----------------
 include/linux/mfd/syscon/exynos5-pmu.h                  |  3 ---
 3 files changed, 22 deletions(-)

diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
index c110e118b79f..a8deaee82c44 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
+++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
@@ -5,7 +5,6 @@ Required properties:
  - compatible		: "samsung,exynos5433-lpass"
  - reg			: should contain the LPASS top SFR region location
 			  and size
- - samsung,pmu-syscon	: the phandle to the Power Management Unit node
  - #address-cells	: should be 1
  - #size-cells		: should be 1
  - ranges		: must be present
@@ -25,7 +24,6 @@ Example:
 audio-subsystem {
 	compatible = "samsung,exynos5433-lpass";
 	reg = <0x11400000 0x100>, <0x11500000 0x08>;
-	samsung,pmu-syscon = <&pmu_system_controller>;
 	#address-cells = <1>;
 	#size-cells = <1>;
 	ranges;
diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
index 2e064fb8826f..17915daa2e80 100644
--- a/drivers/mfd/exynos-lpass.c
+++ b/drivers/mfd/exynos-lpass.c
@@ -18,7 +18,6 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/mfd/syscon.h>
-#include <linux/mfd/syscon/exynos5-pmu.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
@@ -51,8 +50,6 @@
 #define  LPASS_INTR_SFR			BIT(0)
 
 struct exynos_lpass {
-	/* pointer to the Power Management Unit regmap */
-	struct regmap *pmu;
 	/* pointer to the LPASS TOP regmap */
 	struct regmap *top;
 };
@@ -81,10 +78,6 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
 	regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
 		     LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
 
-	/* Activate related PADs from retention state */
-	regmap_write(lpass->pmu, EXYNOS5433_PAD_RETENTION_AUD_OPTION,
-		     EXYNOS5433_PAD_INITIATE_WAKEUP_FROM_LOWPWR);
-
 	exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
 	exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
 	exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
@@ -95,9 +88,6 @@ static void exynos_lpass_disable(struct exynos_lpass *lpass)
 	/* Mask any unmasked IP interrupt sources */
 	regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0);
 	regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0);
-
-	/* Deactivate related PADs from retention state */
-	regmap_write(lpass->pmu, EXYNOS5433_PAD_RETENTION_AUD_OPTION, 0);
 }
 
 static const struct regmap_config exynos_lpass_reg_conf = {
@@ -131,13 +121,6 @@ static int exynos_lpass_probe(struct platform_device *pdev)
 		return PTR_ERR(lpass->top);
 	}
 
-	lpass->pmu = syscon_regmap_lookup_by_phandle(dev->of_node,
-						"samsung,pmu-syscon");
-	if (IS_ERR(lpass->pmu)) {
-		dev_err(dev, "Failed to lookup PMU regmap\n");
-		return PTR_ERR(lpass->pmu);
-	}
-
 	platform_set_drvdata(pdev, lpass);
 	exynos_lpass_enable(lpass);
 
diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h
index c28ff21ca4d2..0622ae86f9db 100644
--- a/include/linux/mfd/syscon/exynos5-pmu.h
+++ b/include/linux/mfd/syscon/exynos5-pmu.h
@@ -46,7 +46,4 @@
 #define EXYNOS5_MIPI_PHY_S_RESETN		BIT(1)
 #define EXYNOS5_MIPI_PHY_M_RESETN		BIT(2)
 
-#define EXYNOS5433_PAD_RETENTION_AUD_OPTION		(0x3028)
-#define EXYNOS5433_PAD_INITIATE_WAKEUP_FROM_LOWPWR	BIT(28)
-
 #endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */
-- 
1.9.1

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#1610472

FromLinus Walleij <linus.walleij@linaro.org>
Date2017-03-28 11:30 +0200
Message-ID<tpVBV-5sY-43@gated-at.bofh.it>
In reply to#1607232
On Thu, Mar 23, 2017 at 9:03 AM, Marek Szyprowski
<m.szyprowski@samsung.com> wrote:

> This patchset is a next step to add support for all power domains on
> Exynos5433 SoCs. This patchset contains patches for Exynos pin control
> driver and Exynos LPASS MFD driver, which are needed to make the
> platform ready for adding power domains support.
>
> Patches in this patchset have runtime dependency. They are order in such
> a way to make the changes bisectable (mfd lpass changes should be applied
> after pinctrl patches). Other dependencies mentioned previously in v3 of
> this patchset has been finally merged to v4.11-rc1.
>
> Patches have been rebased on top of linux v4.11-rc3.

Pinctrl development is based on -rc1.

I expect Krzysztof to figure out and apply the patches to his Samsung pinctrl
branch and forward to me, all looks OK to me.

Yours,
Linus Walleij

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#1610535

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-03-28 12:20 +0200
Message-ID<tpWoi-65Z-31@gated-at.bofh.it>
In reply to#1610472
On Tue, Mar 28, 2017 at 12:22 PM, Linus Walleij
<linus.walleij@linaro.org> wrote:
> On Thu, Mar 23, 2017 at 9:03 AM, Marek Szyprowski
> <m.szyprowski@samsung.com> wrote:
>
>> This patchset is a next step to add support for all power domains on
>> Exynos5433 SoCs. This patchset contains patches for Exynos pin control
>> driver and Exynos LPASS MFD driver, which are needed to make the
>> platform ready for adding power domains support.
>>
>> Patches in this patchset have runtime dependency. They are order in such
>> a way to make the changes bisectable (mfd lpass changes should be applied
>> after pinctrl patches). Other dependencies mentioned previously in v3 of
>> this patchset has been finally merged to v4.11-rc1.
>>
>> Patches have been rebased on top of linux v4.11-rc3.
>
> Pinctrl development is based on -rc1.
>
> I expect Krzysztof to figure out and apply the patches to his Samsung pinctrl
> branch and forward to me, all looks OK to me.

Yes, I already have them:
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git/log/?h=pinctrl-next

However this reminds me to prepare a pull request for mfd tree because
they base on top of it.

Best regards,
Krzysztof

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#1611121 — [GIT PULL] mfd: exynos-lpass: Pinctrl dependency

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-03-28 17:50 +0200
Subject[GIT PULL] mfd: exynos-lpass: Pinctrl dependency
Message-ID<tq1xE-1ho-29@gated-at.bofh.it>
In reply to#1607232
Hi Lee,


This is dependency for mfd/exynos-lpass driver changes from Marek Szyprowski.
That's a material for v4.12 and I will be pushing this later to Linus Walleij.


Best regards,
Krzysztof



The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:

  Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git tags/samsung-pinctrl-retention-4.12

for you to fetch changes up to e1d7eb0c8fc9c33ef60ac31172fb0fbb78c24271:

  pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs (2017-03-23 21:07:02 +0200)

----------------------------------------------------------------
Add retention control to Exynos5433 pinctrl driver, necessary for proper
handling of runtime Power Management of Exynos Audio SubSystem and effectively
allowing to power down the domain.

----------------------------------------------------------------
Marek Szyprowski (2):
      pinctrl: samsung: Ensure that pad retention is disabled on driver init
      pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs

 drivers/pinctrl/samsung/pinctrl-exynos.c | 63 ++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

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#1615062 — Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency

FromLee Jones <lee.jones@linaro.org>
Date2017-04-03 12:20 +0200
SubjectRe: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency
Message-ID<ts7fA-5wj-7@gated-at.bofh.it>
In reply to#1611121
On Tue, 28 Mar 2017, Krzysztof Kozlowski wrote:

> 
> Hi Lee,
> 
> 
> This is dependency for mfd/exynos-lpass driver changes from Marek Szyprowski.
> That's a material for v4.12 and I will be pushing this later to Linus Walleij.

This does not work, and *may* still break.

The only way to guarantee the order of the patches is to have them
*all* as part of the pull-request.  Not just some of them.

> The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
> 
>   Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git tags/samsung-pinctrl-retention-4.12
> 
> for you to fetch changes up to e1d7eb0c8fc9c33ef60ac31172fb0fbb78c24271:
> 
>   pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs (2017-03-23 21:07:02 +0200)
> 
> ----------------------------------------------------------------
> Add retention control to Exynos5433 pinctrl driver, necessary for proper
> handling of runtime Power Management of Exynos Audio SubSystem and effectively
> allowing to power down the domain.
> 
> ----------------------------------------------------------------
> Marek Szyprowski (2):
>       pinctrl: samsung: Ensure that pad retention is disabled on driver init
>       pinctrl: samsung: Add support for pad retention control for Exynos5433 SoCs
> 
>  drivers/pinctrl/samsung/pinctrl-exynos.c | 63 ++++++++++++++++++++++++++++++++
>  1 file changed, 63 insertions(+)

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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#1615775 — Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-04-04 10:30 +0200
SubjectRe: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency
Message-ID<tss0F-2lg-1@gated-at.bofh.it>
In reply to#1615062
On Mon, Apr 3, 2017 at 12:18 PM, Lee Jones <lee.jones@linaro.org> wrote:
> On Tue, 28 Mar 2017, Krzysztof Kozlowski wrote:
>
>>
>> Hi Lee,
>>
>>
>> This is dependency for mfd/exynos-lpass driver changes from Marek Szyprowski.
>> That's a material for v4.12 and I will be pushing this later to Linus Walleij.
>
> This does not work, and *may* still break.
>
> The only way to guarantee the order of the patches is to have them
> *all* as part of the pull-request.  Not just some of them.

What do you mean exactly? If these two patches come through my tree
first, then everything will work fine because they do not break any
other stuff.

If you pull it and apply the rest on top, then it should also work
without problems because your history will contain everything needed
in proper order.

In both cases bisectability is preserved. Did I missed something?

Best regards,
Krzysztof

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#1615843 — Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency

FromLee Jones <lee.jones@linaro.org>
Date2017-04-04 12:00 +0200
SubjectRe: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency
Message-ID<tstpL-39f-11@gated-at.bofh.it>
In reply to#1615775
On Tue, 04 Apr 2017, Krzysztof Kozlowski wrote:

> On Mon, Apr 3, 2017 at 12:18 PM, Lee Jones <lee.jones@linaro.org> wrote:
> > On Tue, 28 Mar 2017, Krzysztof Kozlowski wrote:
> >
> >>
> >> Hi Lee,
> >>
> >>
> >> This is dependency for mfd/exynos-lpass driver changes from Marek Szyprowski.
> >> That's a material for v4.12 and I will be pushing this later to Linus Walleij.
> >
> > This does not work, and *may* still break.
> >
> > The only way to guarantee the order of the patches is to have them
> > *all* as part of the pull-request.  Not just some of them.
> 
> What do you mean exactly? If these two patches come through my tree
> first, then everything will work fine because they do not break any
> other stuff.
> 
> If you pull it and apply the rest on top, then it should also work
> without problems because your history will contain everything needed
> in proper order.
> 
> In both cases bisectability is preserved. Did I missed something?

Okay, so you're suggesting that I rebase MFD *on-top* of your PR.  That
does work for me because I insist on being able to re-work my tree at
any time.  However, be aware that some Maintainers do not work this
way, thus *normally* you will have to send PR containing all of the
dependant patches.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

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#1615854 — Re: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency

FromKrzysztof Kozlowski <krzk@kernel.org>
Date2017-04-04 12:10 +0200
SubjectRe: [GIT PULL] mfd: exynos-lpass: Pinctrl dependency
Message-ID<tstzr-3rY-17@gated-at.bofh.it>
In reply to#1615843
On Tue, Apr 04, 2017 at 10:50:54AM +0100, Lee Jones wrote:
> On Tue, 04 Apr 2017, Krzysztof Kozlowski wrote:
> 
> > On Mon, Apr 3, 2017 at 12:18 PM, Lee Jones <lee.jones@linaro.org> wrote:
> > > On Tue, 28 Mar 2017, Krzysztof Kozlowski wrote:
> > >
> > >>
> > >> Hi Lee,
> > >>
> > >>
> > >> This is dependency for mfd/exynos-lpass driver changes from Marek Szyprowski.
> > >> That's a material for v4.12 and I will be pushing this later to Linus Walleij.
> > >
> > > This does not work, and *may* still break.
> > >
> > > The only way to guarantee the order of the patches is to have them
> > > *all* as part of the pull-request.  Not just some of them.
> > 
> > What do you mean exactly? If these two patches come through my tree
> > first, then everything will work fine because they do not break any
> > other stuff.
> > 
> > If you pull it and apply the rest on top, then it should also work
> > without problems because your history will contain everything needed
> > in proper order.
> > 
> > In both cases bisectability is preserved. Did I missed something?
> 
> Okay, so you're suggesting that I rebase MFD *on-top* of your PR.  That
> does work for me because I insist on being able to re-work my tree at
> any time.  However, be aware that some Maintainers do not work this
> way, thus *normally* you will have to send PR containing all of the
> dependant patches.

You could either rebased on top of this PR or merge it before applying
rest of patches. It does not matter because in both cases all dependant
patches will be after the dependency. Also in both cases you will be
sending them in your PR.

You can then rebase your stuff as well, keeping only the external
commits untouced and merged.

Really, that does not differ from all your stable immutable branches you
have been providing for other folks.


Best regards,
Krzysztof

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