Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1606557 > unrolled thread
| Started by | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| First post | 2017-03-22 15:20 +0100 |
| Last post | 2017-03-23 08:40 +0100 |
| Articles | 20 on this page of 33 — 2 participants |
Back to article view | Back to linux.kernel
[PATCH v2 00/53] mtd: nand: denali: 2nd round of Denali NAND IP patch bomb Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:20 +0100
[PATCH v2 10/53] mtd: nand: denali: fix erased page checking Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:20 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-22 21:40 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-23 08:40 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-23 09:10 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-22 22:00 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-23 08:40 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-23 09:00 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-24 03:50 +0100
Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-24 09:10 +0100
[PATCH v2 20/53] mtd: nand: denali: do not set mtd->name Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:20 +0100
Re: [PATCH v2 20/53] mtd: nand: denali: do not set mtd->name Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-27 17:40 +0200
[PATCH v2 18/53] mtd: nand: denali: use nand_chip to hold frequently accessed data Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:20 +0100
[PATCH v2 07/53] mtd: nand: denali: consolidate INTR_STATUS__* and INTR_EN__* macros Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:20 +0100
[PATCH v2 14/53] mtd: nand: denali: support 64bit capable DMA engine Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:20 +0100
[PATCH v2 02/53] mtd: nand: use read_oob() instead of cmdfunc() for bad block check Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 06/53] mtd: nand: denali: fix comment of denali_nand_info::flash_mem Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 19/53] mtd: nand: denali: call nand_set_flash_node() to set DT node Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 24/53] mtd: nand: denali: remove meaningless writes to read-only registers Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 03/53] mtd: nand: denali: remove unused CONFIG option and macros Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 01/53] mtd: nand: allow to set only one of ECC size and ECC strength from DT Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 21/53] mtd: nand: denali: move multi device fixup code to a helper function Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 11/53] mtd: nand: denali: fix bitflips calculation in handle_ecc() Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
Re: [PATCH v2 11/53] mtd: nand: denali: fix bitflips calculation in handle_ecc() Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-22 22:00 +0100
Re: [PATCH v2 11/53] mtd: nand: denali: fix bitflips calculation in handle_ecc() Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-23 08:40 +0100
Re: [PATCH v2 11/53] mtd: nand: denali: fix bitflips calculation in handle_ecc() Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-23 09:20 +0100
[PATCH v2 15/53] mtd: nand: denali_dt: remove dma-mask DT property Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
[PATCH v2 12/53] mtd: nand: denali: support HW_ECC_FIXUP capability Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-22 15:30 +0100
Re: [PATCH v2 12/53] mtd: nand: denali: support HW_ECC_FIXUP capability Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-22 22:10 +0100
Re: [PATCH v2 12/53] mtd: nand: denali: support HW_ECC_FIXUP capability Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-23 08:40 +0100
Re: [PATCH v2 12/53] mtd: nand: denali: support HW_ECC_FIXUP capability Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-23 09:30 +0100
Re: [PATCH v2 12/53] mtd: nand: denali: support HW_ECC_FIXUP capability Boris Brezillon <boris.brezillon@free-electrons.com> - 2017-03-22 22:20 +0100
Re: [PATCH v2 12/53] mtd: nand: denali: support HW_ECC_FIXUP capability Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-03-23 08:40 +0100
Page 1 of 2 [1] 2 Next page →
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:20 +0100 |
| Subject | [PATCH v2 00/53] mtd: nand: denali: 2nd round of Denali NAND IP patch bomb |
| Message-ID | <tnPhf-3Fu-3@gated-at.bofh.it> |
It took a couple months to update this series, but finally here is v2. (v1: https://lkml.org/lkml/2016/11/26/144 ) This driver includes many problems. One of the biggest one is a bunch of hard-coded parameters. This IP has many parameters that can be customized when a delivery RTL is generated. However, this driver was upstreamed by Intel, with Intel parameters hard-coded. Later, Altera added denali_dt.c to use this driver for embedded boards, but they did not fix the code in denali.c So, this driver has never worked. Even some DT bindings actually turned out wrong. There are more problems: [1] The driver just retrieves the OOB area as-is whereas the controller uses syndrome page layout. [2] Many NAND chip specific parameters are hard-coded in the driver. [3] ONFi devices are not working [4] It can not read Bad Block Marker This patch series intends to solve those problems. Since v1, here are more fixes/improvements: - Fix raw/oob callbacks for syndrome page layout - Implement setup_data_interface() callback - Fix/implement more commands for ONFi devices - Allow to skip the driver internal bounce buffer - Support PIO in case DMA is not supported - Switch from ->cmdfunc over to ->cmd_ctrl Masahiro Yamada (53): mtd: nand: allow to set only one of ECC size and ECC strength from DT mtd: nand: use read_oob() instead of cmdfunc() for bad block check mtd: nand: denali: remove unused CONFIG option and macros mtd: nand: denali: remove redundant define of BANK(x) mtd: nand: denali: remove more unused struct members mtd: nand: denali: fix comment of denali_nand_info::flash_mem mtd: nand: denali: consolidate INTR_STATUS__* and INTR_EN__* macros mtd: nand: denali: introduce capability flag mtd: nand: denali: use int where no reason to use fixed width variable mtd: nand: denali: fix erased page checking mtd: nand: denali: fix bitflips calculation in handle_ecc() mtd: nand: denali: support HW_ECC_FIXUP capability mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant mtd: nand: denali: support 64bit capable DMA engine mtd: nand: denali_dt: remove dma-mask DT property mtd: nand: denali_dt: use pdev instead of ofdev for platform_device mtd: nand: denali: allow to override revision number mtd: nand: denali: use nand_chip to hold frequently accessed data mtd: nand: denali: call nand_set_flash_node() to set DT node mtd: nand: denali: do not set mtd->name mtd: nand: denali: move multi device fixup code to a helper function mtd: nand: denali: simplify multi device fixup code mtd: nand: denali: set DEVICES_CONNECTED 1 if not set mtd: nand: denali: remove meaningless writes to read-only registers mtd: nand: denali: remove unnecessary writes to ECC_CORRECTION mtd: nand: denali: support 1024 byte ECC step size mtd: nand: denali: avoid hard-coding ecc.strength and ecc.bytes mtd: nand: denali: support "nand-ecc-strength" DT property mtd: nand: denali: remove Toshiba and Hynix specific fixup code mtd: nand: denali_dt: add compatible strings for UniPhier SoC variants mtd: nand: denali: set NAND_ECC_CUSTOM_PAGE_ACCESS mtd: nand: denali: do not propagate NAND_STATUS_FAIL to waitfunc() mtd: nand: denali: use BIT() and GENMASK() for register macros mtd: nand: denali: remove unneeded find_valid_banks() mtd: nand: denali: handle timing parameters by setup_data_interface() mtd: nand: denali: remove meaningless pipeline read-ahead operation mtd: nand: denali: rework interrupt handling mtd: nand: denali: fix NAND_CMD_STATUS handling mtd: nand: denali: fix NAND_CMD_PARAM handling mtd: nand: do not check R/B# for CMD_READID in nand_command(_lp) mtd: nand: do not check R/B# for CMD_SET_FEATURES in nand_command(_lp) mtd: nand: denali: switch over to cmd_ctrl instead of cmdfunc mtd: nand: denali: fix bank reset function mtd: nand: denali: use interrupt instead of polling for bank reset mtd: nand: denali: propagate page to helpers via function argument mtd: nand: denali: merge struct nand_buf into struct denali_nand_info mtd: nand: denali: use flag instead of register macro for direction mtd: nand: denali: fix raw and oob accessors for syndrome page layout mtd: nand: denali: support hardware-assisted erased page detection mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset mtd: nand: denali: skip driver internal bounce buffer when possible mtd: nand: denali: use non-managed kmalloc() for DMA buffer mtd: nand: denali: enable bad block table scan .../devicetree/bindings/mtd/denali-nand.txt | 24 +- drivers/mtd/nand/Kconfig | 11 - drivers/mtd/nand/denali.c | 2073 +++++++++----------- drivers/mtd/nand/denali.h | 453 ++--- drivers/mtd/nand/denali_dt.c | 104 +- drivers/mtd/nand/denali_pci.c | 10 +- drivers/mtd/nand/nand_base.c | 78 +- 7 files changed, 1278 insertions(+), 1475 deletions(-) -- 2.7.4
[toc] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:20 +0100 |
| Subject | [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <tnPhh-3Fu-63@gated-at.bofh.it> |
| In reply to | #1606557 |
This part is wrong in multiple ways:
[1] is_erased() is called against "buf" twice, so the second one is
meaningless. The second call should check chip->oob_poi.
[2] This code block is nested by double "if (check_erase_page)".
The inner one is redundant.
[3] Erased page checking without threshold is false-positive.
Basically, there are two ways for erased page checking:
- read the whole of page + oob in raw transfer, then check if all
the data are 0xFF.
- read the ECC-corrected page + oob, then check if *almost* all the
data are 0xFF (bit-flips less than ecc.strength are allowed)
While here, it checks if all data in ECC-corrected page are 0xFF.
This is too strong because not all of the data are 0xFF after they
are manipulated by the ECC engine. Proper threshold must be taken
into account to avoid false-positive ecc_stats.failed increments.
[4] positive return value for uncorrectable bitflips
The comment of ecc->read_page() says it should return "0 if bitflips
uncorrectable", but the current code could return a positive value
in the case.
This commit solves the problems above. The nand framework provides
a helper nand_check_erased_ecc_chunk() for erased page check with
threshold. The driver's own helper is unneeded.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2:
- Squash some patches into one.
- Use nand_check_erased_ecc_chunk() with threshold
drivers/mtd/nand/denali.c | 29 ++++++++++-------------------
1 file changed, 10 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 2c59eb3..86381ac 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -883,19 +883,6 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
}
}
-/*
- * this function examines buffers to see if they contain data that
- * indicate that the buffer is part of an erased region of flash.
- */
-static bool is_erased(uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- if (buf[i] != 0xFF)
- return false;
- return true;
-}
#define ECC_SECTOR_SIZE 512
#define ECC_SECTOR(x) (((x) & ECC_ERROR_ADDRESS__SECTOR_NR) >> 12)
@@ -1119,6 +1106,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
uint32_t irq_status;
uint32_t irq_mask = INTR__ECC_TRANSACTION_DONE | INTR__ECC_ERR;
bool check_erased_page = false;
+ int stat;
if (page != denali->page) {
dev_err(denali->dev,
@@ -1148,12 +1136,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
if (check_erased_page) {
read_oob_data(mtd, chip->oob_poi, denali->page);
- /* check ECC failures that may have occurred on erased pages */
- if (check_erased_page) {
- if (!is_erased(buf, mtd->writesize))
- mtd->ecc_stats.failed++;
- if (!is_erased(buf, mtd->oobsize))
- mtd->ecc_stats.failed++;
+ stat = nand_check_erased_ecc_chunk(
+ buf, mtd->writesize,
+ chip->oob_poi, mtd->oobsize,
+ NULL, 0,
+ chip->ecc.strength * chip->ecc.steps);
+ if (stat < 0) {
+ mtd->ecc_stats.failed++;
+ /* return 0 for uncorrectable bitflips */
+ max_bitflips = 0;
}
}
return max_bitflips;
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Boris Brezillon <boris.brezillon@free-electrons.com> |
|---|---|
| Date | 2017-03-22 21:40 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <tnVd0-8hP-27@gated-at.bofh.it> |
| In reply to | #1606559 |
On Wed, 22 Mar 2017 23:07:17 +0900 Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > This part is wrong in multiple ways: > > [1] is_erased() is called against "buf" twice, so the second one is > meaningless. The second call should check chip->oob_poi. > > [2] This code block is nested by double "if (check_erase_page)". > The inner one is redundant. > > [3] Erased page checking without threshold is false-positive. > Basically, there are two ways for erased page checking: > - read the whole of page + oob in raw transfer, then check if all > the data are 0xFF. > - read the ECC-corrected page + oob, then check if *almost* all the > data are 0xFF (bit-flips less than ecc.strength are allowed) > While here, it checks if all data in ECC-corrected page are 0xFF. > This is too strong because not all of the data are 0xFF after they > are manipulated by the ECC engine. Proper threshold must be taken > into account to avoid false-positive ecc_stats.failed increments. Hm, the ECC engine should not introduce extra bitflips. I've seen 3 different cases in the various ECC engine I worked with: 1/ the ECC engine is able to correct bitflips in erased pages. In this case you should trust it and return the number of corrected bitflips or increment the ECC failed counter if it reports uncorrectable errors. 2/ the ECC engine is able to detect erased pages, but fails to detect those containing bitflips in it. In this case, you should rely on the default "empty page" detection and only manually check if the page is almost filled with 0xff when an error is reported. 3/ the ECC engine does not detect empty pages at all. In this case, you should check if the page empty (or almost empty) each time an ECC error is reported In any case, if the ECC engine reports uncorrectable errors, it should keep the data untouched, which means you don't have to re-read the whole page in raw mode, only the OOB bytes. > > [4] positive return value for uncorrectable bitflips > > The comment of ecc->read_page() says it should return "0 if bitflips > uncorrectable", but the current code could return a positive value > in the case. This one should probably be fixed in the core. Returning a negative error core for uncorrectable errors is forbidden, but reporting the maximum number of bitflips that have been corrected in each valid ECC sector of the page (even if the page contains uncorrectable sectors) does not sound like a bad idea to me. The reason the core asks drivers to return 0 in case of uncorrectable errors is because it updates the max_bitflips variable before testing if the page contains uncorrectable errors [1]. Moving this statement here [2] (in an else branch) should solve the problem for all drivers returning positive numbers even when uncorrectable errors are detected in one of the ECC chunk contained in a page. [1]http://lxr.free-electrons.com/source/drivers/mtd/nand/nand_base.c#L1999 [2]http://lxr.free-electrons.com/source/drivers/mtd/nand/nand_base.c#L2048
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-23 08:40 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <to5vK-7s8-53@gated-at.bofh.it> |
| In reply to | #1607009 |
Hi Boris, 2017-03-23 5:36 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>: > On Wed, 22 Mar 2017 23:07:17 +0900 > Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > >> This part is wrong in multiple ways: >> >> [1] is_erased() is called against "buf" twice, so the second one is >> meaningless. The second call should check chip->oob_poi. >> >> [2] This code block is nested by double "if (check_erase_page)". >> The inner one is redundant. >> >> [3] Erased page checking without threshold is false-positive. >> Basically, there are two ways for erased page checking: >> - read the whole of page + oob in raw transfer, then check if all >> the data are 0xFF. >> - read the ECC-corrected page + oob, then check if *almost* all the >> data are 0xFF (bit-flips less than ecc.strength are allowed) >> While here, it checks if all data in ECC-corrected page are 0xFF. >> This is too strong because not all of the data are 0xFF after they >> are manipulated by the ECC engine. Proper threshold must be taken >> into account to avoid false-positive ecc_stats.failed increments. > > Hm, the ECC engine should not introduce extra bitflips. I've seen 3 > different cases in the various ECC engine I worked with: > > 1/ the ECC engine is able to correct bitflips in erased pages. In this > case you should trust it and return the number of corrected > bitflips or increment the ECC failed counter if it reports > uncorrectable errors. > 2/ the ECC engine is able to detect erased pages, but fails to detect > those containing bitflips in it. In this case, you should rely on > the default "empty page" detection and only manually check if the > page is almost filled with 0xff when an error is reported. > 3/ the ECC engine does not detect empty pages at all. In this case, you > should check if the page empty (or almost empty) each time an ECC > error is reported I think the Denali is case 3. But, very new versions of this IP support erased page detection by hardware. Please see 49/53: http://patchwork.ozlabs.org/patch/742414/ Unfortunately this feature is not exactly what we want. We want to detect per-sector empty'ness, but this features is actually page oriented. If you are unhappy about this, it is possible to always turn off this feature and use software detection (with nand_check_erased_ecc_chunk) > In any case, if the ECC engine reports uncorrectable errors, it should > keep the data untouched, which means you don't have to re-read the whole > page in raw mode, only the OOB bytes. OK. We should respect the result from the ECC engine, but we still need to fill the buffer with 0xff if the page turned out to be empty. (nand_check_erased_ecc_chunk() does this for us.) >> >> [4] positive return value for uncorrectable bitflips >> >> The comment of ecc->read_page() says it should return "0 if bitflips >> uncorrectable", but the current code could return a positive value >> in the case. > > This one should probably be fixed in the core. Returning a negative > error core for uncorrectable errors is forbidden, but reporting the > maximum number of bitflips that have been corrected in each valid > ECC sector of the page (even if the page contains uncorrectable > sectors) does not sound like a bad idea to me. > > The reason the core asks drivers to return 0 in case of uncorrectable > errors is because it updates the max_bitflips variable before testing > if the page contains uncorrectable errors [1]. Moving this statement > here [2] (in an else branch) should solve the problem for all drivers > returning positive numbers even when uncorrectable errors are detected > in one of the ECC chunk contained in a page. I understood your idea, but do you want this change in this series? -- Best Regards Masahiro Yamada
[toc] | [prev] | [next] | [standalone]
| From | Boris Brezillon <boris.brezillon@free-electrons.com> |
|---|---|
| Date | 2017-03-23 09:10 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <to5YJ-7Ts-5@gated-at.bofh.it> |
| In reply to | #1607197 |
On Thu, 23 Mar 2017 14:15:59 +0900 Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > Hi Boris, > > > 2017-03-23 5:36 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>: > > On Wed, 22 Mar 2017 23:07:17 +0900 > > Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > > > >> This part is wrong in multiple ways: > >> > >> [1] is_erased() is called against "buf" twice, so the second one is > >> meaningless. The second call should check chip->oob_poi. > >> > >> [2] This code block is nested by double "if (check_erase_page)". > >> The inner one is redundant. > >> > >> [3] Erased page checking without threshold is false-positive. > >> Basically, there are two ways for erased page checking: > >> - read the whole of page + oob in raw transfer, then check if all > >> the data are 0xFF. > >> - read the ECC-corrected page + oob, then check if *almost* all the > >> data are 0xFF (bit-flips less than ecc.strength are allowed) > >> While here, it checks if all data in ECC-corrected page are 0xFF. > >> This is too strong because not all of the data are 0xFF after they > >> are manipulated by the ECC engine. Proper threshold must be taken > >> into account to avoid false-positive ecc_stats.failed increments. > > > > Hm, the ECC engine should not introduce extra bitflips. I've seen 3 > > different cases in the various ECC engine I worked with: > > > > 1/ the ECC engine is able to correct bitflips in erased pages. In this > > case you should trust it and return the number of corrected > > bitflips or increment the ECC failed counter if it reports > > uncorrectable errors. > > 2/ the ECC engine is able to detect erased pages, but fails to detect > > those containing bitflips in it. In this case, you should rely on > > the default "empty page" detection and only manually check if the > > page is almost filled with 0xff when an error is reported. > > 3/ the ECC engine does not detect empty pages at all. In this case, you > > should check if the page empty (or almost empty) each time an ECC > > error is reported > > > I think the Denali is case 3. > But, very new versions of this IP support erased page detection by hardware. > Please see 49/53: > http://patchwork.ozlabs.org/patch/742414/ > > Unfortunately this feature is not exactly what we want. > We want to detect per-sector empty'ness, > but this features is actually page oriented. > > If you are unhappy about this, > it is possible to always turn off this feature > and use software detection (with nand_check_erased_ecc_chunk) As long as the engine reports the maximum number of bitflips-per-ECC-chunk we're good. Of course, if you have an uncorrectable error reported and your engine does not tell you in which chunk(s) this happened, you'll have to call nand_check_erased_ecc_chunk() on all chunks, but that should be fine. > > > > > In any case, if the ECC engine reports uncorrectable errors, it should > > keep the data untouched, which means you don't have to re-read the whole > > page in raw mode, only the OOB bytes. > > > OK. We should respect the result from the ECC engine, > but we still need to fill the buffer with 0xff > if the page turned out to be empty. > (nand_check_erased_ecc_chunk() does this for us.) Yes, calling nand_check_erased_ecc_chunk() is still needed. > > > > > > >> > >> [4] positive return value for uncorrectable bitflips > >> > >> The comment of ecc->read_page() says it should return "0 if bitflips > >> uncorrectable", but the current code could return a positive value > >> in the case. > > > > This one should probably be fixed in the core. Returning a negative > > error core for uncorrectable errors is forbidden, but reporting the > > maximum number of bitflips that have been corrected in each valid > > ECC sector of the page (even if the page contains uncorrectable > > sectors) does not sound like a bad idea to me. > > > > The reason the core asks drivers to return 0 in case of uncorrectable > > errors is because it updates the max_bitflips variable before testing > > if the page contains uncorrectable errors [1]. Moving this statement > > here [2] (in an else branch) should solve the problem for all drivers > > returning positive numbers even when uncorrectable errors are detected > > in one of the ECC chunk contained in a page. > > > I understood your idea, but do you want this change in this series? Not necessarily, but I'm pretty sure other drivers are doing the same mistake, so we'd better fix it in one place and stop requiring drivers to return 0 if at least one ECC chunk is uncorrectable in the page.
[toc] | [prev] | [next] | [standalone]
| From | Boris Brezillon <boris.brezillon@free-electrons.com> |
|---|---|
| Date | 2017-03-22 22:00 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <tnVwl-8pR-9@gated-at.bofh.it> |
| In reply to | #1606559 |
On Wed, 22 Mar 2017 23:07:17 +0900
Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> dev_err(denali->dev,
> @@ -1148,12 +1136,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
> if (check_erased_page) {
> read_oob_data(mtd, chip->oob_poi, denali->page);
>
> - /* check ECC failures that may have occurred on erased pages */
> - if (check_erased_page) {
> - if (!is_erased(buf, mtd->writesize))
> - mtd->ecc_stats.failed++;
> - if (!is_erased(buf, mtd->oobsize))
> - mtd->ecc_stats.failed++;
> + stat = nand_check_erased_ecc_chunk(
> + buf, mtd->writesize,
> + chip->oob_poi, mtd->oobsize,
> + NULL, 0,
> + chip->ecc.strength * chip->ecc.steps);
That's not how it's supposed to be done. Each chunk should be checked
independently. Here is a simple example explaining why this is
important:
Let's consider the following setup:
- 4k pages
- 16bits/1024bytes ECC
With your approach, you turn this into:
- 4k pages
- 64bits/4096bytes ECC
Now suppose you have 32 bitflips in the first 1024 bytes. The real ECC
config is expected to report uncorrectable errors, but your approach
will just report that 32 bits have been fixed, which is wrong.
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-23 08:40 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <to5vI-7s8-7@gated-at.bofh.it> |
| In reply to | #1607017 |
Hi Boris,
2017-03-23 5:56 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>:
> On Wed, 22 Mar 2017 23:07:17 +0900
> Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
>> dev_err(denali->dev,
>> @@ -1148,12 +1136,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
>> if (check_erased_page) {
>> read_oob_data(mtd, chip->oob_poi, denali->page);
>>
>> - /* check ECC failures that may have occurred on erased pages */
>> - if (check_erased_page) {
>> - if (!is_erased(buf, mtd->writesize))
>> - mtd->ecc_stats.failed++;
>> - if (!is_erased(buf, mtd->oobsize))
>> - mtd->ecc_stats.failed++;
>> + stat = nand_check_erased_ecc_chunk(
>> + buf, mtd->writesize,
>> + chip->oob_poi, mtd->oobsize,
>> + NULL, 0,
>> + chip->ecc.strength * chip->ecc.steps);
>
> That's not how it's supposed to be done. Each chunk should be checked
> independently. Here is a simple example explaining why this is
> important:
>
> Let's consider the following setup:
> - 4k pages
> - 16bits/1024bytes ECC
>
> With your approach, you turn this into:
> - 4k pages
> - 64bits/4096bytes ECC
>
> Now suppose you have 32 bitflips in the first 1024 bytes. The real ECC
> config is expected to report uncorrectable errors, but your approach
> will just report that 32 bits have been fixed, which is wrong.
OK. How about adding a helper like follows:
static int denali_check_erased_page(struct mtd_info *mtd,
struct nand_chip *chip, uint8_t *buf)
{
uint8_t *ecc_code = chip->buffers->ecccode;
int ecc_steps = chip->ecc.steps;
int ecc_size = chip->ecc.size;
int ecc_bytes = chip->ecc.bytes;
int i, ret;
ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
chip->ecc.total);
if (ret)
return ret;
for (i = 0; i < ecc_steps; i++) {
ret = nand_check_erased_ecc_chunk(buf, ecc_size,
ecc_code, ecc_bytes,
NULL, 0,
chip->ecc.strength);
if (ret < 0)
return ret;
buf += ecc_size;
ecc_code += ecc_bytes;
}
return 0;
}
Then,
stat = denali_check_erased_page(mtd, chip, buf);
if (stat < 0) {
mtd->ecc_stats.failed++;
/* return 0 for uncorrectable bitflips */
stat = 0;
}
--
Best Regards
Masahiro Yamada
[toc] | [prev] | [next] | [standalone]
| From | Boris Brezillon <boris.brezillon@free-electrons.com> |
|---|---|
| Date | 2017-03-23 09:00 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <to5P3-7B0-7@gated-at.bofh.it> |
| In reply to | #1607180 |
On Thu, 23 Mar 2017 14:04:44 +0900
Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> Hi Boris,
>
> 2017-03-23 5:56 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>:
> > On Wed, 22 Mar 2017 23:07:17 +0900
> > Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> >> dev_err(denali->dev,
> >> @@ -1148,12 +1136,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
> >> if (check_erased_page) {
> >> read_oob_data(mtd, chip->oob_poi, denali->page);
> >>
> >> - /* check ECC failures that may have occurred on erased pages */
> >> - if (check_erased_page) {
> >> - if (!is_erased(buf, mtd->writesize))
> >> - mtd->ecc_stats.failed++;
> >> - if (!is_erased(buf, mtd->oobsize))
> >> - mtd->ecc_stats.failed++;
> >> + stat = nand_check_erased_ecc_chunk(
> >> + buf, mtd->writesize,
> >> + chip->oob_poi, mtd->oobsize,
> >> + NULL, 0,
> >> + chip->ecc.strength * chip->ecc.steps);
> >
> > That's not how it's supposed to be done. Each chunk should be checked
> > independently. Here is a simple example explaining why this is
> > important:
> >
> > Let's consider the following setup:
> > - 4k pages
> > - 16bits/1024bytes ECC
> >
> > With your approach, you turn this into:
> > - 4k pages
> > - 64bits/4096bytes ECC
> >
> > Now suppose you have 32 bitflips in the first 1024 bytes. The real ECC
> > config is expected to report uncorrectable errors, but your approach
> > will just report that 32 bits have been fixed, which is wrong.
>
>
> OK. How about adding a helper like follows:
>
> static int denali_check_erased_page(struct mtd_info *mtd,
> struct nand_chip *chip, uint8_t *buf)
> {
> uint8_t *ecc_code = chip->buffers->ecccode;
> int ecc_steps = chip->ecc.steps;
> int ecc_size = chip->ecc.size;
> int ecc_bytes = chip->ecc.bytes;
> int i, ret;
>
> ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
> chip->ecc.total);
> if (ret)
> return ret;
>
> for (i = 0; i < ecc_steps; i++) {
> ret = nand_check_erased_ecc_chunk(buf, ecc_size,
> ecc_code, ecc_bytes,
> NULL, 0,
> chip->ecc.strength);
> if (ret < 0)
> return ret;
> buf += ecc_size;
> ecc_code += ecc_bytes;
> }
>
> return 0;
> }
>
>
>
> Then,
>
> stat = denali_check_erased_page(mtd, chip, buf);
> if (stat < 0) {
> mtd->ecc_stats.failed++;
> /* return 0 for uncorrectable bitflips */
> stat = 0;
> }
What's the point of checking all ECC chunks if only one contains ECC
errors? I really recommend to put the nand_check_erased_ecc_chunk()
call next to the per-ECC-block correction test.
Also, mtd->ecc_stats.failed is supposed to be incremented each time an
uncorrectable error is detected. In your denali_sw_ecc_fixup()
implementation you can detect errors at the ECC chunk level, so you
should increment ecc_stats.failed for each failure and not once if at
least one chunk is faulty.
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-24 03:50 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <tonsB-3c4-3@gated-at.bofh.it> |
| In reply to | #1607219 |
Hi Boris,
2017-03-23 16:56 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>:
> On Thu, 23 Mar 2017 14:04:44 +0900
> Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
>
>> Hi Boris,
>>
>> 2017-03-23 5:56 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>:
>> > On Wed, 22 Mar 2017 23:07:17 +0900
>> > Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
>> >> dev_err(denali->dev,
>> >> @@ -1148,12 +1136,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
>> >> if (check_erased_page) {
>> >> read_oob_data(mtd, chip->oob_poi, denali->page);
>> >>
>> >> - /* check ECC failures that may have occurred on erased pages */
>> >> - if (check_erased_page) {
>> >> - if (!is_erased(buf, mtd->writesize))
>> >> - mtd->ecc_stats.failed++;
>> >> - if (!is_erased(buf, mtd->oobsize))
>> >> - mtd->ecc_stats.failed++;
>> >> + stat = nand_check_erased_ecc_chunk(
>> >> + buf, mtd->writesize,
>> >> + chip->oob_poi, mtd->oobsize,
>> >> + NULL, 0,
>> >> + chip->ecc.strength * chip->ecc.steps);
>> >
>> > That's not how it's supposed to be done. Each chunk should be checked
>> > independently. Here is a simple example explaining why this is
>> > important:
>> >
>> > Let's consider the following setup:
>> > - 4k pages
>> > - 16bits/1024bytes ECC
>> >
>> > With your approach, you turn this into:
>> > - 4k pages
>> > - 64bits/4096bytes ECC
>> >
>> > Now suppose you have 32 bitflips in the first 1024 bytes. The real ECC
>> > config is expected to report uncorrectable errors, but your approach
>> > will just report that 32 bits have been fixed, which is wrong.
>>
>>
>> OK. How about adding a helper like follows:
>>
>> static int denali_check_erased_page(struct mtd_info *mtd,
>> struct nand_chip *chip, uint8_t *buf)
>> {
>> uint8_t *ecc_code = chip->buffers->ecccode;
>> int ecc_steps = chip->ecc.steps;
>> int ecc_size = chip->ecc.size;
>> int ecc_bytes = chip->ecc.bytes;
>> int i, ret;
>>
>> ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
>> chip->ecc.total);
>> if (ret)
>> return ret;
>>
>> for (i = 0; i < ecc_steps; i++) {
>> ret = nand_check_erased_ecc_chunk(buf, ecc_size,
>> ecc_code, ecc_bytes,
>> NULL, 0,
>> chip->ecc.strength);
>> if (ret < 0)
>> return ret;
>> buf += ecc_size;
>> ecc_code += ecc_bytes;
>> }
>>
>> return 0;
>> }
>>
>>
>>
>> Then,
>>
>> stat = denali_check_erased_page(mtd, chip, buf);
>> if (stat < 0) {
>> mtd->ecc_stats.failed++;
>> /* return 0 for uncorrectable bitflips */
>> stat = 0;
>> }
>
> What's the point of checking all ECC chunks if only one contains ECC
> errors? I really recommend to put the nand_check_erased_ecc_chunk()
> call next to the per-ECC-block correction test.
OK. I can fix it for software ECC fixup.
What should I do for hardware ECC fixup case?
http://patchwork.ozlabs.org/patch/742321/
If at least one ECC sector fails to correct bit-flips,
the controller sets INTR__ECC_UNCOR_ERR flag.
In this case, we can not know the number of uncorrectable errors.
Possible solutions are:
- Increment ecc_stats.failed only by one (compromised solution)
- If the controller IP supports sub-page read,
transfer sectors once again, one by one, checking the register
flag each time.
As far as I see, there are three cases.
[1] SW ECC fixup (Intel)
This can be fixed
[2] HW ECC fixup is supported, but sub-page read is not supported
(old UniPhier SoCs, probably SOCFPGA too)
[3] HW ECC fixup is supported, and sub-page read is supported as well
(new UniPhier SoCs)
I do not know how to precisely increment
ecc_stats.failed and ecc_stats.corrected for [2].
As for [3], we can solve the issue by making more efforts,
but I am not sure this effort is worthwhile.
> Also, mtd->ecc_stats.failed is supposed to be incremented each time an
> uncorrectable error is detected. In your denali_sw_ecc_fixup()
> implementation you can detect errors at the ECC chunk level, so you
> should increment ecc_stats.failed for each failure and not once if at
> least one chunk is faulty.
Yes, I can do this for denali_sw_ecc_fixup().
Can I ask what disadvantage would happen
if ecc_stats.failed / .corrected is incremented only by one,
where actually errors happen in multiple sectors.
--
Best Regards
Masahiro Yamada
[toc] | [prev] | [next] | [standalone]
| From | Boris Brezillon <boris.brezillon@free-electrons.com> |
|---|---|
| Date | 2017-03-24 09:10 +0100 |
| Subject | Re: [PATCH v2 10/53] mtd: nand: denali: fix erased page checking |
| Message-ID | <tossi-74W-17@gated-at.bofh.it> |
| In reply to | #1608091 |
On Fri, 24 Mar 2017 11:43:43 +0900
Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> Hi Boris,
>
>
> 2017-03-23 16:56 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>:
> > On Thu, 23 Mar 2017 14:04:44 +0900
> > Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> >
> >> Hi Boris,
> >>
> >> 2017-03-23 5:56 GMT+09:00 Boris Brezillon <boris.brezillon@free-electrons.com>:
> >> > On Wed, 22 Mar 2017 23:07:17 +0900
> >> > Masahiro Yamada <yamada.masahiro@socionext.com> wrote:
> >> >> dev_err(denali->dev,
> >> >> @@ -1148,12 +1136,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
> >> >> if (check_erased_page) {
> >> >> read_oob_data(mtd, chip->oob_poi, denali->page);
> >> >>
> >> >> - /* check ECC failures that may have occurred on erased pages */
> >> >> - if (check_erased_page) {
> >> >> - if (!is_erased(buf, mtd->writesize))
> >> >> - mtd->ecc_stats.failed++;
> >> >> - if (!is_erased(buf, mtd->oobsize))
> >> >> - mtd->ecc_stats.failed++;
> >> >> + stat = nand_check_erased_ecc_chunk(
> >> >> + buf, mtd->writesize,
> >> >> + chip->oob_poi, mtd->oobsize,
> >> >> + NULL, 0,
> >> >> + chip->ecc.strength * chip->ecc.steps);
> >> >
> >> > That's not how it's supposed to be done. Each chunk should be checked
> >> > independently. Here is a simple example explaining why this is
> >> > important:
> >> >
> >> > Let's consider the following setup:
> >> > - 4k pages
> >> > - 16bits/1024bytes ECC
> >> >
> >> > With your approach, you turn this into:
> >> > - 4k pages
> >> > - 64bits/4096bytes ECC
> >> >
> >> > Now suppose you have 32 bitflips in the first 1024 bytes. The real ECC
> >> > config is expected to report uncorrectable errors, but your approach
> >> > will just report that 32 bits have been fixed, which is wrong.
> >>
> >>
> >> OK. How about adding a helper like follows:
> >>
> >> static int denali_check_erased_page(struct mtd_info *mtd,
> >> struct nand_chip *chip, uint8_t *buf)
> >> {
> >> uint8_t *ecc_code = chip->buffers->ecccode;
> >> int ecc_steps = chip->ecc.steps;
> >> int ecc_size = chip->ecc.size;
> >> int ecc_bytes = chip->ecc.bytes;
> >> int i, ret;
> >>
> >> ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,
> >> chip->ecc.total);
> >> if (ret)
> >> return ret;
> >>
> >> for (i = 0; i < ecc_steps; i++) {
> >> ret = nand_check_erased_ecc_chunk(buf, ecc_size,
> >> ecc_code, ecc_bytes,
> >> NULL, 0,
> >> chip->ecc.strength);
> >> if (ret < 0)
> >> return ret;
> >> buf += ecc_size;
> >> ecc_code += ecc_bytes;
> >> }
> >>
> >> return 0;
> >> }
> >>
> >>
> >>
> >> Then,
> >>
> >> stat = denali_check_erased_page(mtd, chip, buf);
> >> if (stat < 0) {
> >> mtd->ecc_stats.failed++;
> >> /* return 0 for uncorrectable bitflips */
> >> stat = 0;
> >> }
> >
> > What's the point of checking all ECC chunks if only one contains ECC
> > errors? I really recommend to put the nand_check_erased_ecc_chunk()
> > call next to the per-ECC-block correction test.
>
>
> OK. I can fix it for software ECC fixup.
>
>
> What should I do for hardware ECC fixup case?
> http://patchwork.ozlabs.org/patch/742321/
>
>
> If at least one ECC sector fails to correct bit-flips,
> the controller sets INTR__ECC_UNCOR_ERR flag.
>
>
> In this case, we can not know the number of uncorrectable errors.
>
> Possible solutions are:
>
> - Increment ecc_stats.failed only by one (compromised solution)
Let's go for this solution.
>
>
> > Also, mtd->ecc_stats.failed is supposed to be incremented each time an
> > uncorrectable error is detected. In your denali_sw_ecc_fixup()
> > implementation you can detect errors at the ECC chunk level, so you
> > should increment ecc_stats.failed for each failure and not once if at
> > least one chunk is faulty.
>
>
> Yes, I can do this for denali_sw_ecc_fixup().
>
> Can I ask what disadvantage would happen
> if ecc_stats.failed / .corrected is incremented only by one,
> where actually errors happen in multiple sectors.
Reporting wrong stats, which is not such a big deal, but let's try to
keep them correct when we can (the SW ECC fixup case).
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:20 +0100 |
| Subject | [PATCH v2 20/53] mtd: nand: denali: do not set mtd->name |
| Message-ID | <tnPhh-3Fu-65@gated-at.bofh.it> |
| In reply to | #1606557 |
This will be filled by nand_scan_ident() later. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- Changes in v2: None drivers/mtd/nand/denali.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 3badb1d..1706975 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1495,7 +1495,6 @@ int denali_init(struct denali_nand_info *denali) /* now that our ISR is registered, we can enable interrupts */ denali_set_intr_modes(denali, true); - mtd->name = "denali-nand"; nand_set_flash_node(chip, denali->dev->of_node); /* register the driver with the NAND core subsystem */ -- 2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Boris Brezillon <boris.brezillon@free-electrons.com> |
|---|---|
| Date | 2017-03-27 17:40 +0200 |
| Subject | Re: [PATCH v2 20/53] mtd: nand: denali: do not set mtd->name |
| Message-ID | <tpEUp-1P8-3@gated-at.bofh.it> |
| In reply to | #1606560 |
On Wed, 22 Mar 2017 23:07:27 +0900 Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > This will be filled by nand_scan_ident() later. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> > --- > > Changes in v2: None > > drivers/mtd/nand/denali.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c > index 3badb1d..1706975 100644 > --- a/drivers/mtd/nand/denali.c > +++ b/drivers/mtd/nand/denali.c > @@ -1495,7 +1495,6 @@ int denali_init(struct denali_nand_info *denali) > > /* now that our ISR is registered, we can enable interrupts */ > denali_set_intr_modes(denali, true); > - mtd->name = "denali-nand"; Are you sure this is safe to do that? When mtd->name is NULL, the core takes the parent name, and in the denali_dt case it's not "denali-nand", which means you're breaking mtdparts compat. > nand_set_flash_node(chip, denali->dev->of_node); > > /* register the driver with the NAND core subsystem */
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:20 +0100 |
| Subject | [PATCH v2 18/53] mtd: nand: denali: use nand_chip to hold frequently accessed data |
| Message-ID | <tnPhh-3Fu-69@gated-at.bofh.it> |
| In reply to | #1606557 |
The denali_init() needs to setup a bunch of parameters of nand_chip.
Replace denali->nand.(member) with chip->(member) for shorter code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2: None
drivers/mtd/nand/denali.c | 68 +++++++++++++++++++++++------------------------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index ff6af1d..24c35a6 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1460,7 +1460,8 @@ static void denali_drv_init(struct denali_nand_info *denali)
int denali_init(struct denali_nand_info *denali)
{
- struct mtd_info *mtd = nand_to_mtd(&denali->nand);
+ struct nand_chip *chip = &denali->nand;
+ struct mtd_info *mtd = nand_to_mtd(chip);
int ret;
if (denali->platform == INTEL_CE4100) {
@@ -1497,10 +1498,10 @@ int denali_init(struct denali_nand_info *denali)
mtd->name = "denali-nand";
/* register the driver with the NAND core subsystem */
- denali->nand.select_chip = denali_select_chip;
- denali->nand.cmdfunc = denali_cmdfunc;
- denali->nand.read_byte = denali_read_byte;
- denali->nand.waitfunc = denali_waitfunc;
+ chip->select_chip = denali_select_chip;
+ chip->cmdfunc = denali_cmdfunc;
+ chip->read_byte = denali_read_byte;
+ chip->waitfunc = denali_waitfunc;
/*
* scan for NAND devices attached to the controller
@@ -1544,17 +1545,16 @@ int denali_init(struct denali_nand_info *denali)
* the real pagesize and anything necessery
*/
denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
- denali->nand.chipsize <<= denali->devnum - 1;
- denali->nand.page_shift += denali->devnum - 1;
- denali->nand.pagemask = (denali->nand.chipsize >>
- denali->nand.page_shift) - 1;
- denali->nand.bbt_erase_shift += denali->devnum - 1;
- denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift;
- denali->nand.chip_shift += denali->devnum - 1;
+ chip->chipsize <<= denali->devnum - 1;
+ chip->page_shift += denali->devnum - 1;
+ chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
+ chip->bbt_erase_shift += denali->devnum - 1;
+ chip->phys_erase_shift = chip->bbt_erase_shift;
+ chip->chip_shift += denali->devnum - 1;
mtd->writesize <<= denali->devnum - 1;
mtd->oobsize <<= denali->devnum - 1;
mtd->erasesize <<= denali->devnum - 1;
- mtd->size = denali->nand.numchips * denali->nand.chipsize;
+ mtd->size = chip->numchips * chip->chipsize;
denali->bbtskipbytes *= denali->devnum;
/*
@@ -1564,29 +1564,29 @@ int denali_init(struct denali_nand_info *denali)
*/
/* Bad block management */
- denali->nand.bbt_td = &bbt_main_descr;
- denali->nand.bbt_md = &bbt_mirror_descr;
+ chip->bbt_td = &bbt_main_descr;
+ chip->bbt_md = &bbt_mirror_descr;
/* skip the scan for now until we have OOB read and write support */
- denali->nand.bbt_options |= NAND_BBT_USE_FLASH;
- denali->nand.options |= NAND_SKIP_BBTSCAN;
- denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
+ chip->bbt_options |= NAND_BBT_USE_FLASH;
+ chip->options |= NAND_SKIP_BBTSCAN;
+ chip->ecc.mode = NAND_ECC_HW_SYNDROME;
/* no subpage writes on denali */
- denali->nand.options |= NAND_NO_SUBPAGE_WRITE;
+ chip->options |= NAND_NO_SUBPAGE_WRITE;
/*
* Denali Controller only support 15bit and 8bit ECC in MRST,
* so just let controller do 15bit ECC for MLC and 8bit ECC for
* SLC if possible.
* */
- if (!nand_is_slc(&denali->nand) &&
+ if (!nand_is_slc(chip) &&
(mtd->oobsize > (denali->bbtskipbytes +
ECC_15BITS * (mtd->writesize /
ECC_SECTOR_SIZE)))) {
/* if MLC OOB size is large enough, use 15bit ECC*/
- denali->nand.ecc.strength = 15;
- denali->nand.ecc.bytes = ECC_15BITS;
+ chip->ecc.strength = 15;
+ chip->ecc.bytes = ECC_15BITS;
iowrite32(15, denali->flash_reg + ECC_CORRECTION);
} else if (mtd->oobsize < (denali->bbtskipbytes +
ECC_8BITS * (mtd->writesize /
@@ -1594,24 +1594,24 @@ int denali_init(struct denali_nand_info *denali)
pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes");
goto failed_req_irq;
} else {
- denali->nand.ecc.strength = 8;
- denali->nand.ecc.bytes = ECC_8BITS;
+ chip->ecc.strength = 8;
+ chip->ecc.bytes = ECC_8BITS;
iowrite32(8, denali->flash_reg + ECC_CORRECTION);
}
mtd_set_ooblayout(mtd, &denali_ooblayout_ops);
- denali->nand.ecc.bytes *= denali->devnum;
- denali->nand.ecc.strength *= denali->devnum;
+ chip->ecc.bytes *= denali->devnum;
+ chip->ecc.strength *= denali->devnum;
/* override the default read operations */
- denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum;
- denali->nand.ecc.read_page = denali_read_page;
- denali->nand.ecc.read_page_raw = denali_read_page_raw;
- denali->nand.ecc.write_page = denali_write_page;
- denali->nand.ecc.write_page_raw = denali_write_page_raw;
- denali->nand.ecc.read_oob = denali_read_oob;
- denali->nand.ecc.write_oob = denali_write_oob;
- denali->nand.erase = denali_erase;
+ chip->ecc.size = ECC_SECTOR_SIZE * denali->devnum;
+ chip->ecc.read_page = denali_read_page;
+ chip->ecc.read_page_raw = denali_read_page_raw;
+ chip->ecc.write_page = denali_write_page;
+ chip->ecc.write_page_raw = denali_write_page_raw;
+ chip->ecc.read_oob = denali_read_oob;
+ chip->ecc.write_oob = denali_write_oob;
+ chip->erase = denali_erase;
ret = nand_scan_tail(mtd);
if (ret)
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:20 +0100 |
| Subject | [PATCH v2 07/53] mtd: nand: denali: consolidate INTR_STATUS__* and INTR_EN__* macros |
| Message-ID | <tnPhi-3Fu-73@gated-at.bofh.it> |
| In reply to | #1606557 |
The interrupts are enabled by INTR_EN register, then asserted
interrupts can be observed via INTR_STATUS register.
The bit fields are identical between INTR_EN and INTR_STATUS, so we
can merge the bit field macros. Likewise for DATA_INTR.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2:
- Newly added
drivers/mtd/nand/denali.c | 56 ++++++++++++++++++++-----------------------
drivers/mtd/nand/denali.h | 61 ++++++++++++++---------------------------------
2 files changed, 44 insertions(+), 73 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index c9806e6..2c59eb3 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -45,16 +45,16 @@ MODULE_PARM_DESC(onfi_timing_mode,
* We define a macro here that combines all interrupts this driver uses into
* a single constant value, for convenience.
*/
-#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
- INTR_STATUS__ECC_TRANSACTION_DONE | \
- INTR_STATUS__ECC_ERR | \
- INTR_STATUS__PROGRAM_FAIL | \
- INTR_STATUS__LOAD_COMP | \
- INTR_STATUS__PROGRAM_COMP | \
- INTR_STATUS__TIME_OUT | \
- INTR_STATUS__ERASE_FAIL | \
- INTR_STATUS__RST_COMP | \
- INTR_STATUS__ERASE_COMP)
+#define DENALI_IRQ_ALL (INTR__DMA_CMD_COMP | \
+ INTR__ECC_TRANSACTION_DONE | \
+ INTR__ECC_ERR | \
+ INTR__PROGRAM_FAIL | \
+ INTR__LOAD_COMP | \
+ INTR__PROGRAM_COMP | \
+ INTR__TIME_OUT | \
+ INTR__ERASE_FAIL | \
+ INTR__RST_COMP | \
+ INTR__ERASE_COMP)
/*
* indicates whether or not the internal value for the flash bank is
@@ -159,7 +159,7 @@ static void read_status(struct denali_nand_info *denali)
static void reset_bank(struct denali_nand_info *denali)
{
uint32_t irq_status;
- uint32_t irq_mask = INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT;
+ uint32_t irq_mask = INTR__RST_COMP | INTR__TIME_OUT;
clear_interrupts(denali);
@@ -167,7 +167,7 @@ static void reset_bank(struct denali_nand_info *denali)
irq_status = wait_for_irq(denali, irq_mask);
- if (irq_status & INTR_STATUS__TIME_OUT)
+ if (irq_status & INTR__TIME_OUT)
dev_err(denali->dev, "reset bank failed.\n");
}
@@ -177,22 +177,22 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
int i;
for (i = 0; i < denali->max_banks; i++)
- iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
+ iowrite32(INTR__RST_COMP | INTR__TIME_OUT,
denali->flash_reg + INTR_STATUS(i));
for (i = 0; i < denali->max_banks; i++) {
iowrite32(1 << i, denali->flash_reg + DEVICE_RESET);
while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) &
- (INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT)))
+ (INTR__RST_COMP | INTR__TIME_OUT)))
cpu_relax();
if (ioread32(denali->flash_reg + INTR_STATUS(i)) &
- INTR_STATUS__TIME_OUT)
+ INTR__TIME_OUT)
dev_dbg(denali->dev,
"NAND Reset operation timed out on bank %d\n", i);
}
for (i = 0; i < denali->max_banks; i++)
- iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
+ iowrite32(INTR__RST_COMP | INTR__TIME_OUT,
denali->flash_reg + INTR_STATUS(i));
return PASS;
@@ -716,7 +716,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
uint32_t addr, cmd, irq_status, irq_mask;
if (op == DENALI_READ)
- irq_mask = INTR_STATUS__LOAD_COMP;
+ irq_mask = INTR__LOAD_COMP;
else if (op == DENALI_WRITE)
irq_mask = 0;
else
@@ -823,8 +823,7 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
uint32_t irq_status;
- uint32_t irq_mask = INTR_STATUS__PROGRAM_COMP |
- INTR_STATUS__PROGRAM_FAIL;
+ uint32_t irq_mask = INTR__PROGRAM_COMP | INTR__PROGRAM_FAIL;
int status = 0;
denali->page = page;
@@ -851,7 +850,7 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
{
struct denali_nand_info *denali = mtd_to_denali(mtd);
- uint32_t irq_mask = INTR_STATUS__LOAD_COMP;
+ uint32_t irq_mask = INTR__LOAD_COMP;
uint32_t irq_status, addr, cmd;
denali->page = page;
@@ -912,7 +911,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
bool check_erased_page = false;
unsigned int bitflips = 0;
- if (irq_status & INTR_STATUS__ECC_ERR) {
+ if (irq_status & INTR__ECC_ERR) {
/* read the ECC errors. we'll ignore them for now */
uint32_t err_address, err_correction_info, err_byte,
err_sector, err_device, err_correction_value;
@@ -969,7 +968,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
* for a while for this interrupt
*/
while (!(read_interrupt_status(denali) &
- INTR_STATUS__ECC_TRANSACTION_DONE))
+ INTR__ECC_TRANSACTION_DONE))
cpu_relax();
clear_interrupts(denali);
denali_set_intr_modes(denali, true);
@@ -1020,8 +1019,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
dma_addr_t addr = denali->buf.dma_buf;
size_t size = mtd->writesize + mtd->oobsize;
uint32_t irq_status;
- uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
- INTR_STATUS__PROGRAM_FAIL;
+ uint32_t irq_mask = INTR__DMA_CMD_COMP | INTR__PROGRAM_FAIL;
/*
* if it is a raw xfer, we want to disable ecc and send the spare area.
@@ -1119,8 +1117,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
size_t size = mtd->writesize + mtd->oobsize;
uint32_t irq_status;
- uint32_t irq_mask = INTR_STATUS__ECC_TRANSACTION_DONE |
- INTR_STATUS__ECC_ERR;
+ uint32_t irq_mask = INTR__ECC_TRANSACTION_DONE | INTR__ECC_ERR;
bool check_erased_page = false;
if (page != denali->page) {
@@ -1168,7 +1165,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
struct denali_nand_info *denali = mtd_to_denali(mtd);
dma_addr_t addr = denali->buf.dma_buf;
size_t size = mtd->writesize + mtd->oobsize;
- uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
+ uint32_t irq_mask = INTR__DMA_CMD_COMP;
if (page != denali->page) {
dev_err(denali->dev,
@@ -1241,10 +1238,9 @@ static int denali_erase(struct mtd_info *mtd, int page)
index_addr(denali, cmd, 0x1);
/* wait for erase to complete or failure to occur */
- irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
- INTR_STATUS__ERASE_FAIL);
+ irq_status = wait_for_irq(denali, INTR__ERASE_COMP | INTR__ERASE_FAIL);
- return irq_status & INTR_STATUS__ERASE_FAIL ? NAND_STATUS_FAIL : PASS;
+ return irq_status & INTR__ERASE_FAIL ? NAND_STATUS_FAIL : PASS;
}
static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 403a7c8..8df2285 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -218,40 +218,22 @@
#define INTR_STATUS(__bank) (0x410 + ((__bank) * 0x50))
#define INTR_EN(__bank) (0x420 + ((__bank) * 0x50))
-
-#define INTR_STATUS__ECC_TRANSACTION_DONE 0x0001
-#define INTR_STATUS__ECC_ERR 0x0002
-#define INTR_STATUS__DMA_CMD_COMP 0x0004
-#define INTR_STATUS__TIME_OUT 0x0008
-#define INTR_STATUS__PROGRAM_FAIL 0x0010
-#define INTR_STATUS__ERASE_FAIL 0x0020
-#define INTR_STATUS__LOAD_COMP 0x0040
-#define INTR_STATUS__PROGRAM_COMP 0x0080
-#define INTR_STATUS__ERASE_COMP 0x0100
-#define INTR_STATUS__PIPE_CPYBCK_CMD_COMP 0x0200
-#define INTR_STATUS__LOCKED_BLK 0x0400
-#define INTR_STATUS__UNSUP_CMD 0x0800
-#define INTR_STATUS__INT_ACT 0x1000
-#define INTR_STATUS__RST_COMP 0x2000
-#define INTR_STATUS__PIPE_CMD_ERR 0x4000
-#define INTR_STATUS__PAGE_XFER_INC 0x8000
-
-#define INTR_EN__ECC_TRANSACTION_DONE 0x0001
-#define INTR_EN__ECC_ERR 0x0002
-#define INTR_EN__DMA_CMD_COMP 0x0004
-#define INTR_EN__TIME_OUT 0x0008
-#define INTR_EN__PROGRAM_FAIL 0x0010
-#define INTR_EN__ERASE_FAIL 0x0020
-#define INTR_EN__LOAD_COMP 0x0040
-#define INTR_EN__PROGRAM_COMP 0x0080
-#define INTR_EN__ERASE_COMP 0x0100
-#define INTR_EN__PIPE_CPYBCK_CMD_COMP 0x0200
-#define INTR_EN__LOCKED_BLK 0x0400
-#define INTR_EN__UNSUP_CMD 0x0800
-#define INTR_EN__INT_ACT 0x1000
-#define INTR_EN__RST_COMP 0x2000
-#define INTR_EN__PIPE_CMD_ERR 0x4000
-#define INTR_EN__PAGE_XFER_INC 0x8000
+#define INTR__ECC_TRANSACTION_DONE 0x0001
+#define INTR__ECC_ERR 0x0002
+#define INTR__DMA_CMD_COMP 0x0004
+#define INTR__TIME_OUT 0x0008
+#define INTR__PROGRAM_FAIL 0x0010
+#define INTR__ERASE_FAIL 0x0020
+#define INTR__LOAD_COMP 0x0040
+#define INTR__PROGRAM_COMP 0x0080
+#define INTR__ERASE_COMP 0x0100
+#define INTR__PIPE_CPYBCK_CMD_COMP 0x0200
+#define INTR__LOCKED_BLK 0x0400
+#define INTR__UNSUP_CMD 0x0800
+#define INTR__INT_ACT 0x1000
+#define INTR__RST_COMP 0x2000
+#define INTR__PIPE_CMD_ERR 0x4000
+#define INTR__PAGE_XFER_INC 0x8000
#define PAGE_CNT(__bank) (0x430 + ((__bank) * 0x50))
#define ERR_PAGE_ADDR(__bank) (0x440 + ((__bank) * 0x50))
@@ -284,20 +266,13 @@
#define IGNORE_ECC_DONE__FLAG 0x0001
#define DMA_INTR 0x720
+#define DMA_INTR_EN 0x730
#define DMA_INTR__TARGET_ERROR 0x0001
#define DMA_INTR__DESC_COMP_CHANNEL0 0x0002
#define DMA_INTR__DESC_COMP_CHANNEL1 0x0004
#define DMA_INTR__DESC_COMP_CHANNEL2 0x0008
#define DMA_INTR__DESC_COMP_CHANNEL3 0x0010
-#define DMA_INTR__MEMCOPY_DESC_COMP 0x0020
-
-#define DMA_INTR_EN 0x730
-#define DMA_INTR_EN__TARGET_ERROR 0x0001
-#define DMA_INTR_EN__DESC_COMP_CHANNEL0 0x0002
-#define DMA_INTR_EN__DESC_COMP_CHANNEL1 0x0004
-#define DMA_INTR_EN__DESC_COMP_CHANNEL2 0x0008
-#define DMA_INTR_EN__DESC_COMP_CHANNEL3 0x0010
-#define DMA_INTR_EN__MEMCOPY_DESC_COMP 0x0020
+#define DMA_INTR__MEMCOPY_DESC_COMP 0x0020
#define TARGET_ERR_ADDR_LO 0x740
#define TARGET_ERR_ADDR_LO__VALUE 0xffff
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:20 +0100 |
| Subject | [PATCH v2 14/53] mtd: nand: denali: support 64bit capable DMA engine |
| Message-ID | <tnPhi-3Fu-79@gated-at.bofh.it> |
| In reply to | #1606557 |
The current driver only supports the DMA engine up to 32 bit
physical address, but there also exists 64 bit capable DMA engine
for this IP.
The data DMA setup sequence is completely different, so I added the
64 bit DMA code as a new function denali_setup_dma64(). The 32 bit
one has been renamed to denali_setup_dma32().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2:
- Change the capability prefix DENALI_CAPS_ -> DENALI_CAP_
drivers/mtd/nand/denali.c | 39 +++++++++++++++++++++++++++++++++++----
drivers/mtd/nand/denali.h | 1 +
2 files changed, 36 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 91f0def..513292f 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -999,8 +999,30 @@ static void denali_enable_dma(struct denali_nand_info *denali, bool en)
ioread32(denali->flash_reg + DMA_ENABLE);
}
-/* setups the HW to perform the data DMA */
-static void denali_setup_dma(struct denali_nand_info *denali, int op)
+static void denali_setup_dma64(struct denali_nand_info *denali, int op)
+{
+ uint32_t mode;
+ const int page_count = 1;
+ uint64_t addr = denali->buf.dma_buf;
+
+ mode = MODE_10 | BANK(denali->flash_bank) | denali->page;
+
+ /* DMA is a three step process */
+
+ /*
+ * 1. setup transfer type, interrupt when complete,
+ * burst len = 64 bytes, the number of pages
+ */
+ index_addr(denali, mode, 0x01002000 | (64 << 16) | op | page_count);
+
+ /* 2. set memory low address */
+ index_addr(denali, mode, addr);
+
+ /* 3. set memory high address */
+ index_addr(denali, mode, addr >> 32);
+}
+
+static void denali_setup_dma32(struct denali_nand_info *denali, int op)
{
uint32_t mode;
const int page_count = 1;
@@ -1023,6 +1045,14 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op)
index_addr(denali, mode | 0x14000, 0x2400);
}
+static void denali_setup_dma(struct denali_nand_info *denali, int op)
+{
+ if (denali->caps & DENALI_CAP_DMA_64BIT)
+ denali_setup_dma64(denali, op);
+ else
+ denali_setup_dma32(denali, op);
+}
+
/*
* writes a page. user specifies type, and this function handles the
* configuration details.
@@ -1492,8 +1522,9 @@ int denali_init(struct denali_nand_info *denali)
goto failed_req_irq;
}
- /* Is 32-bit DMA supported? */
- ret = dma_set_mask(denali->dev, DMA_BIT_MASK(32));
+ ret = dma_set_mask(denali->dev,
+ DMA_BIT_MASK(denali->caps & DENALI_CAP_DMA_64BIT ?
+ 64 : 32));
if (ret) {
dev_err(denali->dev, "No usable DMA configuration\n");
goto failed_req_irq;
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index ed42b16..a8e8d68 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -353,6 +353,7 @@ struct denali_nand_info {
int max_banks;
unsigned int caps;
#define DENALI_CAP_HW_ECC_FIXUP BIT(0)
+#define DENALI_CAP_DMA_64BIT BIT(1)
};
extern int denali_init(struct denali_nand_info *denali);
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:30 +0100 |
| Subject | [PATCH v2 02/53] mtd: nand: use read_oob() instead of cmdfunc() for bad block check |
| Message-ID | <tnPqV-3Kn-3@gated-at.bofh.it> |
| In reply to | #1606557 |
The nand_default_block_markbad() and scan_block_fast() use high
level APIs to get access to the BBM.
On the other hand, nand_block_bad (the default implementation of
->block_bad) calls the lower level ->cmdfunc hook. This prevents
drivers from using ->ecc.read_oob() even if optimized read operation
is implemented. Besides, some NAND controllers may protect the BBM
with ECC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2:
- Error out immediately if the first page access fails
- Use for() {} instead of do {} while()
- Update git-log
drivers/mtd/nand/nand_base.c | 34 +++++++++++++---------------------
1 file changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a3c0f47..807398d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -354,40 +354,32 @@ static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
*/
static int nand_block_bad(struct mtd_info *mtd, loff_t ofs)
{
- int page, res = 0, i = 0;
+ int page, page_end, res;
struct nand_chip *chip = mtd_to_nand(mtd);
- u16 bad;
+ u8 bad;
if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
ofs += mtd->erasesize - mtd->writesize;
page = (int)(ofs >> chip->page_shift) & chip->pagemask;
+ page_end = page + (chip->bbt_options & NAND_BBT_SCAN2NDPAGE ? 2 : 1);
- do {
- if (chip->options & NAND_BUSWIDTH_16) {
- chip->cmdfunc(mtd, NAND_CMD_READOOB,
- chip->badblockpos & 0xFE, page);
- bad = cpu_to_le16(chip->read_word(mtd));
- if (chip->badblockpos & 0x1)
- bad >>= 8;
- else
- bad &= 0xFF;
- } else {
- chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
- page);
- bad = chip->read_byte(mtd);
- }
+ for (; page < page_end; page++) {
+ res = chip->ecc.read_oob(mtd, chip, page);
+ if (res)
+ return res;
+
+ bad = chip->oob_poi[chip->badblockpos];
if (likely(chip->badblockbits == 8))
res = bad != 0xFF;
else
res = hweight8(bad) < chip->badblockbits;
- ofs += mtd->writesize;
- page = (int)(ofs >> chip->page_shift) & chip->pagemask;
- i++;
- } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
+ if (res)
+ return res;
+ }
- return res;
+ return 0;
}
/**
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:30 +0100 |
| Subject | [PATCH v2 06/53] mtd: nand: denali: fix comment of denali_nand_info::flash_mem |
| Message-ID | <tnPqV-3Kn-5@gated-at.bofh.it> |
| In reply to | #1606557 |
The same comment "Mapped io reg base address" for flash_reg and
flash_mem probably due to the mistake of copy-paste work.
Of course, the latter is not the register base address.
Reword the comments using the terminology in the Denali User's Guide.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2: None
drivers/mtd/nand/denali.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 6573ea5..403a7c8 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -351,8 +351,8 @@ struct denali_nand_info {
struct device *dev;
int total_used_banks;
uint16_t page;
- void __iomem *flash_reg; /* Mapped io reg base address */
- void __iomem *flash_mem; /* Mapped io reg base address */
+ void __iomem *flash_reg; /* Register Interface */
+ void __iomem *flash_mem; /* Host Data/Command Interface */
/* elements used by ISR */
struct completion complete;
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:30 +0100 |
| Subject | [PATCH v2 19/53] mtd: nand: denali: call nand_set_flash_node() to set DT node |
| Message-ID | <tnPqW-3Kn-7@gated-at.bofh.it> |
| In reply to | #1606557 |
This will allow nand_dt_init() to parse DT properties in the NAND controller device node. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- Changes in v2: None drivers/mtd/nand/denali.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 24c35a6..3badb1d 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1496,6 +1496,7 @@ int denali_init(struct denali_nand_info *denali) /* now that our ISR is registered, we can enable interrupts */ denali_set_intr_modes(denali, true); mtd->name = "denali-nand"; + nand_set_flash_node(chip, denali->dev->of_node); /* register the driver with the NAND core subsystem */ chip->select_chip = denali_select_chip; -- 2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:30 +0100 |
| Subject | [PATCH v2 24/53] mtd: nand: denali: remove meaningless writes to read-only registers |
| Message-ID | <tnPqW-3Kn-13@gated-at.bofh.it> |
| In reply to | #1606557 |
The write accesses to LOGICAL_PAGE_{DATA,SPARE}_SIZE have no effect
because the Denali User's Guide says these registers are read-only.
The hardware automatically multiplies the main/spare size by the
number of devices and update LOGICAL_PAGE_{DATA,SPARE}_SIZE.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2: None
drivers/mtd/nand/denali.c | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 3da0a0e..5e89709 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -342,8 +342,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali,
static void get_toshiba_nand_para(struct denali_nand_info *denali)
{
- uint32_t tmp;
-
/*
* Workaround to fix a controller bug which reports a wrong
* spare area size for some kind of Toshiba NAND device
@@ -351,10 +349,6 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) &&
(ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) {
iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
- tmp = ioread32(denali->flash_reg + DEVICES_CONNECTED) *
- ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
- iowrite32(tmp,
- denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE);
#if SUPPORT_15BITECC
iowrite32(15, denali->flash_reg + ECC_CORRECTION);
#elif SUPPORT_8BITECC
@@ -366,22 +360,12 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali)
static void get_hynix_nand_para(struct denali_nand_info *denali,
uint8_t device_id)
{
- uint32_t main_size, spare_size;
-
switch (device_id) {
case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */
case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */
iowrite32(128, denali->flash_reg + PAGES_PER_BLOCK);
iowrite32(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE);
iowrite32(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE);
- main_size = 4096 *
- ioread32(denali->flash_reg + DEVICES_CONNECTED);
- spare_size = 224 *
- ioread32(denali->flash_reg + DEVICES_CONNECTED);
- iowrite32(main_size,
- denali->flash_reg + LOGICAL_PAGE_DATA_SIZE);
- iowrite32(spare_size,
- denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE);
iowrite32(0, denali->flash_reg + DEVICE_WIDTH);
#if SUPPORT_15BITECC
iowrite32(15, denali->flash_reg + ECC_CORRECTION);
--
2.7.4
[toc] | [prev] | [next] | [standalone]
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-03-22 15:30 +0100 |
| Subject | [PATCH v2 03/53] mtd: nand: denali: remove unused CONFIG option and macros |
| Message-ID | <tnPqW-3Kn-11@gated-at.bofh.it> |
| In reply to | #1606557 |
All of these macros are not used at all.
CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR is not used for anything but
defining SCRATCH_REG_ADDR. The config option should go away as well.
I am removing some register macros. They are not used, and do not
exist in recent IP versions.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
Changes in v2:
- Remove more unused macros
drivers/mtd/nand/Kconfig | 11 ------
drivers/mtd/nand/denali.c | 5 ---
drivers/mtd/nand/denali.h | 99 -----------------------------------------------
3 files changed, 115 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 6d4d567..817558b 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -60,17 +60,6 @@ config MTD_NAND_DENALI_DT
Enable the driver for NAND flash on platforms using a Denali NAND
controller as a DT device.
-config MTD_NAND_DENALI_SCRATCH_REG_ADDR
- hex "Denali NAND size scratch register address"
- default "0xFF108018"
- depends on MTD_NAND_DENALI_PCI
- help
- Some platforms place the NAND chip size in a scratch register
- because (some versions of) the driver aren't able to automatically
- determine the size of certain chips. Set the address of the
- scratch register here to enable this feature. On Intel Moorestown
- boards, the scratch register is at 0xFF108018.
-
config MTD_NAND_GPIO
tristate "GPIO assisted NAND Flash driver"
depends on GPIOLIB || COMPILE_TEST
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 73b9d4e..f993e13 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -91,11 +91,6 @@ static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd)
#define DENALI_READ 0
#define DENALI_WRITE 0x100
-/* types of device accesses. We can issue commands and get status */
-#define COMMAND_CYCLE 0
-#define ADDR_CYCLE 1
-#define STATUS_CYCLE 2
-
/*
* this is a helper macro that allows us to
* format the bank into the proper bits for the controller
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index ea22191..c4f3a68 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -257,26 +257,6 @@
#define ERR_PAGE_ADDR(__bank) (0x440 + ((__bank) * 0x50))
#define ERR_BLOCK_ADDR(__bank) (0x450 + ((__bank) * 0x50))
-#define DATA_INTR 0x550
-#define DATA_INTR__WRITE_SPACE_AV 0x0001
-#define DATA_INTR__READ_DATA_AV 0x0002
-
-#define DATA_INTR_EN 0x560
-#define DATA_INTR_EN__WRITE_SPACE_AV 0x0001
-#define DATA_INTR_EN__READ_DATA_AV 0x0002
-
-#define GPREG_0 0x570
-#define GPREG_0__VALUE 0xffff
-
-#define GPREG_1 0x580
-#define GPREG_1__VALUE 0xffff
-
-#define GPREG_2 0x590
-#define GPREG_2__VALUE 0xffff
-
-#define GPREG_3 0x5a0
-#define GPREG_3__VALUE 0xffff
-
#define ECC_THRESHOLD 0x600
#define ECC_THRESHOLD__VALUE 0x03ff
@@ -331,69 +311,15 @@
#define CHNL_ACTIVE__CHANNEL2 0x0004
#define CHNL_ACTIVE__CHANNEL3 0x0008
-#define ACTIVE_SRC_ID 0x800
-#define ACTIVE_SRC_ID__VALUE 0x00ff
-
-#define PTN_INTR 0x810
-#define PTN_INTR__CONFIG_ERROR 0x0001
-#define PTN_INTR__ACCESS_ERROR_BANK0 0x0002
-#define PTN_INTR__ACCESS_ERROR_BANK1 0x0004
-#define PTN_INTR__ACCESS_ERROR_BANK2 0x0008
-#define PTN_INTR__ACCESS_ERROR_BANK3 0x0010
-#define PTN_INTR__REG_ACCESS_ERROR 0x0020
-
-#define PTN_INTR_EN 0x820
-#define PTN_INTR_EN__CONFIG_ERROR 0x0001
-#define PTN_INTR_EN__ACCESS_ERROR_BANK0 0x0002
-#define PTN_INTR_EN__ACCESS_ERROR_BANK1 0x0004
-#define PTN_INTR_EN__ACCESS_ERROR_BANK2 0x0008
-#define PTN_INTR_EN__ACCESS_ERROR_BANK3 0x0010
-#define PTN_INTR_EN__REG_ACCESS_ERROR 0x0020
-
-#define PERM_SRC_ID(__bank) (0x830 + ((__bank) * 0x40))
-#define PERM_SRC_ID__SRCID 0x00ff
-#define PERM_SRC_ID__DIRECT_ACCESS_ACTIVE 0x0800
-#define PERM_SRC_ID__WRITE_ACTIVE 0x2000
-#define PERM_SRC_ID__READ_ACTIVE 0x4000
-#define PERM_SRC_ID__PARTITION_VALID 0x8000
-
-#define MIN_BLK_ADDR(__bank) (0x840 + ((__bank) * 0x40))
-#define MIN_BLK_ADDR__VALUE 0xffff
-
-#define MAX_BLK_ADDR(__bank) (0x850 + ((__bank) * 0x40))
-#define MAX_BLK_ADDR__VALUE 0xffff
-
-#define MIN_MAX_BANK(__bank) (0x860 + ((__bank) * 0x40))
-#define MIN_MAX_BANK__MIN_VALUE 0x0003
-#define MIN_MAX_BANK__MAX_VALUE 0x000c
-
-
-/* ffsdefs.h */
-#define CLEAR 0 /*use this to clear a field instead of "fail"*/
-#define SET 1 /*use this to set a field instead of "pass"*/
#define FAIL 1 /*failed flag*/
#define PASS 0 /*success flag*/
-#define ERR -1 /*error flag*/
-
-/* lld.h */
-#define GOOD_BLOCK 0
-#define DEFECTIVE_BLOCK 1
-#define READ_ERROR 2
#define CLK_X 5
#define CLK_MULTI 4
-/* KBV - Updated to LNW scratch register address */
-#define SCRATCH_REG_ADDR CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR
-#define SCRATCH_REG_SIZE 64
-
-#define GLOB_HWCTL_DEFAULT_BLKS 2048
-
#define SUPPORT_15BITECC 1
#define SUPPORT_8BITECC 1
-#define CUSTOM_CONF_PARAMS 0
-
#define ONFI_BLOOM_TIME 1
#define MODE5_WORKAROUND 0
@@ -403,31 +329,6 @@
#define MODE_10 0x08000000
#define MODE_11 0x0C000000
-
-#define DATA_TRANSFER_MODE 0
-#define PROTECTION_PER_BLOCK 1
-#define LOAD_WAIT_COUNT 2
-#define PROGRAM_WAIT_COUNT 3
-#define ERASE_WAIT_COUNT 4
-#define INT_MONITOR_CYCLE_COUNT 5
-#define READ_BUSY_PIN_ENABLED 6
-#define MULTIPLANE_OPERATION_SUPPORT 7
-#define PRE_FETCH_MODE 8
-#define CE_DONT_CARE_SUPPORT 9
-#define COPYBACK_SUPPORT 10
-#define CACHE_WRITE_SUPPORT 11
-#define CACHE_READ_SUPPORT 12
-#define NUM_PAGES_IN_BLOCK 13
-#define ECC_ENABLE_SELECT 14
-#define WRITE_ENABLE_2_READ_ENABLE 15
-#define ADDRESS_2_DATA 16
-#define READ_ENABLE_2_WRITE_ENABLE 17
-#define TWO_ROW_ADDRESS_CYCLES 18
-#define MULTIPLANE_ADDRESS_RESTRICT 19
-#define ACC_CLOCKS 20
-#define READ_WRITE_ENABLE_LOW_COUNT 21
-#define READ_WRITE_ENABLE_HIGH_COUNT 22
-
#define ECC_SECTOR_SIZE 512
struct nand_buf {
--
2.7.4
[toc] | [prev] | [next] | [standalone]
Page 1 of 2 [1] 2 Next page →
Back to top | Article view | linux.kernel
csiph-web