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[PATCH v1 0/7] initialize dtsi file and dts file for RK3328 SoCs

Started by<cl@rock-chips.com>
First post2017-03-15 11:10 +0100
Last post2017-03-16 03:00 +0100
Articles 16 — 6 participants

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  [PATCH v1 0/7] initialize dtsi file and dts file for RK3328 SoCs <cl@rock-chips.com> - 2017-03-15 11:10 +0100
    [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328 <cl@rock-chips.com> - 2017-03-15 11:10 +0100
      Re: [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328 Heiko Stuebner <heiko@sntech.de> - 2017-03-16 09:40 +0100
        Re: [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for  rk3328 Jonathan Cameron <jic23@kernel.org> - 2017-03-19 11:40 +0100
    [PATCH v1 3/7] dt-bindings: i2c: rk3x: add support for rk3328 <cl@rock-chips.com> - 2017-03-15 11:10 +0100
      Re: [PATCH v1 3/7] dt-bindings: i2c: rk3x: add support for rk3328 Heiko Stuebner <heiko@sntech.de> - 2017-03-16 09:40 +0100
    [PATCH v1 4/7] dt-bindings: soc: rockchip: grf: add support for rk3328 <cl@rock-chips.com> - 2017-03-15 11:10 +0100
    Re: [PATCH v1 0/7] initialize dtsi file and dts file for RK3328 SoCs Heiko Stübner <heiko@sntech.de> - 2017-03-15 12:20 +0100
    [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board <cl@rock-chips.com> - 2017-03-16 02:50 +0100
      Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328  evaluation board Andre Przywara <andre.przywara@arm.com> - 2017-03-16 17:20 +0100
        Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328  evaluation board 陈亮 <cl@rock-chips.com> - 2017-03-17 03:40 +0100
          Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board Heiko Stuebner <heiko@sntech.de> - 2017-03-17 09:50 +0100
            Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328  evaluation board 陈亮 <cl@rock-chips.com> - 2017-03-21 09:10 +0100
              Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board Heiko Stübner <heiko@sntech.de> - 2017-03-21 10:00 +0100
    [PATCH v1 5/7] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs <cl@rock-chips.com> - 2017-03-16 02:50 +0100
    [PATCH v1 7/7] dt-bindings: document rockchip rk3328-evb board <cl@rock-chips.com> - 2017-03-16 03:00 +0100

#1601215 — [PATCH v1 0/7] initialize dtsi file and dts file for RK3328 SoCs

From<cl@rock-chips.com>
Date2017-03-15 11:10 +0100
Subject[PATCH v1 0/7] initialize dtsi file and dts file for RK3328 SoCs
Message-ID<tle2t-689-3@gated-at.bofh.it>
From: Liang Chen <cl@rock-chips.com>

These patchs depend on pinctrl patchs as below:

https://patchwork.kernel.org/patch/9566427/
https://patchwork.kernel.org/patch/9566425/
https://patchwork.kernel.org/patch/9566431/

Chen Liang (7):
  include: dt-bindings: Add pin function index definition for rockchip
    pinctrl
  dt-bindings: iio: rockchip-saradc: add support for rk3328
  dt-bindings: i2c: rk3x: add support for rk3328
  dt-bindings: soc: rockchip: grf: add support for rk3328
  arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
  arm64: dts: rockchip: add dts file for RK3328 evaluation board
  dt-bindings: document rockchip rk3328-evb board

 Documentation/devicetree/bindings/arm/rockchip.txt |    4 +
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt |    1 +
 .../bindings/iio/adc/rockchip-saradc.txt           |    1 +
 .../devicetree/bindings/soc/rockchip/grf.txt       |    1 +
 arch/arm64/boot/dts/rockchip/Makefile              |    1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts        |   57 +
 arch/arm64/boot/dts/rockchip/rk3328.dtsi           | 1362 ++++++++++++++++++++
 include/dt-bindings/pinctrl/rockchip.h             |    3 +
 8 files changed, 1430 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

-- 
1.9.1

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#1601218 — [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328

From<cl@rock-chips.com>
Date2017-03-15 11:10 +0100
Subject[PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328
Message-ID<tle2u-689-23@gated-at.bofh.it>
In reply to#1601215
From: Chen Liang <cl@rock-chips.com>

The rk3328 saradc is the same as rk3399.

Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index 205593f..f81bc20 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -5,6 +5,7 @@ Required properties:
    - "rockchip,saradc": for rk3188, rk3288
    - "rockchip,rk3066-tsadc": for rk3036
    - "rockchip,rk3399-saradc": for rk3399
+   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
 
 - reg: physical base address of the controller and length of memory mapped
        region.
-- 
1.9.1

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#1602074 — Re: [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328

FromHeiko Stuebner <heiko@sntech.de>
Date2017-03-16 09:40 +0100
SubjectRe: [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328
Message-ID<tlz6V-42c-3@gated-at.bofh.it>
In reply to#1601218
Am Mittwoch, 15. März 2017, 18:03:52 CET schrieb cl@rock-chips.com:
> From: Chen Liang <cl@rock-chips.com>
> 
> The rk3328 saradc is the same as rk3399.
> 
> Signed-off-by: Chen Liang <cl@rock-chips.com>
> ---
>  Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
> b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt index
> 205593f..f81bc20 100644
> --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
> +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
> @@ -5,6 +5,7 @@ Required properties:
>     - "rockchip,saradc": for rk3188, rk3288
>     - "rockchip,rk3066-tsadc": for rk3036
>     - "rockchip,rk3399-saradc": for rk3399
> +   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328

not sure how iio people see that, but I would suggest keeping the order, so 
put rk3328 above rk3399.

Heiko

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#1603933 — Re: [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328

FromJonathan Cameron <jic23@kernel.org>
Date2017-03-19 11:40 +0100
SubjectRe: [PATCH v1 2/7] dt-bindings: iio: rockchip-saradc: add support for rk3328
Message-ID<tmGpH-4hW-1@gated-at.bofh.it>
In reply to#1602074
On 16/03/17 08:28, Heiko Stuebner wrote:
> Am Mittwoch, 15. März 2017, 18:03:52 CET schrieb cl@rock-chips.com:
>> From: Chen Liang <cl@rock-chips.com>
>>
>> The rk3328 saradc is the same as rk3399.
>>
>> Signed-off-by: Chen Liang <cl@rock-chips.com>
>> ---
>>  Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
>> b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt index
>> 205593f..f81bc20 100644
>> --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
>> +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
>> @@ -5,6 +5,7 @@ Required properties:
>>     - "rockchip,saradc": for rk3188, rk3288
>>     - "rockchip,rk3066-tsadc": for rk3036
>>     - "rockchip,rk3399-saradc": for rk3399
>> +   - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
> 
> not sure how iio people see that, but I would suggest keeping the order, so 
> put rk3328 above rk3399.
In my case I'm not that fussed either way. Still if this list keeps growing
I can see it would be better to keep it in numeric order!

Jonathan
> 
> Heiko
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>

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#1601221 — [PATCH v1 3/7] dt-bindings: i2c: rk3x: add support for rk3328

From<cl@rock-chips.com>
Date2017-03-15 11:10 +0100
Subject[PATCH v1 3/7] dt-bindings: i2c: rk3x: add support for rk3328
Message-ID<tle2u-689-25@gated-at.bofh.it>
In reply to#1601215
From: Chen Liang <cl@rock-chips.com>

The rk3328 i2c is the same as rk3399

Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index bbc5a1e..abfdefd 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -12,6 +12,7 @@ Required properties :
    - "rockchip,rk3228-i2c": for rk3228
    - "rockchip,rk3288-i2c": for rk3288
    - "rockchip,rk3399-i2c": for rk3399
+   - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328
  - interrupts : interrupt number
  - clocks: See ../clock/clock-bindings.txt
    - For older hardware (rk3066, rk3188, rk3228, rk3288):
-- 
1.9.1

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#1602082 — Re: [PATCH v1 3/7] dt-bindings: i2c: rk3x: add support for rk3328

FromHeiko Stuebner <heiko@sntech.de>
Date2017-03-16 09:40 +0100
SubjectRe: [PATCH v1 3/7] dt-bindings: i2c: rk3x: add support for rk3328
Message-ID<tlz6X-42c-43@gated-at.bofh.it>
In reply to#1601221
Am Mittwoch, 15. März 2017, 18:03:53 CET schrieb cl@rock-chips.com:
> From: Chen Liang <cl@rock-chips.com>
> 
> The rk3328 i2c is the same as rk3399
> 
> Signed-off-by: Chen Liang <cl@rock-chips.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
> b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt index bbc5a1e..abfdefd
> 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
> @@ -12,6 +12,7 @@ Required properties :
>     - "rockchip,rk3228-i2c": for rk3228
>     - "rockchip,rk3288-i2c": for rk3288
>     - "rockchip,rk3399-i2c": for rk3399
> +   - "rockchip,rk3328-i2c", "rockchip,rk3399-i2c": for rk3328
>   - interrupts : interrupt number
>   - clocks: See ../clock/clock-bindings.txt
>     - For older hardware (rk3066, rk3188, rk3228, rk3288):

same as before, not sure how people see that, but maybe place rk3328 before 
rk3399.

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#1601223 — [PATCH v1 4/7] dt-bindings: soc: rockchip: grf: add support for rk3328

From<cl@rock-chips.com>
Date2017-03-15 11:10 +0100
Subject[PATCH v1 4/7] dt-bindings: soc: rockchip: grf: add support for rk3328
Message-ID<tle2v-689-35@gated-at.bofh.it>
In reply to#1601215
From: Chen Liang <cl@rock-chips.com>

Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index a0685c2..db4da0b 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -18,6 +18,7 @@ Required Properties:
    - "rockchip,rk3288-grf", "syscon": for rk3288
    - "rockchip,rk3368-grf", "syscon": for rk3368
    - "rockchip,rk3399-grf", "syscon": for rk3399
+   - "rockchip,rk3328-grf", "syscon": for rk3328
 - compatible: PMUGRF should be one of the following:
    - "rockchip,rk3368-pmugrf", "syscon": for rk3368
    - "rockchip,rk3399-pmugrf", "syscon": for rk3399
-- 
1.9.1

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#1601303

FromHeiko Stübner <heiko@sntech.de>
Date2017-03-15 12:20 +0100
Message-ID<tlf8f-6Rk-27@gated-at.bofh.it>
In reply to#1601215
Hi Liang,

Am Mittwoch, 15. März 2017, 18:03:50 CET schrieb cl@rock-chips.com:
> From: Liang Chen <cl@rock-chips.com>
> 
> These patchs depend on pinctrl patchs as below:
> 
> https://patchwork.kernel.org/patch/9566427/
> https://patchwork.kernel.org/patch/9566425/
> https://patchwork.kernel.org/patch/9566431/
> 
> Chen Liang (7):
>   include: dt-bindings: Add pin function index definition for rockchip
>     pinctrl
>   dt-bindings: iio: rockchip-saradc: add support for rk3328
>   dt-bindings: i2c: rk3x: add support for rk3328
>   dt-bindings: soc: rockchip: grf: add support for rk3328

both my inbox as well as the linux-rockchip list did only get patches 1-4 it 
seems?

>   arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
>   arm64: dts: rockchip: add dts file for RK3328 evaluation board
>   dt-bindings: document rockchip rk3328-evb board

So right now I'm missing these next 3. Did something go wrong when sending?


Heiko

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#1601842 — [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

From<cl@rock-chips.com>
Date2017-03-16 02:50 +0100
Subject[PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board
Message-ID<tlsIa-7Ou-15@gated-at.bofh.it>
In reply to#1601215
From: Chen Liang <cl@rock-chips.com>

This patch add rk3328-evb.dts for RK3328 evaluation board.
Tested on RK3328 evb.

Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/Makefile       |  1 +
 arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 3a86289..853fc7d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
new file mode 100644
index 0000000..cf27239
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+	model = "Rockchip RK3328 EVB";
+	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
-- 
1.9.1

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#1602619 — Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

FromAndre Przywara <andre.przywara@arm.com>
Date2017-03-16 17:20 +0100
SubjectRe: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board
Message-ID<tlGi6-RT-25@gated-at.bofh.it>
In reply to#1601842
Hi Chen,

On 16/03/17 01:45, cl@rock-chips.com wrote:
> From: Chen Liang <cl@rock-chips.com>
> 
> This patch add rk3328-evb.dts for RK3328 evaluation board.
> Tested on RK3328 evb.
> 
> Signed-off-by: Chen Liang <cl@rock-chips.com>
> ---
>  arch/arm64/boot/dts/rockchip/Makefile       |  1 +
>  arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +++++++++++++++++++++++++++++
>  2 files changed, 58 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> 
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index 3a86289..853fc7d 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
>  
>  always		:= $(dtb-y)
>  subdir-y	:= $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> new file mode 100644
> index 0000000..cf27239
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> @@ -0,0 +1,57 @@
> +/*
> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + *  a) This library is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This library is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "rk3328.dtsi"
> +
> +/ {
> +	model = "Rockchip RK3328 EVB";
> +	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
> +
> +	chosen {
> +		stdout-path = "serial2:1500000n8";

Is that really 1.5MBit/s?

> +	};
> +};
> +
> +&uart2 {
> +	status = "okay";
> +};

I don't have the board, but would expect to see more peripherals
mentioned in the .dtsi enabled here.
For sure the board has an (micro)SD card slot, possibly even Ethernet?

Cheers,
Andre.

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#1603001 — Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

From陈亮 <cl@rock-chips.com>
Date2017-03-17 03:40 +0100
SubjectRe: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board
Message-ID<tlPY6-7zR-9@gated-at.bofh.it>
In reply to#1602619

在 2017年03月17日 00:18, Andre Przywara 写道:
> Hi Chen,
>
> On 16/03/17 01:45, cl@rock-chips.com wrote:
>> From: Chen Liang <cl@rock-chips.com>
>>
>> This patch add rk3328-evb.dts for RK3328 evaluation board.
>> Tested on RK3328 evb.
>>
>> Signed-off-by: Chen Liang <cl@rock-chips.com>
>> ---
>>   arch/arm64/boot/dts/rockchip/Makefile       |  1 +
>>   arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57 +++++++++++++++++++++++++++++
>>   2 files changed, 58 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
>> index 3a86289..853fc7d 100644
>> --- a/arch/arm64/boot/dts/rockchip/Makefile
>> +++ b/arch/arm64/boot/dts/rockchip/Makefile
>> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
>>   dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
>>   dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
>>   dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
>> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
>>   
>>   always		:= $(dtb-y)
>>   subdir-y	:= $(dts-dirs)
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
>> new file mode 100644
>> index 0000000..cf27239
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
>> @@ -0,0 +1,57 @@
>> +/*
>> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
>> + *
>> + *  a) This library is free software; you can redistribute it and/or
>> + *     modify it under the terms of the GNU General Public License as
>> + *     published by the Free Software Foundation; either version 2 of the
>> + *     License, or (at your option) any later version.
>> + *
>> + *     This library is distributed in the hope that it will be useful,
>> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + *     GNU General Public License for more details.
>> + *
>> + * Or, alternatively,
>> + *
>> + *  b) Permission is hereby granted, free of charge, to any person
>> + *     obtaining a copy of this software and associated documentation
>> + *     files (the "Software"), to deal in the Software without
>> + *     restriction, including without limitation the rights to use,
>> + *     copy, modify, merge, publish, distribute, sublicense, and/or
>> + *     sell copies of the Software, and to permit persons to whom the
>> + *     Software is furnished to do so, subject to the following
>> + *     conditions:
>> + *
>> + *     The above copyright notice and this permission notice shall be
>> + *     included in all copies or substantial portions of the Software.
>> + *
>> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> + *     OTHER DEALINGS IN THE SOFTWARE.
>> + */
>> +
>> +/dts-v1/;
>> +#include "rk3328.dtsi"
>> +
>> +/ {
>> +	model = "Rockchip RK3328 EVB";
>> +	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
>> +
>> +	chosen {
>> +		stdout-path = "serial2:1500000n8";
> Is that really 1.5MBit/s?
Yes, the RK3328 EVB board use 1.5MBit/s baud rate.
>
>> +	};
>> +};
>> +
>> +&uart2 {
>> +	status = "okay";
>> +};
> I don't have the board, but would expect to see more peripherals
> mentioned in the .dtsi enabled here.
> For sure the board has an (micro)SD card slot, possibly even Ethernet?
The codes for other peripherals are not ready now for new kernel, so i 
push a base dtsi, and other configration will be pushed later if it is ok.
> Cheers,
> Andre.
>

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#1603113 — Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

FromHeiko Stuebner <heiko@sntech.de>
Date2017-03-17 09:50 +0100
SubjectRe: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board
Message-ID<tlVKa-3Fq-13@gated-at.bofh.it>
In reply to#1603001
Am Freitag, 17. März 2017, 10:26:13 CET schrieb 陈亮:
> 在 2017年03月17日 00:18, Andre Przywara 写道:
> > Hi Chen,
> > 
> > On 16/03/17 01:45, cl@rock-chips.com wrote:
> >> From: Chen Liang <cl@rock-chips.com>
> >> 
> >> This patch add rk3328-evb.dts for RK3328 evaluation board.
> >> Tested on RK3328 evb.
> >> 
> >> Signed-off-by: Chen Liang <cl@rock-chips.com>
> >> ---
> >> 
> >>   arch/arm64/boot/dts/rockchip/Makefile       |  1 +
> >>   arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57
> >>   +++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+)
> >>   create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> >> 
> >> diff --git a/arch/arm64/boot/dts/rockchip/Makefile
> >> b/arch/arm64/boot/dts/rockchip/Makefile index 3a86289..853fc7d 100644
> >> --- a/arch/arm64/boot/dts/rockchip/Makefile
> >> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> >> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
> >> 
> >>   dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
> >>   dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
> >>   dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
> >> 
> >> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> >> 
> >>   always		:= $(dtb-y)
> >>   subdir-y	:= $(dts-dirs)
> >> 
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> >> b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts new file mode 100644
> >> index 0000000..cf27239
> >> --- /dev/null
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> >> @@ -0,0 +1,57 @@
> >> +/*
> >> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
> >> + *
> >> + * This file is dual-licensed: you can use it either under the terms
> >> + * of the GPL or the X11 license, at your option. Note that this dual
> >> + * licensing only applies to this file, and not this project as a
> >> + * whole.
> >> + *
> >> + *  a) This library is free software; you can redistribute it and/or
> >> + *     modify it under the terms of the GNU General Public License as
> >> + *     published by the Free Software Foundation; either version 2 of
> >> the
> >> + *     License, or (at your option) any later version.
> >> + *
> >> + *     This library is distributed in the hope that it will be useful,
> >> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + *     GNU General Public License for more details.
> >> + *
> >> + * Or, alternatively,
> >> + *
> >> + *  b) Permission is hereby granted, free of charge, to any person
> >> + *     obtaining a copy of this software and associated documentation
> >> + *     files (the "Software"), to deal in the Software without
> >> + *     restriction, including without limitation the rights to use,
> >> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> >> + *     sell copies of the Software, and to permit persons to whom the
> >> + *     Software is furnished to do so, subject to the following
> >> + *     conditions:
> >> + *
> >> + *     The above copyright notice and this permission notice shall be
> >> + *     included in all copies or substantial portions of the Software.
> >> + *
> >> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> >> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> >> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> >> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> >> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> >> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> >> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> >> + *     OTHER DEALINGS IN THE SOFTWARE.
> >> + */
> >> +
> >> +/dts-v1/;
> >> +#include "rk3328.dtsi"
> >> +
> >> +/ {
> >> +	model = "Rockchip RK3328 EVB";
> >> +	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
> >> +
> >> +	chosen {
> >> +		stdout-path = "serial2:1500000n8";
> > 
> > Is that really 1.5MBit/s?
> 
> Yes, the RK3328 EVB board use 1.5MBit/s baud rate.
> 
> >> +	};
> >> +};
> >> +
> >> +&uart2 {
> >> +	status = "okay";
> >> +};
> > 
> > I don't have the board, but would expect to see more peripherals
> > mentioned in the .dtsi enabled here.
> > For sure the board has an (micro)SD card slot, possibly even Ethernet?
> 
> The codes for other peripherals are not ready now for new kernel, so i
> push a base dtsi, and other configration will be pushed later if it is ok.

for me that approach is fine in general, but here, you could enable at least 
the watchdog as well?

But no need to resend just now, I still need to look at the big dtsi.


Heiko

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#1605397 — Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

From陈亮 <cl@rock-chips.com>
Date2017-03-21 09:10 +0100
SubjectRe: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board
Message-ID<tnn1F-xY-33@gated-at.bofh.it>
In reply to#1603113
Hi Heiko：

         Is there any advice about the big dtsi?
         I would like to send next version , thanks.

在 2017年03月17日 16:45, Heiko Stuebner 写道:
> Am Freitag, 17. März 2017, 10:26:13 CET schrieb 陈亮:
>> 在 2017年03月17日 00:18, Andre Przywara 写道:
>>> Hi Chen,
>>>
>>> On 16/03/17 01:45, cl@rock-chips.com wrote:
>>>> From: Chen Liang <cl@rock-chips.com>
>>>>
>>>> This patch add rk3328-evb.dts for RK3328 evaluation board.
>>>> Tested on RK3328 evb.
>>>>
>>>> Signed-off-by: Chen Liang <cl@rock-chips.com>
>>>> ---
>>>>
>>>>    arch/arm64/boot/dts/rockchip/Makefile       |  1 +
>>>>    arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57
>>>>    +++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+)
>>>>    create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
>>>>
>>>> diff --git a/arch/arm64/boot/dts/rockchip/Makefile
>>>> b/arch/arm64/boot/dts/rockchip/Makefile index 3a86289..853fc7d 100644
>>>> --- a/arch/arm64/boot/dts/rockchip/Makefile
>>>> +++ b/arch/arm64/boot/dts/rockchip/Makefile
>>>> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
>>>>
>>>>    dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
>>>>    dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
>>>>    dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
>>>>
>>>> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
>>>>
>>>>    always		:= $(dtb-y)
>>>>    subdir-y	:= $(dts-dirs)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
>>>> b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts new file mode 100644
>>>> index 0000000..cf27239
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
>>>> @@ -0,0 +1,57 @@
>>>> +/*
>>>> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
>>>> + *
>>>> + * This file is dual-licensed: you can use it either under the terms
>>>> + * of the GPL or the X11 license, at your option. Note that this dual
>>>> + * licensing only applies to this file, and not this project as a
>>>> + * whole.
>>>> + *
>>>> + *  a) This library is free software; you can redistribute it and/or
>>>> + *     modify it under the terms of the GNU General Public License as
>>>> + *     published by the Free Software Foundation; either version 2 of
>>>> the
>>>> + *     License, or (at your option) any later version.
>>>> + *
>>>> + *     This library is distributed in the hope that it will be useful,
>>>> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
>>>> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>>> + *     GNU General Public License for more details.
>>>> + *
>>>> + * Or, alternatively,
>>>> + *
>>>> + *  b) Permission is hereby granted, free of charge, to any person
>>>> + *     obtaining a copy of this software and associated documentation
>>>> + *     files (the "Software"), to deal in the Software without
>>>> + *     restriction, including without limitation the rights to use,
>>>> + *     copy, modify, merge, publish, distribute, sublicense, and/or
>>>> + *     sell copies of the Software, and to permit persons to whom the
>>>> + *     Software is furnished to do so, subject to the following
>>>> + *     conditions:
>>>> + *
>>>> + *     The above copyright notice and this permission notice shall be
>>>> + *     included in all copies or substantial portions of the Software.
>>>> + *
>>>> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>>> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>>>> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>>>> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>>>> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>>>> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>>> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>>> + *     OTHER DEALINGS IN THE SOFTWARE.
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +#include "rk3328.dtsi"
>>>> +
>>>> +/ {
>>>> +	model = "Rockchip RK3328 EVB";
>>>> +	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
>>>> +
>>>> +	chosen {
>>>> +		stdout-path = "serial2:1500000n8";
>>> Is that really 1.5MBit/s?
>> Yes, the RK3328 EVB board use 1.5MBit/s baud rate.
>>
>>>> +	};
>>>> +};
>>>> +
>>>> +&uart2 {
>>>> +	status = "okay";
>>>> +};
>>> I don't have the board, but would expect to see more peripherals
>>> mentioned in the .dtsi enabled here.
>>> For sure the board has an (micro)SD card slot, possibly even Ethernet?
>> The codes for other peripherals are not ready now for new kernel, so i
>> push a base dtsi, and other configration will be pushed later if it is ok.
> for me that approach is fine in general, but here, you could enable at least
> the watchdog as well?
>
> But no need to resend just now, I still need to look at the big dtsi.
>
>
> Heiko
>

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#1605436 — Re: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board

FromHeiko Stübner <heiko@sntech.de>
Date2017-03-21 10:00 +0100
SubjectRe: [PATCH v1 6/7] arm64: dts: rockchip: add dts file for RK3328 evaluation board
Message-ID<tnnO2-Sm-7@gated-at.bofh.it>
In reply to#1605397
Hi,

Am Dienstag, 21. März 2017, 15:59:50 CET schrieb 陈亮:
> Hi Heiko：
> 
>          Is there any advice about the big dtsi?
>          I would like to send next version , thanks.

I did comment on your v2 dtsi though :-) .

Heiko

> 在 2017年03月17日 16:45, Heiko Stuebner 写道:
> > Am Freitag, 17. März 2017, 10:26:13 CET schrieb 陈亮:
> >> 在 2017年03月17日 00:18, Andre Przywara 写道:
> >>> Hi Chen,
> >>> 
> >>> On 16/03/17 01:45, cl@rock-chips.com wrote:
> >>>> From: Chen Liang <cl@rock-chips.com>
> >>>> 
> >>>> This patch add rk3328-evb.dts for RK3328 evaluation board.
> >>>> Tested on RK3328 evb.
> >>>> 
> >>>> Signed-off-by: Chen Liang <cl@rock-chips.com>
> >>>> ---
> >>>> 
> >>>>    arch/arm64/boot/dts/rockchip/Makefile       |  1 +
> >>>>    arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 57
> >>>>    +++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+)
> >>>>    create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> >>>> 
> >>>> diff --git a/arch/arm64/boot/dts/rockchip/Makefile
> >>>> b/arch/arm64/boot/dts/rockchip/Makefile index 3a86289..853fc7d 100644
> >>>> --- a/arch/arm64/boot/dts/rockchip/Makefile
> >>>> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> >>>> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=
> >>>> rk3368-orion-r68-meta.dtb
> >>>> 
> >>>>    dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
> >>>>    dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
> >>>>    dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
> >>>> 
> >>>> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> >>>> 
> >>>>    always		:= $(dtb-y)
> >>>>    subdir-y	:= $(dts-dirs)
> >>>> 
> >>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> >>>> b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts new file mode 100644
> >>>> index 0000000..cf27239
> >>>> --- /dev/null
> >>>> +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> >>>> @@ -0,0 +1,57 @@
> >>>> +/*
> >>>> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
> >>>> + *
> >>>> + * This file is dual-licensed: you can use it either under the terms
> >>>> + * of the GPL or the X11 license, at your option. Note that this dual
> >>>> + * licensing only applies to this file, and not this project as a
> >>>> + * whole.
> >>>> + *
> >>>> + *  a) This library is free software; you can redistribute it and/or
> >>>> + *     modify it under the terms of the GNU General Public License as
> >>>> + *     published by the Free Software Foundation; either version 2 of
> >>>> the
> >>>> + *     License, or (at your option) any later version.
> >>>> + *
> >>>> + *     This library is distributed in the hope that it will be useful,
> >>>> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> >>>> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >>>> + *     GNU General Public License for more details.
> >>>> + *
> >>>> + * Or, alternatively,
> >>>> + *
> >>>> + *  b) Permission is hereby granted, free of charge, to any person
> >>>> + *     obtaining a copy of this software and associated documentation
> >>>> + *     files (the "Software"), to deal in the Software without
> >>>> + *     restriction, including without limitation the rights to use,
> >>>> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> >>>> + *     sell copies of the Software, and to permit persons to whom the
> >>>> + *     Software is furnished to do so, subject to the following
> >>>> + *     conditions:
> >>>> + *
> >>>> + *     The above copyright notice and this permission notice shall be
> >>>> + *     included in all copies or substantial portions of the Software.
> >>>> + *
> >>>> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> >>>> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> >>>> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> >>>> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> >>>> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> >>>> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> >>>> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> >>>> + *     OTHER DEALINGS IN THE SOFTWARE.
> >>>> + */
> >>>> +
> >>>> +/dts-v1/;
> >>>> +#include "rk3328.dtsi"
> >>>> +
> >>>> +/ {
> >>>> +	model = "Rockchip RK3328 EVB";
> >>>> +	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
> >>>> +
> >>>> +	chosen {
> >>>> +		stdout-path = "serial2:1500000n8";
> >>> 
> >>> Is that really 1.5MBit/s?
> >> 
> >> Yes, the RK3328 EVB board use 1.5MBit/s baud rate.
> >> 
> >>>> +	};
> >>>> +};
> >>>> +
> >>>> +&uart2 {
> >>>> +	status = "okay";
> >>>> +};
> >>> 
> >>> I don't have the board, but would expect to see more peripherals
> >>> mentioned in the .dtsi enabled here.
> >>> For sure the board has an (micro)SD card slot, possibly even Ethernet?
> >> 
> >> The codes for other peripherals are not ready now for new kernel, so i
> >> push a base dtsi, and other configration will be pushed later if it is
> >> ok.
> > 
> > for me that approach is fine in general, but here, you could enable at
> > least the watchdog as well?
> > 
> > But no need to resend just now, I still need to look at the big dtsi.
> > 
> > 
> > Heiko

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#1601844 — [PATCH v1 5/7] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs

From<cl@rock-chips.com>
Date2017-03-16 02:50 +0100
Subject[PATCH v1 5/7] arm64: dts: rockchip: add core dtsi file for RK3328 SoCs
Message-ID<tlsIa-7Ou-23@gated-at.bofh.it>
In reply to#1601215
From: Chen Liang <cl@rock-chips.com>

This patch adds core dtsi file for Rockchip RK3328 SoCs.

Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1362 ++++++++++++++++++++++++++++++
 1 file changed, 1362 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
new file mode 100644
index 0000000..ff53af9
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -0,0 +1,1362 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/clock/rk3328-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/power/rk3328-power.h>
+
+/ {
+	compatible = "rockchip,rk3328";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+			clocks = <&cru ARMCLK>;
+		};
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+
+	grf: syscon@ff100000 {
+		compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xff100000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		power: power-controller {
+			compatible = "rockchip,rk3328-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			pd_hevc@RK3328_PD_HEVC {
+				reg = <RK3328_PD_HEVC>;
+			};
+			pd_video@RK3328_PD_VIDEO {
+				reg = <RK3328_PD_VIDEO>;
+			};
+			pd_vpu@RK3328_PD_VPU {
+				reg = <RK3328_PD_VPU>;
+			};
+		};
+
+		reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x5c8>;
+			mode-normal = <BOOT_NORMAL>;
+			mode-recovery = <BOOT_RECOVERY>;
+			mode-bootloader = <BOOT_FASTBOOT>;
+			mode-loader = <BOOT_BL_DOWNLOAD>;
+		};
+
+	};
+
+	uart0: serial@ff110000 {
+		compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff110000 0x0 0x100>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 2>, <&dmac 3>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		status = "disabled";
+	};
+
+	uart1: serial@ff120000 {
+		compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff120000 0x0 0x100>;
+		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "sclk_uart", "pclk_uart";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 4>, <&dmac 5>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff130000 {
+		compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff130000 0x0 0x100>;
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 6>, <&dmac 7>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m1_xfer>;
+		status = "disabled";
+	};
+
+	i2c0: i2c@ff150000 {
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xff150000 0x0 0x1000>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		status = "disabled";
+	};
+
+	i2c1: i2c@ff160000 {
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xff160000 0x0 0x1000>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff170000 {
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xff170000 0x0 0x1000>;
+		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_xfer>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@ff180000 {
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
+		reg = <0x0 0xff180000 0x0 0x1000>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3_xfer>;
+		status = "disabled";
+	};
+
+	spi0: spi@ff190000 {
+		compatible = "rockchip,rk3328-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff190000 0x0 0x1000>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 8>, <&dmac 9>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;
+		status = "disabled";
+	};
+
+	wdt: watchdog@ff1a0000 {
+		compatible = "snps,dw-wdt";
+		reg = <0x0 0xff1a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac: dmac@ff1f0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff1f0000 0x0 0x4000>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru ACLK_DMAC>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+		};
+	};
+
+	saradc: saradc@ff280000 {
+		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	cru: clock-controller@ff440000 {
+		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
+		reg = <0x0 0xff440000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		assigned-clocks =
+			<&cru DCLK_LCDC>, <&cru SCLK_PDM>,
+			<&cru SCLK_RTC32K>, <&cru SCLK_UART0>,
+			<&cru SCLK_UART1>, <&cru SCLK_UART2>,
+			<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+			<&cru ACLK_VIO_PRE>, <&cru ACLK_RGA_PRE>,
+			<&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>,
+			<&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>,
+			<&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
+			<&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>,
+			<&cru SCLK_SDIO>, <&cru SCLK_TSP>,
+			<&cru SCLK_WIFI>, <&cru ARMCLK>,
+			<&cru PLL_GPLL>, <&cru PLL_CPLL>,
+			<&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
+			<&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
+			<&cru HCLK_PERI>, <&cru PCLK_PERI>,
+			<&cru ACLK_VIO_PRE>, <&cru HCLK_VIO_PRE>,
+			<&cru ACLK_RGA_PRE>, <&cru SCLK_RGA>,
+			<&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>,
+			<&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>,
+			<&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
+			<&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>,
+			<&cru SCLK_EFUSE>, <&cru PCLK_DDR>,
+			<&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
+			<&cru SCLK_RTC32K>, <&cru SCLK_USB3OTG_SUSPEND>;
+		assigned-clock-parents =
+			<&cru HDMIPHY>, <&cru PLL_APLL>,
+			<&cru PLL_GPLL>, <&xin24m>,
+			<&xin24m>, <&xin24m>;
+		assigned-clock-rates =
+			<0>, <61440000>,
+			<0>, <24000000>,
+			<24000000>, <24000000>,
+			<15000000>, <15000000>,
+			<100000000>, <100000000>,
+			<100000000>, <100000000>,
+			<50000000>, <100000000>,
+			<100000000>, <100000000>,
+			<50000000>, <50000000>,
+			<50000000>, <50000000>,
+			<24000000>, <600000000>,
+			<491520000>, <1200000000>,
+			<150000000>, <75000000>,
+			<75000000>, <150000000>,
+			<75000000>, <75000000>,
+			<300000000>, <100000000>,
+			<300000000>, <200000000>,
+			<400000000>, <500000000>,
+			<200000000>, <300000000>,
+			<300000000>, <250000000>,
+			<200000000>, <100000000>,
+			<24000000>, <100000000>,
+			<150000000>, <50000000>,
+			<32768>, <32768>;
+	};
+
+	gmac2io: eth@ff540000 {
+		compatible = "rockchip,rk3328-gmac";
+		reg = <0x0 0xff540000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
+			 <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>,
+			 <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>,
+			 <&cru PCLK_MAC2IO>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac";
+		resets = <&cru SRST_GMAC2IO_A>;
+		reset-names = "stmmaceth";
+		status = "disabled";
+	};
+
+	gic: interrupt-controller@ff811000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x0 0xff811000 0 0x1000>,
+		      <0x0 0xff812000 0 0x2000>,
+		      <0x0 0xff814000 0 0x2000>,
+		      <0x0 0xff816000 0 0x2000>;
+		interrupts = <GIC_PPI 9
+		      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3328-pinctrl";
+		rockchip,grf = <&grf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff210000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff210000 0x0 0x100>;
+			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff220000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff220000 0x0 0x100>;
+			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff230000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff230000 0x0 0x100>;
+			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff240000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff240000 0x0 0x100>;
+			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					<2 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+					<2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					<2 RK_PA4 RK_FUNC_2 &pcfg_pull_none>,
+					<2 RK_PA5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+					<2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins =
+					<0 RK_PA5 RK_FUNC_2 &pcfg_pull_none>,
+					<0 RK_PA6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+			i2c3_gpio: i2c3-gpio {
+				rockchip,pins =
+					<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
+					<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		hdmi_i2c {
+			hdmii2c_xfer: hdmii2c-xfer {
+				rockchip,pins =
+					<0 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		tsadc {
+			otp_gpio: otp-gpio {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			otp_out: otp-out {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					<1 RK_PB1 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts_gpio: uart0-rts-gpio {
+				rockchip,pins =
+					<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins =
+					<3 RK_PA4 RK_FUNC_4 &pcfg_pull_up>,
+					<3 RK_PA6 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<3 RK_PA5 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			uart1_rts_gpio: uart1-rts-gpio {
+				rockchip,pins =
+					<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart2-0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PA1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					<2 RK_PA0 RK_FUNC_1 &pcfg_pull_up>,
+					<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0-0 {
+			spi0m0_clk: spi0m0-clk {
+				rockchip,pins =
+					<2 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+			};
+
+			spi0m0_cs0: spi0m0-cs0 {
+				rockchip,pins =
+					<2 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
+			};
+
+			spi0m0_tx: spi0m0-tx {
+				rockchip,pins =
+					<2 RK_PB1 RK_FUNC_1 &pcfg_pull_up>;
+			};
+
+			spi0m0_rx: spi0m0-rx {
+				rockchip,pins =
+					<2 RK_PB2 RK_FUNC_1 &pcfg_pull_up>;
+			};
+
+			spi0m0_cs1: spi0m0-cs1 {
+				rockchip,pins =
+					<2 RK_PB4 RK_FUNC_1 &pcfg_pull_up>;
+			};
+		};
+
+		spi0-1 {
+			spi0m1_clk: spi0m1-clk {
+				rockchip,pins =
+					<3 RK_PC7 RK_FUNC_2 &pcfg_pull_up>;
+			};
+
+			spi0m1_cs0: spi0m1-cs0 {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_2 &pcfg_pull_up>;
+			};
+
+			spi0m1_tx: spi0m1-tx {
+				rockchip,pins =
+					<3 RK_PD1 RK_FUNC_2 &pcfg_pull_up>;
+			};
+
+			spi0m1_rx: spi0m1-rx {
+				rockchip,pins =
+					<3 RK_PD0 RK_FUNC_2 &pcfg_pull_up>;
+			};
+
+			spi0m1_cs1: spi0m1-cs1 {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_2 &pcfg_pull_up>;
+			};
+		};
+
+		spi0-2 {
+			spi0m2_clk: spi0m2-clk {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi0m2_cs0: spi0m2-cs0 {
+				rockchip,pins =
+					<3 RK_PB0 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0m2_tx: spi0m2-tx {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi0m2_rx: spi0m2-rx {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_4 &pcfg_pull_up>;
+			};
+		};
+
+		i2s1 {
+			i2s1_mclk: i2s1-mclk {
+				rockchip,pins =
+					<2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sclk: i2s1-sclk {
+				rockchip,pins =
+					<2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_lrckrx: i2s1-lrckrx {
+				rockchip,pins =
+					<2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_lrcktx: i2s1-lrcktx {
+				rockchip,pins =
+					<2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sdi: i2s1-sdi {
+				rockchip,pins =
+					<2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sdo: i2s1-sdo {
+				rockchip,pins =
+					<2 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sdio1: i2s1-sdio1 {
+				rockchip,pins =
+					<2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sdio2: i2s1-sdio2 {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sdio3: i2s1-sdio3 {
+				rockchip,pins =
+					<2 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_sleep: i2s1-sleep {
+				rockchip,pins =
+					<2 RK_PB7 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC0 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC1 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+		};
+
+		i2s2-0 {
+			i2s2m0_mclk: i2s2m0-mclk {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m0_sclk: i2s2m0-sclk {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m0_lrckrx: i2s2m0-lrckrx {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m0_lrcktx: i2s2m0-lrcktx {
+				rockchip,pins =
+					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m0_sdi: i2s2m0-sdi {
+				rockchip,pins =
+					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m0_sdo: i2s2m0-sdo {
+				rockchip,pins =
+					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m0_sleep: i2s2m0-sleep {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+		};
+
+		i2s2-1 {
+			i2s2m1_mclk: i2s2m1-mclk {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s2m1_sclk: i2s2m1-sclk {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_6 &pcfg_pull_none>;
+			};
+
+			i2s2m1_lrckrx: i2sm1-lrckrx {
+				rockchip,pins =
+					<3 RK_PB0 RK_FUNC_6 &pcfg_pull_none>;
+			};
+
+			i2s2m1_lrcktx: i2s2m1-lrcktx {
+				rockchip,pins =
+					<3 RK_PB0 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			i2s2m1_sdi: i2s2m1-sdi {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_6 &pcfg_pull_none>;
+			};
+
+			i2s2m1_sdo: i2s2m1-sdo {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_6 &pcfg_pull_none>;
+			};
+
+			i2s2m1_sleep: i2s2m1-sleep {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PA0 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PB0 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PA2 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PA1 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+		};
+
+		spdif-0 {
+			spdifm0_tx: spdifm0-tx {
+				rockchip,pins =
+					<0 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		spdif-1 {
+			spdifm1_tx: spdifm1-tx {
+				rockchip,pins =
+					<2 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		spdif-2 {
+			spdifm2_tx: spdifm2-tx {
+				rockchip,pins =
+					<0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc0-0 {
+			sdmmc0m0_pwren: sdmmc0m0-pwren {
+				rockchip,pins =
+					<2 RK_PA7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0m0_gpio: sdmmc0m0-gpio {
+				rockchip,pins =
+					<2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdmmc0-1 {
+			sdmmc0m1_pwren: sdmmc0m1-pwren {
+				rockchip,pins =
+					<0 RK_PD6 RK_FUNC_3 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0m1_gpio: sdmmc0m1-gpio {
+				rockchip,pins =
+					<0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdmmc0 {
+			sdmmc0_clk: sdmmc0-clk {
+				rockchip,pins =
+					<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc0_cmd: sdmmc0-cmd {
+				rockchip,pins =
+					<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_dectn: sdmmc0-dectn {
+				rockchip,pins =
+					<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_wrprt: sdmmc0-wrprt {
+				rockchip,pins =
+					<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_bus1: sdmmc0-bus1 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_bus4: sdmmc0-bus4 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_gpio: sdmmc0-gpio {
+				rockchip,pins =
+					<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdmmc0ext {
+			sdmmc0ext_clk: sdmmc0ext-clk {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_3 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc0ext_cmd: sdmmc0ext-cmd {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_3 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0ext_wrprt: sdmmc0ext-wrprt {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_3 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0ext_dectn: sdmmc0ext-dectn {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_3 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0ext_bus1: sdmmc0ext-bus1 {
+				rockchip,pins =
+					<3 RK_PA4 RK_FUNC_3 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0ext_bus4: sdmmc0ext-bus4 {
+				rockchip,pins =
+					<3 RK_PA4 RK_FUNC_3 &pcfg_pull_up_4ma>,
+					<3 RK_PA5 RK_FUNC_3 &pcfg_pull_up_4ma>,
+					<3 RK_PA6 RK_FUNC_3 &pcfg_pull_up_4ma>,
+					<3 RK_PA7 RK_FUNC_3 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0ext_gpio: sdmmc0ext-gpio {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdmmc1 {
+			sdmmc1_clk: sdmmc1-clk {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>;
+			};
+
+			sdmmc1_cmd: sdmmc1-cmd {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_pwren: sdmmc1-pwren {
+				rockchip,pins =
+					<1 RK_PC2 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_wrprt: sdmmc1-wrprt {
+				rockchip,pins =
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_dectn: sdmmc1-dectn {
+				rockchip,pins =
+					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_bus1: sdmmc1-bus1 {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_bus4: sdmmc1-bus4 {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PB5 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PC0 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PC1 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_gpio: sdmmc1-gpio {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					<3 RK_PC5 RK_FUNC_2 &pcfg_pull_none_12ma>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<3 RK_PC3 RK_FUNC_2 &pcfg_pull_up_12ma>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_rstnout: emmc-rstnout {
+				rockchip,pins =
+					<3 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins =
+					<0 RK_PA7 RK_FUNC_2 &pcfg_pull_up_12ma>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins =
+					<0 RK_PA7 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD4 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD5 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD6 RK_FUNC_2 &pcfg_pull_up_12ma>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					<0 RK_PA7 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD4 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD5 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD6 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<2 RK_PD7 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<3 RK_PC0 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<3 RK_PC1 RK_FUNC_2 &pcfg_pull_up_12ma>,
+					<3 RK_PC2 RK_FUNC_2 &pcfg_pull_up_12ma>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwmir {
+			pwmir_pin: pwmir-pin {
+				rockchip,pins =
+					<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		gmac-1 {
+			rgmiim1_pins: rgmiim1-pins {
+				rockchip,pins =
+					/* mac_txclk */
+					<1 RK_PB4 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_rxclk */
+					<1 RK_PB5 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_mdio */
+					<1 RK_PC3 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_txen */
+					<1 RK_PD1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_clk */
+					<1 RK_PC5 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxdv */
+					<1 RK_PC6 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_mdc */
+					<1 RK_PC7 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxd1 */
+					<1 RK_PB2 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxd0 */
+					<1 RK_PB3 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_txd1 */
+					<1 RK_PB0 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<1 RK_PB1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_rxd3 */
+					<1 RK_PB6 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxd2 */
+					<1 RK_PB7 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_txd3 */
+					<1 RK_PC0 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd2 */
+					<1 RK_PC1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+
+					/* mac_txclk */
+					<0 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txen */
+					<0 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_clk */
+					<0 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txd1 */
+					<0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txd0 */
+					<0 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txd3 */
+					<0 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txd2 */
+					<0 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			rmiim1_pins: rmiim1-pins {
+				rockchip,pins =
+					/* mac_mdio */
+					<1 RK_PC3 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_txen */
+					<1 RK_PD1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_clk */
+					<1 RK_PC5 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxer */
+					<1 RK_PD0 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxdv */
+					<1 RK_PC6 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_mdc */
+					<1 RK_PC7 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxd1 */
+					<1 RK_PB2 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_rxd0 */
+					<1 RK_PB3 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					/* mac_txd1 */
+					<1 RK_PB0 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<1 RK_PB1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+
+					/* mac_mdio */
+					<0 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txen */
+					<0 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_clk */
+					<0 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_mdc */
+					<0 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txd1 */
+					<0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+					/* mac_txd0 */
+					<0 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		gmac2phy {
+			fephyled_speed100: fephyled-speed100 {
+				rockchip,pins =
+					<0 RK_PD7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			fephyled_speed10: fephyled-speed10 {
+				rockchip,pins =
+					<0 RK_PD6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			fephyled_duplex: fephyled-duplex {
+				rockchip,pins =
+					<0 RK_PD6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			fephyled_rxm0: fephyled-rxm0 {
+				rockchip,pins =
+					<0 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			fephyled_txm0: fephyled-txm0 {
+				rockchip,pins =
+					<0 RK_PD5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			fephyled_linkm0: fephyled-linkm0 {
+				rockchip,pins =
+					<0 RK_PD4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			fephyled_rxm1: fephyled-rxm1 {
+				rockchip,pins =
+					<2 RK_PD1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			fephyled_txm1: fephyled-txm1 {
+				rockchip,pins =
+					<2 RK_PD1 RK_FUNC_3 &pcfg_pull_none>;
+			};
+
+			fephyled_linkm1: fephyled-linkm1 {
+				rockchip,pins =
+					<2 RK_PD0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		tsadc_pin {
+			tsadc_int: tsadc-int {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+			tsadc_gpio: tsadc-gpio {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		hdmi_pin {
+			hdmi_cec: hdmi-cec {
+				rockchip,pins =
+					<0 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			hdmi_hpd: hdmi-hpd {
+				rockchip,pins =
+					<0 RK_PA4 RK_FUNC_1 &pcfg_pull_down>;
+			};
+		};
+
+		cif-0 {
+			dvp_d2d9_m0:dvp-d2d9-m0 {
+				rockchip,pins =
+					/* cif_d0 */
+					<3 RK_PA4 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d1 */
+					<3 RK_PA5 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d2 */
+					<3 RK_PA6 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d3 */
+					<3 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d4 */
+					<3 RK_PB0 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d5m0 */
+					<3 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d6m0 */
+					<3 RK_PB2 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d7m0 */
+					<3 RK_PB3 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_href */
+					<3 RK_PA1 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_vsync */
+					<3 RK_PA0 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_clkoutm0 */
+					<3 RK_PA3 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_clkin */
+					<3 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		cif-1 {
+			dvp_d2d9_m1:dvp-d2d9-m1 {
+				rockchip,pins =
+					/* cif_d0 */
+					<3 RK_PA4 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d1 */
+					<3 RK_PA5 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d2 */
+					<3 RK_PA6 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d3 */
+					<3 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d4 */
+					<3 RK_PB0 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_d5m1 */
+					<2 RK_PC0 RK_FUNC_4 &pcfg_pull_none>,
+					/* cif_d6m1 */
+					<2 RK_PC1 RK_FUNC_4 &pcfg_pull_none>,
+					/* cif_d7m1 */
+					<2 RK_PC2 RK_FUNC_4 &pcfg_pull_none>,
+					/* cif_href */
+					<3 RK_PA1 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_vsync */
+					<3 RK_PA0 RK_FUNC_2 &pcfg_pull_none>,
+					/* cif_clkoutm1 */
+					<2 RK_PB7 RK_FUNC_4 &pcfg_pull_none>,
+					/* cif_clkin */
+					<3 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+	};
+};
-- 
1.9.1

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#1601847 — [PATCH v1 7/7] dt-bindings: document rockchip rk3328-evb board

From<cl@rock-chips.com>
Date2017-03-16 03:00 +0100
Subject[PATCH v1 7/7] dt-bindings: document rockchip rk3328-evb board
Message-ID<tlsRP-7RZ-3@gated-at.bofh.it>
In reply to#1601215
From: Chen Liang <cl@rock-chips.com>

Use "rockchip,rk3328-evb" compatible string for Rockchip RK3328
evaluation board.

Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index cc4ace6..17611cd 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -141,3 +141,7 @@ Rockchip platforms device tree bindings
 - Tronsmart Orion R68 Meta
     Required root node properties:
       - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
+
+- Rockchip RK3328 evb:
+    Required root node properties:
+      - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-- 
1.9.1

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