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[PATCH 0/4] arm64: dts: rockchip: add more nodes for RK3368 SoCs

Started byJianqun Xu <jay.xu@rock-chips.com>
First post2017-03-15 07:20 +0100
Last post2017-03-15 07:20 +0100
Articles 5 — 1 participant

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Contents

  [PATCH 0/4] arm64: dts: rockchip: add more nodes for RK3368 SoCs Jianqun Xu <jay.xu@rock-chips.com> - 2017-03-15 07:20 +0100
    [PATCH 3/4] arm64: dts: rockchip: add amba node support for RK3368 SoCs Jianqun Xu <jay.xu@rock-chips.com> - 2017-03-15 07:20 +0100
    [PATCH 2/4] arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs Jianqun Xu <jay.xu@rock-chips.com> - 2017-03-15 07:20 +0100
    [PATCH 4/4] arm64: dts: rockchip: disable mailbox of RK3368 SoCs defaultly Jianqun Xu <jay.xu@rock-chips.com> - 2017-03-15 07:20 +0100
    [PATCH 1/4] ASoC: rockchip: add bindings for rk3368 i2s Jianqun Xu <jay.xu@rock-chips.com> - 2017-03-15 07:20 +0100

#1601080 — [PATCH 0/4] arm64: dts: rockchip: add more nodes for RK3368 SoCs

FromJianqun Xu <jay.xu@rock-chips.com>
Date2017-03-15 07:20 +0100
Subject[PATCH 0/4] arm64: dts: rockchip: add more nodes for RK3368 SoCs
Message-ID<tlarT-3wO-3@gated-at.bofh.it>
Add more nodes to RK3368 core dts file for RK3368 SoCs, and disable mailbox
in core dts file.

Jianqun Xu (4):
  ASoC: rockchip: add bindings for rk3368 i2s
  arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
  arm64: dts: rockchip: add amba node support for RK3368 SoCs
  arm64: dts: rockchip: disable mailbox of RK3368 SoCs defaultly

 .../devicetree/bindings/sound/rockchip-i2s.txt     |  1 +
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           | 70 ++++++++++++++++++++++
 2 files changed, 71 insertions(+)

-- 
1.9.1

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#1601082 — [PATCH 3/4] arm64: dts: rockchip: add amba node support for RK3368 SoCs

FromJianqun Xu <jay.xu@rock-chips.com>
Date2017-03-15 07:20 +0100
Subject[PATCH 3/4] arm64: dts: rockchip: add amba node support for RK3368 SoCs
Message-ID<tlarU-3wO-9@gated-at.bofh.it>
In reply to#1601080
There are two dmacs found on RK3368 SoCs, peripher dmac and bus dmac,
and the dmacs are same as previous SoCs' dmac.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a6eb3e4..90f72c2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -204,6 +204,37 @@
 				     <&cpu_b2>, <&cpu_b3>;
 	};
 
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac_peri: dma-controller@ff250000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff250000 0x0 0x4000>;
+			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			clocks = <&cru ACLK_DMAC_PERI>;
+			clock-names = "apb_pclk";
+			arm,pl330-broken-no-flushp;
+			peripherals-req-type-burst;
+		};
+
+		dmac_bus: dma-controller@ff600000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff600000 0x0 0x4000>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			clocks = <&cru ACLK_DMAC_BUS>;
+			clock-names = "apb_pclk";
+			arm,pl330-broken-no-flushp;
+			peripherals-req-type-burst;
+		};
+	};
+
 	psci {
 		compatible = "arm,psci-0.2";
 		method = "smc";
-- 
1.9.1

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#1601083 — [PATCH 2/4] arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs

FromJianqun Xu <jay.xu@rock-chips.com>
Date2017-03-15 07:20 +0100
Subject[PATCH 2/4] arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
Message-ID<tlarU-3wO-13@gated-at.bofh.it>
In reply to#1601080
I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip,
add nodes to support them.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 38 ++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a635adc..a6eb3e4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -684,6 +684,30 @@
 		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	i2s0: i2s0@ff890000 {
+		compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff890000 0x0 0x1000>;
+		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac_bus 6>, <&dmac_bus 7>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_clk", "i2s_hclk";
+		clocks = <&cru SCLK_I2S_2CH>, <&cru HCLK_I2S_2CH>;
+		status = "disabled";
+	};
+
+	i2s1: i2s1@ff898000 {
+		compatible = "rockchip,rk3368-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff898000 0x0 0x1000>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		dmas = <&dmac_bus 0>, <&dmac_bus 1>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_clk", "i2s_hclk";
+		clocks = <&cru SCLK_I2S_8CH>, <&cru HCLK_I2S_8CH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@ffb71000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
@@ -886,6 +910,20 @@
 			};
 		};
 
+		i2s {
+			i2s1: i2s1 {
+				rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_none>,
+						<2 13 RK_FUNC_1 &pcfg_pull_none>,
+						<2 14 RK_FUNC_1 &pcfg_pull_none>,
+						<2 15 RK_FUNC_1 &pcfg_pull_none>,
+						<2 16 RK_FUNC_1 &pcfg_pull_none>,
+						<2 17 RK_FUNC_1 &pcfg_pull_none>,
+						<2 18 RK_FUNC_1 &pcfg_pull_none>,
+						<2 19 RK_FUNC_1 &pcfg_pull_none>,
+						<2 20 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		pwm0 {
 			pwm0_pin: pwm0-pin {
 				rockchip,pins = <3 8 RK_FUNC_2 &pcfg_pull_none>;
-- 
1.9.1

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#1601084 — [PATCH 4/4] arm64: dts: rockchip: disable mailbox of RK3368 SoCs defaultly

FromJianqun Xu <jay.xu@rock-chips.com>
Date2017-03-15 07:20 +0100
Subject[PATCH 4/4] arm64: dts: rockchip: disable mailbox of RK3368 SoCs defaultly
Message-ID<tlarU-3wO-19@gated-at.bofh.it>
In reply to#1601080
Default to disable mailbox in rk3368 core dts file.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 90f72c2..36aeed0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -662,6 +662,7 @@
 		clocks = <&cru PCLK_MAILBOX>;
 		clock-names = "pclk_mailbox";
 		#mbox-cells = <1>;
+		status = "disabled";
 	};
 
 	pmugrf: syscon@ff738000 {
-- 
1.9.1

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#1601087 — [PATCH 1/4] ASoC: rockchip: add bindings for rk3368 i2s

FromJianqun Xu <jay.xu@rock-chips.com>
Date2017-03-15 07:20 +0100
Subject[PATCH 1/4] ASoC: rockchip: add bindings for rk3368 i2s
Message-ID<tlarU-3wO-15@gated-at.bofh.it>
In reply to#1601080
Add devicetree bindings for i2s controller found on rk3368
processors from rockchip.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
index a6600f6..206aba1 100644
--- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
@@ -9,6 +9,7 @@ Required properties:
    - "rockchip,rk3066-i2s": for rk3066
    - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
    - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
+   - "rockchip,rk3368-i2s", "rockchip,rk3066-i2s": for rk3368
    - "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
 - reg: physical base address of the controller and length of memory mapped
   region.
-- 
1.9.1

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