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[PATCH v5 0/4] Altera Partial Reconfiguration IP

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  [PATCH v5 0/4] Altera Partial Reconfiguration IP matthew.gerlach@linux.intel.com - 2017-03-10 20:50 +0100
    Re: [PATCH v5 0/4] Altera Partial Reconfiguration IP Moritz Fischer <mdf@kernel.org> - 2017-03-13 21:50 +0100

#1598059 — [PATCH v5 0/4] Altera Partial Reconfiguration IP

From: Matthew Gerlach <matthew.gerlach@linux.intel.com>

This set of patches implements a fpga-mgr driver for the Altera Partial
Reconfiguration IP.  The driver depends on a patch from Alan Tull that
adds a config complete timeout.  The driver code itself is divided into
core functions and functions to implement a platform driver. It is
expected that drivers for other buses like PCIe would also use the core
functions or possibly instantiate a platform driver.

Alan Tull (1):
  fpga: add config complete timeout

Matthew Gerlach (3):
  fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.
  fpga dt: bindings for Altera Partial Reconfiguration IP.
  fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.

 .../devicetree/bindings/fpga/altera-pr-ip.txt      |  12 ++
 drivers/fpga/Kconfig                               |  12 ++
 drivers/fpga/Makefile                              |   2 +
 drivers/fpga/altera-pr-ip-core-plat.c              |  65 ++++++
 drivers/fpga/altera-pr-ip-core.c                   | 217 +++++++++++++++++++++
 drivers/fpga/altera-pr-ip-core.h                   |  29 +++
 drivers/fpga/fpga-region.c                         |   3 +
 include/linux/fpga/fpga-mgr.h                      |   3 +
 8 files changed, 343 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
 create mode 100644 drivers/fpga/altera-pr-ip-core-plat.c
 create mode 100644 drivers/fpga/altera-pr-ip-core.c
 create mode 100644 drivers/fpga/altera-pr-ip-core.h

-- 
2.7.4

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#1599799

Hi Matthew,

On Fri, Mar 10, 2017 at 11:40 AM,  <matthew.gerlach@linux.intel.com> wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> This set of patches implements a fpga-mgr driver for the Altera Partial
> Reconfiguration IP.  The driver depends on a patch from Alan Tull that
> adds a config complete timeout.  The driver code itself is divided into
> core functions and functions to implement a platform driver. It is
> expected that drivers for other buses like PCIe would also use the core
> functions or possibly instantiate a platform driver.
>
> Alan Tull (1):
>   fpga: add config complete timeout
>
> Matthew Gerlach (3):
>   fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.
>   fpga dt: bindings for Altera Partial Reconfiguration IP.

I think in general dt bindings should go in first in a series. Doesn't
checkpatch
complain about this?

>   fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.
>
>  .../devicetree/bindings/fpga/altera-pr-ip.txt      |  12 ++
>  drivers/fpga/Kconfig                               |  12 ++
>  drivers/fpga/Makefile                              |   2 +
>  drivers/fpga/altera-pr-ip-core-plat.c              |  65 ++++++
>  drivers/fpga/altera-pr-ip-core.c                   | 217 +++++++++++++++++++++
>  drivers/fpga/altera-pr-ip-core.h                   |  29 +++
>  drivers/fpga/fpga-region.c                         |   3 +
>  include/linux/fpga/fpga-mgr.h                      |   3 +
>  8 files changed, 343 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
>  create mode 100644 drivers/fpga/altera-pr-ip-core-plat.c
>  create mode 100644 drivers/fpga/altera-pr-ip-core.c
>  create mode 100644 drivers/fpga/altera-pr-ip-core.h

Cheers,
Moritz

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