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| Started by | Marc Zyngier <marc.zyngier@arm.com> |
|---|---|
| First post | 2017-03-06 12:30 +0100 |
| Last post | 2017-03-07 14:30 +0100 |
| Articles | 2 — 2 participants |
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[PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier <marc.zyngier@arm.com> - 2017-03-06 12:30 +0100
Re: [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Hanjun Guo <hanjun.guo@linaro.org> - 2017-03-07 14:30 +0100
| From | Marc Zyngier <marc.zyngier@arm.com> |
|---|---|
| Date | 2017-03-06 12:30 +0100 |
| Subject | [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data |
| Message-ID | <thYZY-7uY-21@gated-at.bofh.it> |
In order to deal with ACPI enabled platforms suffering from the
HISILICON_ERRATUM_161010101, let's add the required OEM data that
allow the workaround to be enabled.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/clocksource/arm_arch_timer.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 6182871af4eb..b46584f058b6 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -270,6 +270,25 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)
{
return __hisi_161010101_read_reg(cntvct_el0);
}
+
+static struct ate_acpi_oem_info hisi_161010101_oem_info[] = {
+ {
+ .oem_id = "HISI ",
+ .oem_table_id = "HIP05 ",
+ .oem_revision = 0,
+ },
+ {
+ .oem_id = "HISI ",
+ .oem_table_id = "HIP06 ",
+ .oem_revision = 0,
+ },
+ {
+ .oem_id = "HISI ",
+ .oem_table_id = "HIP07 ",
+ .oem_revision = 0,
+ },
+ { },
+};
#endif
#ifdef CONFIG_ARM64_ERRATUM_858921
@@ -347,6 +366,16 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.set_next_event_phys = erratum_set_next_event_tval_phys,
.set_next_event_virt = erratum_set_next_event_tval_virt,
},
+ {
+ .match_type = ate_match_acpi_oem_info,
+ .id = hisi_161010101_oem_info,
+ .desc_str = "HiSilicon erratum 161010101",
+ .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
+ .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
+ .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_tval_phys,
+ .set_next_event_virt = erratum_set_next_event_tval_virt,
+ },
#endif
#ifdef CONFIG_ARM64_ERRATUM_858921
{
--
2.11.0
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| From | Hanjun Guo <hanjun.guo@linaro.org> |
|---|---|
| Date | 2017-03-07 14:30 +0100 |
| Subject | Re: [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data |
| Message-ID | <tinlE-83G-11@gated-at.bofh.it> |
| In reply to | #1593217 |
On 2017/3/6 19:26, Marc Zyngier wrote:
> In order to deal with ACPI enabled platforms suffering from the
> HISILICON_ERRATUM_161010101, let's add the required OEM data that
> allow the workaround to be enabled.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> drivers/clocksource/arm_arch_timer.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 6182871af4eb..b46584f058b6 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -270,6 +270,25 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)
> {
> return __hisi_161010101_read_reg(cntvct_el0);
> }
> +
> +static struct ate_acpi_oem_info hisi_161010101_oem_info[] = {
> + {
> + .oem_id = "HISI ",
> + .oem_table_id = "HIP05 ",
> + .oem_revision = 0,
> + },
> + {
> + .oem_id = "HISI ",
> + .oem_table_id = "HIP06 ",
> + .oem_revision = 0,
> + },
> + {
> + .oem_id = "HISI ",
> + .oem_table_id = "HIP07 ",
> + .oem_revision = 0,
> + },
> + { },
Maybe it's better to add a comments that to say "It's needed to match
the end of oem info", but it's up to you :)
> +};
> #endif
>
> #ifdef CONFIG_ARM64_ERRATUM_858921
> @@ -347,6 +366,16 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
> .set_next_event_phys = erratum_set_next_event_tval_phys,
> .set_next_event_virt = erratum_set_next_event_tval_virt,
> },
> + {
> + .match_type = ate_match_acpi_oem_info,
> + .id = hisi_161010101_oem_info,
> + .desc_str = "HiSilicon erratum 161010101",
> + .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
> + .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
> + .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
> + .set_next_event_phys = erratum_set_next_event_tval_phys,
> + .set_next_event_virt = erratum_set_next_event_tval_virt,
> + },
> #endif
> #ifdef CONFIG_ARM64_ERRATUM_858921
> {
>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Thanks
Hanjun
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