Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1592879 > unrolled thread

[PATCH v3 0/3] add support of usb2-phy for rk3328

Started byMeng Dongyang <daniel.meng@rock-chips.com>
First post2017-03-06 02:40 +0100
Last post2017-03-06 06:10 +0100
Articles 7 — 2 participants

Back to article view | Back to linux.kernel

Contents

  [PATCH v3 0/3] add support of usb2-phy for rk3328 Meng Dongyang <daniel.meng@rock-chips.com> - 2017-03-06 02:40 +0100
    [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node Meng Dongyang <daniel.meng@rock-chips.com> - 2017-03-06 02:40 +0100
      Re: [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node Heiko Stübner <heiko@sntech.de> - 2017-03-06 07:30 +0100
    [PATCH v3 2/3] dt-bindings: phy: add DT bindings for usb2-phy grf Meng Dongyang <daniel.meng@rock-chips.com> - 2017-03-06 02:40 +0100
      Re: [PATCH v3 2/3] dt-bindings: phy: add DT bindings for usb2-phy grf Heiko Stübner <heiko@sntech.de> - 2017-03-06 07:20 +0100
    [PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328 Meng Dongyang <daniel.meng@rock-chips.com> - 2017-03-06 02:40 +0100
      Re: [PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328 Heiko Stübner <heiko@sntech.de> - 2017-03-06 06:10 +0100

#1592879 — [PATCH v3 0/3] add support of usb2-phy for rk3328

FromMeng Dongyang <daniel.meng@rock-chips.com>
Date2017-03-06 02:40 +0100
Subject[PATCH v3 0/3] add support of usb2-phy for rk3328
Message-ID<thPMZ-uB-1@gated-at.bofh.it>
The config information of RK3328 about address and port property
is different from other platform. So adds config information in the
data of match table and the device tree bindings description for
usb2-phy.

Changes in v2:
 - move usb2-phy grf specification to .../devicetree/bindings/soc/rockchip/grf.txt
 - add otg port config information of rk3328
Changes in v3:
 - remove tuning function and id pin configs
 - delete example of usb2-phy grf in grf.txt

Meng Dongyang (3):
  dt-bindings: phy: add assign clock property in usb2-phy node
  dt-bindings: phy: add DT bindings for usb2-phy grf
  phy: rockchip-inno-usb2: add support of usb2-phy for rk3328

 .../bindings/phy/phy-rockchip-inno-usb2.txt        |  6 +++
 .../devicetree/bindings/soc/rockchip/grf.txt       |  4 ++
 drivers/phy/phy-rockchip-inno-usb2.c               | 44 ++++++++++++++++++++++
 3 files changed, 54 insertions(+)

-- 
1.9.1

[toc] | [next] | [standalone]

#1592881 — [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node

FromMeng Dongyang <daniel.meng@rock-chips.com>
Date2017-03-06 02:40 +0100
Subject[PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node
Message-ID<thPMZ-uB-7@gated-at.bofh.it>
In reply to#1592879
On some platform such as RK3328, the 480m clock may need to assign
clock parent in dts in stead of clock driver. So this patch add
property of assigned-clocks and assigned-clock-parents to assign
parent for 480m clock.

Changes in v2:
 - move usb2-phy grf specification to grf.txt
Changes in v3: None

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
---
 Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
index 3c29c77..e71a8d2 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
@@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
 
 Required properties (phy (parent) node):
  - compatible : should be one of the listed compatibles:
+	* "rockchip,rk3328-usb2phy"
 	* "rockchip,rk3366-usb2phy"
 	* "rockchip,rk3399-usb2phy"
  - reg : the address offset of grf for usb-phy configuration.
@@ -11,6 +12,11 @@ Required properties (phy (parent) node):
 Optional properties:
  - clocks : phandle + phy specifier pair, for the input clock of phy.
  - clock-names : input clock name of phy, must be "phyclk".
+ - assigned-clocks : phandle of usb 480m clock.
+ - assigned-clock-parents : parent of usb 480m clock, select between
+		 usb-phy output 480m and xin24m.
+		 Refer to clk/clock-bindings.txt for generic clock
+		 consumer properties.
 
 Required nodes : a sub-node is required for each port the phy provides.
 		 The sub-node name is used to identify host or otg port,
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1592952 — Re: [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node

FromHeiko Stübner <heiko@sntech.de>
Date2017-03-06 07:30 +0100
SubjectRe: [PATCH v3 1/3] dt-bindings: phy: add assign clock property in usb2-phy node
Message-ID<thUjE-3QO-19@gated-at.bofh.it>
In reply to#1592881
Hi Daniel,

Am Montag, 6. März 2017, 09:29:36 CET schrieb Meng Dongyang:
> On some platform such as RK3328, the 480m clock may need to assign
> clock parent in dts in stead of clock driver. So this patch add
> property of assigned-clocks and assigned-clock-parents to assign
> parent for 480m clock.
> 
> Changes in v2:
>  - move usb2-phy grf specification to grf.txt
> Changes in v3: None
> 
> Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

please carry over received Acks in the future. This patch already got

Acked-by: Rob Herring <robh@kernel.org>

and you can add my
Reviewed-by: Heiko Stuebner <heiko@sntech.de>

[toc] | [prev] | [next] | [standalone]

#1592883 — [PATCH v3 2/3] dt-bindings: phy: add DT bindings for usb2-phy grf

FromMeng Dongyang <daniel.meng@rock-chips.com>
Date2017-03-06 02:40 +0100
Subject[PATCH v3 2/3] dt-bindings: phy: add DT bindings for usb2-phy grf
Message-ID<thPMZ-uB-9@gated-at.bofh.it>
In reply to#1592879
Adds the device tree bindings description for usb2-phy grf
of RK3328 platform.

Changes in v2:
 - add usb2-phy grf specification
Chagnes in v3:
 - remove the example of usb2-phy grf

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
---
 Documentation/devicetree/bindings/soc/rockchip/grf.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 013e71a..af5b44d 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -7,6 +7,8 @@ From RK3368 SoCs, the GRF is divided into two sections,
 - GRF, used for general non-secure system,
 - PMUGRF, used for always on system
 
+On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
+
 Required Properties:
 
 - compatible: GRF should be one of the followings
@@ -19,6 +21,8 @@ Required Properties:
 - compatible: PMUGRF should be one of the followings
    - "rockchip,rk3368-pmugrf", "syscon": for rk3368
    - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- compatible: USB2PHYGRF should be one of the followings
+   - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328
 - reg: physical base address of the controller and length of memory mapped
   region.
 
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1592950 — Re: [PATCH v3 2/3] dt-bindings: phy: add DT bindings for usb2-phy grf

FromHeiko Stübner <heiko@sntech.de>
Date2017-03-06 07:20 +0100
SubjectRe: [PATCH v3 2/3] dt-bindings: phy: add DT bindings for usb2-phy grf
Message-ID<thU9Y-3Id-3@gated-at.bofh.it>
In reply to#1592883
Am Montag, 6. März 2017, 09:29:37 CET schrieb Meng Dongyang:
> Adds the device tree bindings description for usb2-phy grf
> of RK3328 platform.
> 
> Changes in v2:
>  - add usb2-phy grf specification
> Chagnes in v3:
>  - remove the example of usb2-phy grf
> 
> Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

looks good now,

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
>  Documentation/devicetree/bindings/soc/rockchip/grf.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> b/Documentation/devicetree/bindings/soc/rockchip/grf.txt index
> 013e71a..af5b44d 100644
> --- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> @@ -7,6 +7,8 @@ From RK3368 SoCs, the GRF is divided into two sections,
>  - GRF, used for general non-secure system,
>  - PMUGRF, used for always on system
> 
> +On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
> +
>  Required Properties:
> 
>  - compatible: GRF should be one of the followings
> @@ -19,6 +21,8 @@ Required Properties:
>  - compatible: PMUGRF should be one of the followings
>     - "rockchip,rk3368-pmugrf", "syscon": for rk3368
>     - "rockchip,rk3399-pmugrf", "syscon": for rk3399
> +- compatible: USB2PHYGRF should be one of the followings
> +   - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328
>  - reg: physical base address of the controller and length of memory mapped
>    region.

[toc] | [prev] | [next] | [standalone]

#1592885 — [PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328

FromMeng Dongyang <daniel.meng@rock-chips.com>
Date2017-03-06 02:40 +0100
Subject[PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328
Message-ID<thPN0-uB-15@gated-at.bofh.it>
In reply to#1592879
Add usb2-phy config information in the data of match table for
rk3328.

Changes in v2:
 - add support of otg port
Changes in v3:
 - remove tuning function and id pin configs

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
---
 drivers/phy/phy-rockchip-inno-usb2.c | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 4ea95c2..257c5d9 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -1141,6 +1141,49 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 	return ret;
 }
 
+static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 15, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0110, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0114, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+				.ls_det_en	= { 0x0110, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0114, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0118, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
+				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 15, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0120, 24, 24, 0, 1 },
+			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
+			.dp_det		= { 0x0120, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
 	{
 		.reg = 0x700,
@@ -1223,6 +1266,7 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
 };
 
 static const struct of_device_id rockchip_usb2phy_dt_match[] = {
+	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
 	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
 	{}
-- 
1.9.1

[toc] | [prev] | [next] | [standalone]

#1592937 — Re: [PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328

FromHeiko Stübner <heiko@sntech.de>
Date2017-03-06 06:10 +0100
SubjectRe: [PATCH v3 3/3] phy: rockchip-inno-usb2: add support of usb2-phy for rk3328
Message-ID<thT4e-2Xw-17@gated-at.bofh.it>
In reply to#1592885
Am Montag, 6. März 2017, 09:29:38 CET schrieb Meng Dongyang:
> Add usb2-phy config information in the data of match table for
> rk3328.
> 
> Changes in v2:
>  - add support of otg port
> Changes in v3:
>  - remove tuning function and id pin configs
> 
> Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

I didn't double check every individual register value, but overall this looks 
correct, so

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
>  drivers/phy/phy-rockchip-inno-usb2.c | 44
> ++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
> 
> diff --git a/drivers/phy/phy-rockchip-inno-usb2.c
> b/drivers/phy/phy-rockchip-inno-usb2.c index 4ea95c2..257c5d9 100644
> --- a/drivers/phy/phy-rockchip-inno-usb2.c
> +++ b/drivers/phy/phy-rockchip-inno-usb2.c
> @@ -1141,6 +1141,49 @@ static int rockchip_usb2phy_probe(struct
> platform_device *pdev) return ret;
>  }
> 
> +static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
> +	{
> +		.reg = 0x100,
> +		.num_ports	= 2,
> +		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
> +		.port_cfgs	= {
> +			[USB2PHY_PORT_OTG] = {
> +				.phy_sus	= { 0x0100, 15, 0, 0, 0x1d1 },
> +				.bvalid_det_en	= { 0x0110, 2, 2, 0, 1 },
> +				.bvalid_det_st	= { 0x0114, 2, 2, 0, 1 },
> +				.bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
> +				.ls_det_en	= { 0x0110, 0, 0, 0, 1 },
> +				.ls_det_st	= { 0x0114, 0, 0, 0, 1 },
> +				.ls_det_clr	= { 0x0118, 0, 0, 0, 1 },
> +				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
> +				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
> +				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
> +			},
> +			[USB2PHY_PORT_HOST] = {
> +				.phy_sus	= { 0x104, 15, 0, 0, 0x1d1 },
> +				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
> +				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
> +				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
> +				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
> +				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
> +			}
> +		},
> +		.chg_det = {
> +			.opmode		= { 0x0100, 3, 0, 5, 1 },
> +			.cp_det		= { 0x0120, 24, 24, 0, 1 },
> +			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
> +			.dp_det		= { 0x0120, 25, 25, 0, 1 },
> +			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
> +			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
> +			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
> +			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
> +			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
> +			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
> +		},
> +	},
> +	{ /* sentinel */ }
> +};
> +
>  static const struct rockchip_usb2phy_cfg rk3366_phy_cfgs[] = {
>  	{
>  		.reg = 0x700,
> @@ -1223,6 +1266,7 @@ static int rockchip_usb2phy_probe(struct
> platform_device *pdev) };
> 
>  static const struct of_device_id rockchip_usb2phy_dt_match[] = {
> +	{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
>  	{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
>  	{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
>  	{}

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web