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[PATCH v2 0/3] x86/process: Optimize __switch_to_xtra()

Started byKyle Huey <me@kylehuey.com>
First post2017-02-14 09:20 +0100
Last post2017-03-10 21:30 +0100
Articles 4 — 2 participants

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  [PATCH v2 0/3] x86/process: Optimize __switch_to_xtra() Kyle Huey <me@kylehuey.com> - 2017-02-14 09:20 +0100
    Re: [PATCH v2 0/3] x86/process: Optimize __switch_to_xtra() Kyle Huey <me@kylehuey.com> - 2017-02-28 20:10 +0100
      Re: [PATCH v2 0/3] x86/process: Optimize __switch_to_xtra() Kyle Huey <me@kylehuey.com> - 2017-03-08 23:10 +0100
        Re: [PATCH v2 0/3] x86/process: Optimize __switch_to_xtra() Thomas Gleixner <tglx@linutronix.de> - 2017-03-10 21:30 +0100

#1580382 — [PATCH v2 0/3] x86/process: Optimize __switch_to_xtra()

FromKyle Huey <me@kylehuey.com>
Date2017-02-14 09:20 +0100
Subject[PATCH v2 0/3] x86/process: Optimize __switch_to_xtra()
Message-ID<taGv7-7K9-3@gated-at.bofh.it>
GCC generates lousy code in __switch_to_xtra.  This patch series is an
updated version of tglx's patches from last year
(https://lkml.org/lkml/2016/12/15/432) that address review comments.

Since v1:
Part 1 - x86/process: Optimize TIF checks in __switch_to_xtra()
- READ_ONCE annotations added as requested by Andy Lutomirski

Part 2 - x86/process: Correct and optimize TIF_BLOCKSTEP switch
- DEBUGCTLMSR_BTF is now modified when either the previous or
  next or both tasks use it, because the MSR is "highly magical".

Part 3 - x86/process: Optimize TIF_NOTSC switch
- Unchanged

I didn't introduce a cpufeature for blockstep because that would
add additional overhead compared to the existing code, where it's
generally known at compile time that blockstep is supported. Perhaps
we should just BUG_ON(!arch_has_block_step()) here if we really
care to check anything.

arch/x86/include/asm/msr-index.h |  1 +
arch/x86/include/asm/tlbflush.h  | 10 ++++++++++
arch/x86/kernel/process.c        | 76 +++++++++++++++++++++++++++++++++++-----------------------------------------
3 files changed, 46 insertions(+), 41 deletions(-)

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#1589711

FromKyle Huey <me@kylehuey.com>
Date2017-02-28 20:10 +0100
Message-ID<tfVjQ-ei-13@gated-at.bofh.it>
In reply to#1580382
On Tue, Feb 14, 2017 at 12:11 AM, Kyle Huey <me@kylehuey.com> wrote:
> GCC generates lousy code in __switch_to_xtra.  This patch series is an
> updated version of tglx's patches from last year
> (https://lkml.org/lkml/2016/12/15/432) that address review comments.
>
> Since v1:
> Part 1 - x86/process: Optimize TIF checks in __switch_to_xtra()
> - READ_ONCE annotations added as requested by Andy Lutomirski
>
> Part 2 - x86/process: Correct and optimize TIF_BLOCKSTEP switch
> - DEBUGCTLMSR_BTF is now modified when either the previous or
>   next or both tasks use it, because the MSR is "highly magical".
>
> Part 3 - x86/process: Optimize TIF_NOTSC switch
> - Unchanged
>
> I didn't introduce a cpufeature for blockstep because that would
> add additional overhead compared to the existing code, where it's
> generally known at compile time that blockstep is supported. Perhaps
> we should just BUG_ON(!arch_has_block_step()) here if we really
> care to check anything.
>
> arch/x86/include/asm/msr-index.h |  1 +
> arch/x86/include/asm/tlbflush.h  | 10 ++++++++++
> arch/x86/kernel/process.c        | 76 +++++++++++++++++++++++++++++++++++-----------------------------------------
> 3 files changed, 46 insertions(+), 41 deletions(-)
>

Has anyone had a change to look at these?

- Kyle

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#1595552

FromKyle Huey <me@kylehuey.com>
Date2017-03-08 23:10 +0100
Message-ID<tiRWp-4gI-19@gated-at.bofh.it>
In reply to#1589711
On Tue, Feb 28, 2017 at 10:33 AM, Kyle Huey <me@kylehuey.com> wrote:
> On Tue, Feb 14, 2017 at 12:11 AM, Kyle Huey <me@kylehuey.com> wrote:
>> GCC generates lousy code in __switch_to_xtra.  This patch series is an
>> updated version of tglx's patches from last year
>> (https://lkml.org/lkml/2016/12/15/432) that address review comments.
>>
>> Since v1:
>> Part 1 - x86/process: Optimize TIF checks in __switch_to_xtra()
>> - READ_ONCE annotations added as requested by Andy Lutomirski
>>
>> Part 2 - x86/process: Correct and optimize TIF_BLOCKSTEP switch
>> - DEBUGCTLMSR_BTF is now modified when either the previous or
>>   next or both tasks use it, because the MSR is "highly magical".
>>
>> Part 3 - x86/process: Optimize TIF_NOTSC switch
>> - Unchanged
>>
>> I didn't introduce a cpufeature for blockstep because that would
>> add additional overhead compared to the existing code, where it's
>> generally known at compile time that blockstep is supported. Perhaps
>> we should just BUG_ON(!arch_has_block_step()) here if we really
>> care to check anything.
>>
>> arch/x86/include/asm/msr-index.h |  1 +
>> arch/x86/include/asm/tlbflush.h  | 10 ++++++++++
>> arch/x86/kernel/process.c        | 76 +++++++++++++++++++++++++++++++++++-----------------------------------------
>> 3 files changed, 46 insertions(+), 41 deletions(-)
>>
>
> Has anyone had a change to look at these?

Maybe now that the 4.11 merge window is closed? :)

- Kyle

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#1598074

FromThomas Gleixner <tglx@linutronix.de>
Date2017-03-10 21:30 +0100
Message-ID<tjzkK-Cj-17@gated-at.bofh.it>
In reply to#1595552
On Wed, 8 Mar 2017, Kyle Huey wrote:

> On Tue, Feb 28, 2017 at 10:33 AM, Kyle Huey <me@kylehuey.com> wrote:
> > On Tue, Feb 14, 2017 at 12:11 AM, Kyle Huey <me@kylehuey.com> wrote:
> >> GCC generates lousy code in __switch_to_xtra.  This patch series is an
> >> updated version of tglx's patches from last year
> >> (https://lkml.org/lkml/2016/12/15/432) that address review comments.
> >>
> >> Since v1:
> >> Part 1 - x86/process: Optimize TIF checks in __switch_to_xtra()
> >> - READ_ONCE annotations added as requested by Andy Lutomirski
> >>
> >> Part 2 - x86/process: Correct and optimize TIF_BLOCKSTEP switch
> >> - DEBUGCTLMSR_BTF is now modified when either the previous or
> >>   next or both tasks use it, because the MSR is "highly magical".
> >>
> >> Part 3 - x86/process: Optimize TIF_NOTSC switch
> >> - Unchanged
> >>
> >> I didn't introduce a cpufeature for blockstep because that would
> >> add additional overhead compared to the existing code, where it's
> >> generally known at compile time that blockstep is supported. Perhaps
> >> we should just BUG_ON(!arch_has_block_step()) here if we really
> >> care to check anything.
> >>
> >> arch/x86/include/asm/msr-index.h |  1 +
> >> arch/x86/include/asm/tlbflush.h  | 10 ++++++++++
> >> arch/x86/kernel/process.c        | 76 +++++++++++++++++++++++++++++++++++-----------------------------------------
> >> 3 files changed, 46 insertions(+), 41 deletions(-)
> >>
> >
> > Has anyone had a change to look at these?
> 
> Maybe now that the 4.11 merge window is closed? :)

Yes. It's on my radar, but I'm swamped with regressions. Next week should
be more time for that.

Thanks,

	tglx

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