Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1587260 > unrolled thread

[PATCH v2 00/17] ARM: Initial Actions Semi S500 and S900 enablement

Started byAndreas Färber <afaerber@suse.de>
First post2017-02-24 04:50 +0100
Last post2017-02-25 01:00 +0100
Articles 20 on this page of 26 — 3 participants

Back to article view | Back to linux.kernel


Contents

  [PATCH v2 00/17] ARM: Initial Actions Semi S500 and S900 enablement Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
    [PATCH v2 06/17] ARM64: Prepare Actions Semi S900 Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
    [PATCH v2 17/17] ARM: dts: s500-guitar-bb-rev-b: Add fake uart3 clock Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
    [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi Andreas Färber <afaerber@suse.de> - 2017-02-27 16:50 +0100
        Re: [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi Rob Herring <robh@kernel.org> - 2017-02-28 01:50 +0100
    Re: [RFC v2 03/17] dt-bindings: timer: Document Owl timer Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
    [RFC v2 13/17] ARM64: dts: Add Actions Semi S900 and Bubblegum-96 Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [RFC v2 13/17] ARM64: dts: Add Actions Semi S900 and Bubblegum-96 Andreas Färber <afaerber@suse.de> - 2017-02-24 05:00 +0100
    [PATCH v2 08/17] tty: serial: Add Actions Semi Owl UART earlycon Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
    [PATCH v2 09/17] Documentation: kernel-parameters: Document owl earlycon Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
    [PATCH v2 07/17] dt-bindings: serial: Document Actions Semi Owl UARTs Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [PATCH v2 07/17] dt-bindings: serial: Document Actions Semi Owl  UARTs Rob Herring <robh@kernel.org> - 2017-02-28 01:20 +0100
    [RFC v2 03/17] dt-bindings: timer: Document Owl timer Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [RFC v2 03/17] dt-bindings: timer: Document Owl timer Andreas Färber <afaerber@suse.de> - 2017-02-27 15:50 +0100
        Re: [RFC v2 03/17] dt-bindings: timer: Document Owl timer Rob Herring <robh@kernel.org> - 2017-02-28 01:20 +0100
    [PATCH v2 12/17] dt-bindings: arm: Document Actions Semi S900 Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [PATCH v2 12/17] dt-bindings: arm: Document Actions Semi S900 Rob Herring <robh@kernel.org> - 2017-02-28 01:30 +0100
    [PATCH v2 04/17] clocksource: Add Owl timer Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [PATCH v2 04/17] clocksource: Add Owl timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-24 23:30 +0100
        Re: [PATCH v2 04/17] clocksource: Add Owl timer Andreas Färber <afaerber@suse.de> - 2017-02-25 00:30 +0100
          Re: [PATCH v2 04/17] clocksource: Add Owl timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-25 23:00 +0100
            Re: [PATCH v2 04/17] clocksource: Add Owl timer Andreas Färber <afaerber@suse.de> - 2017-02-26 15:50 +0100
              Re: [PATCH v2 04/17] clocksource: Add Owl timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-26 16:00 +0100
    [PATCH v2 10/17] ARM: dts: Add Actions Semi S500 and LeMaker Guitar Andreas Färber <afaerber@suse.de> - 2017-02-24 04:50 +0100
      Re: [PATCH v2 10/17] ARM: dts: Add Actions Semi S500 and LeMaker  Guitar Andreas Färber <afaerber@suse.de> - 2017-02-25 01:00 +0100

Page 1 of 2  [1] 2  Next page →


#1587260 — [PATCH v2 00/17] ARM: Initial Actions Semi S500 and S900 enablement

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 00/17] ARM: Initial Actions Semi S500 and S900 enablement
Message-ID<tef3k-2Ja-3@gated-at.bofh.it>
Hello,

This series adds initial support for Actions Semiconductor S500 (ARMv7) and
S900 (ARMv8) SoCs.

In addition to earlycon serial output, v2 includes a serial console driver RFC.
Guitar output is coming further along thanks to a new timer implementation, but
is still earlycon only - to be investigated. Bubblegum-96 reaches an initrd,
but a small part of the serial output just before is lost (visible in dmesg).

https://github.com/afaerber/linux/commits/bg96-next

Booting from U-Boot is straightforward on both boards:

https://en.opensuse.org/HCL:Guitar
https://en.opensuse.org/HCL:Bubblegum-96

Have a lot of fun!

Cheers,
Andreas

v1 -> v2:
* S900 DT fixes (Mark)
* Kconfig name changes (Arnd)
* Bubblegum-96 .dts rename
* Vendor prefix rename
* Minor cleanups
* Add serial driver
* Add MAINTAINERS section
* Use SPDX-License-Identifier in DT (Rob)
* Add clocksource driver

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh@kernel.org>
Cc: mp-cs@actions-semi.com
Cc: 96boards@ucrobotics.com
Cc: support@lemaker.org
Cc: devicetree@vger.kernel.org

Andreas Färber (17):
  dt-bindings: Add vendor prefix for Actions Semi
  dt-bindings: arm: Document Actions Semi S500
  dt-bindings: timer: Document Owl timer
  clocksource: Add Owl timer
  ARM: Prepare Actions Semi S500
  ARM64: Prepare Actions Semi S900
  dt-bindings: serial: Document Actions Semi Owl UARTs
  tty: serial: Add Actions Semi Owl UART earlycon
  Documentation: kernel-parameters: Document owl earlycon
  ARM: dts: Add Actions Semi S500 and LeMaker Guitar
  dt-bindings: Add vendor prefix for uCRobotics
  dt-bindings: arm: Document Actions Semi S900
  ARM64: dts: Add Actions Semi S900 and Bubblegum-96
  MAINTAINERS: Add Actions Semi Owl section
  tty: serial: owl: Implement console driver
  ARM64: dts: actions: s900-bubblegum-96: Add fake uart5 clk
  ARM: dts: s500-guitar-bb-rev-b: Add fake uart3 clock

 Documentation/admin-guide/kernel-parameters.txt    |   6 +
 Documentation/devicetree/bindings/arm/actions.txt  |  39 ++
 .../bindings/serial/actions,owl-uart.txt           |  16 +
 .../bindings/timer/actions,owl-timer.txt           |  16 +
 .../devicetree/bindings/vendor-prefixes.txt        |   2 +
 MAINTAINERS                                        |  10 +
 arch/arm/Kconfig                                   |   2 +
 arch/arm/Makefile                                  |   1 +
 arch/arm/boot/dts/Makefile                         |   2 +
 arch/arm/boot/dts/s500-guitar-bb-rev-b.dts         |  33 +
 arch/arm/boot/dts/s500-guitar.dtsi                 |  20 +
 arch/arm/boot/dts/s500.dtsi                        | 135 ++++
 arch/arm/mach-actions/Kconfig                      |  10 +
 arch/arm/mach-actions/Makefile                     |   1 +
 arch/arm/mach-actions/owl.c                        |  28 +
 arch/arm64/Kconfig.platforms                       |   5 +
 arch/arm64/boot/dts/Makefile                       |   1 +
 arch/arm64/boot/dts/actions/Makefile               |   5 +
 arch/arm64/boot/dts/actions/s900-bubblegum-96.dts  |  38 ++
 arch/arm64/boot/dts/actions/s900.dtsi              | 109 ++++
 drivers/clocksource/Kconfig                        |   7 +
 drivers/clocksource/Makefile                       |   1 +
 drivers/clocksource/owl-timer.c                    | 146 +++++
 drivers/tty/serial/Kconfig                         |  19 +
 drivers/tty/serial/Makefile                        |   1 +
 drivers/tty/serial/owl-uart.c                      | 707 +++++++++++++++++++++
 include/uapi/linux/serial_core.h                   |   3 +
 27 files changed, 1363 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/actions.txt
 create mode 100644 Documentation/devicetree/bindings/serial/actions,owl-uart.txt
 create mode 100644 Documentation/devicetree/bindings/timer/actions,owl-timer.txt
 create mode 100644 arch/arm/boot/dts/s500-guitar-bb-rev-b.dts
 create mode 100644 arch/arm/boot/dts/s500-guitar.dtsi
 create mode 100644 arch/arm/boot/dts/s500.dtsi
 create mode 100644 arch/arm/mach-actions/Kconfig
 create mode 100644 arch/arm/mach-actions/Makefile
 create mode 100644 arch/arm/mach-actions/owl.c
 create mode 100644 arch/arm64/boot/dts/actions/Makefile
 create mode 100644 arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
 create mode 100644 arch/arm64/boot/dts/actions/s900.dtsi
 create mode 100644 drivers/clocksource/owl-timer.c
 create mode 100644 drivers/tty/serial/owl-uart.c

-- 
2.10.2

[toc] | [next] | [standalone]


#1587261 — [PATCH v2 06/17] ARM64: Prepare Actions Semi S900

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 06/17] ARM64: Prepare Actions Semi S900
Message-ID<tef3k-2Ja-11@gated-at.bofh.it>
In reply to#1587260
Add ARCH_ACTIONS.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Renamed ARCH_OWL to ARCH_ACTION (Arnd)
 
 arch/arm64/Kconfig.platforms | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 129cc5a..b0266cd 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -1,5 +1,10 @@
 menu "Platform selection"
 
+config ARCH_ACTIONS
+	bool "Actions Semi Platforms"
+	help
+	  This enables support for the Actions Semiconductor S900 SoC family.
+
 config ARCH_SUNXI
 	bool "Allwinner sunxi 64-bit SoC Family"
 	select GENERIC_IRQ_CHIP
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1587262 — [PATCH v2 17/17] ARM: dts: s500-guitar-bb-rev-b: Add fake uart3 clock

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 17/17] ARM: dts: s500-guitar-bb-rev-b: Add fake uart3 clock
Message-ID<tef3k-2Ja-25@gated-at.bofh.it>
In reply to#1587260
Add a fixed-clock for baudrate 115200.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: new
 
 arch/arm/boot/dts/s500-guitar-bb-rev-b.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/s500-guitar-bb-rev-b.dts b/arch/arm/boot/dts/s500-guitar-bb-rev-b.dts
index 834b71d..f6fd10a 100644
--- a/arch/arm/boot/dts/s500-guitar-bb-rev-b.dts
+++ b/arch/arm/boot/dts/s500-guitar-bb-rev-b.dts
@@ -19,8 +19,15 @@
 	chosen {
 		stdout-path = "serial3:115200n8";
 	};
+
+	uart3_clk: uart3-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <921600>;
+		#clock-cells = <0>;
+	};
 };
 
 &uart3 {
 	status = "okay";
+	clocks = <&uart3_clk>;
 };
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1587263 — [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi
Message-ID<tef3k-2Ja-19@gated-at.bofh.it>
In reply to#1587260
Actions Semiconductor was listed on NASDAQ as ACTS until Dec 16, 2016.

Cc: mp-cs@actions-semi.com
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Reverted from "acts" to "actions" (cf. IAP140 "mrvl" vs. "marvell")
 
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index a76b981..64f8469 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -6,6 +6,7 @@ using them to avoid name-space collisions.
 abcn	Abracon Corporation
 abilis	Abilis Systems
 active-semi	Active-Semi International Inc
+actions	Actions Semiconductor Co., Ltd.
 ad	Avionic Design GmbH
 adapteva	Adapteva, Inc.
 adh	AD Holdings Plc.
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1588772 — Re: [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi

FromAndreas Färber <afaerber@suse.de>
Date2017-02-27 16:50 +0100
SubjectRe: [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi
Message-ID<tfvIK-7An-25@gated-at.bofh.it>
In reply to#1587263
Am 24.02.2017 um 04:40 schrieb Andreas Färber:
> Actions Semiconductor was listed on NASDAQ as ACTS until Dec 16, 2016.
> 
> Cc: mp-cs@actions-semi.com
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Reverted from "acts" to "actions" (cf. IAP140 "mrvl" vs. "marvell")
>  
>  Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index a76b981..64f8469 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -6,6 +6,7 @@ using them to avoid name-space collisions.
>  abcn	Abracon Corporation
>  abilis	Abilis Systems
>  active-semi	Active-Semi International Inc
> +actions	Actions Semiconductor Co., Ltd.

If the use of "actions" gets ack'ed, I realize it should move one line up.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

[toc] | [prev] | [next] | [standalone]


#1589069 — Re: [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi

FromRob Herring <robh@kernel.org>
Date2017-02-28 01:50 +0100
SubjectRe: [PATCH v2 01/17] dt-bindings: Add vendor prefix for Actions Semi
Message-ID<tfE9j-53z-3@gated-at.bofh.it>
In reply to#1588772
On Mon, Feb 27, 2017 at 03:57:19PM +0100, Andreas Färber wrote:
> Am 24.02.2017 um 04:40 schrieb Andreas Färber:
> > Actions Semiconductor was listed on NASDAQ as ACTS until Dec 16, 2016.
> > 
> > Cc: mp-cs@actions-semi.com
> > Signed-off-by: Andreas Färber <afaerber@suse.de>
> > ---
> >  v1 -> v2:
> >  * Reverted from "acts" to "actions" (cf. IAP140 "mrvl" vs. "marvell")
> >  
> >  Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> > index a76b981..64f8469 100644
> > --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> > +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> > @@ -6,6 +6,7 @@ using them to avoid name-space collisions.
> >  abcn	Abracon Corporation
> >  abilis	Abilis Systems
> >  active-semi	Active-Semi International Inc
> > +actions	Actions Semiconductor Co., Ltd.
> 
> If the use of "actions" gets ack'ed, I realize it should move one line up.

With that fix,

Acked-by: Rob Herring <robh@kernel.org>

[toc] | [prev] | [next] | [standalone]


#1587264 — Re: [RFC v2 03/17] dt-bindings: timer: Document Owl timer

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
SubjectRe: [RFC v2 03/17] dt-bindings: timer: Document Owl timer
Message-ID<tef3l-2Ja-31@gated-at.bofh.it>
In reply to#1587260
Am 24.02.2017 um 04:40 schrieb Andreas Färber:
> The Actions Semi S500 SoC contains a timer block with two timers.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v2: new

Sorry, script error: nothing particularly RFC here.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

[toc] | [prev] | [next] | [standalone]


#1587265 — [RFC v2 13/17] ARM64: dts: Add Actions Semi S900 and Bubblegum-96

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[RFC v2 13/17] ARM64: dts: Add Actions Semi S900 and Bubblegum-96
Message-ID<tef3k-2Ja-21@gated-at.bofh.it>
In reply to#1587260
Cc: 96boards@ucrobotics.com
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Reworded subject
 * Added memory@0 node for Bubblegum-96 (Mark)
 * Filled in reserved-memory sub-node for Bubblegum-96 (Mark)
 * Added arm-pmu interrupt-affinity property (Mark)
 * Changed second GIC reg size 0x1000 -> 0x2000 for Bubblegum-96 (Mark)
 * Updated ARCH_OWL to ARCH_ACTIONS (Arnd)
 * Renamed s900-bubblegum96.dts to s900-bubblegum-96.dts
 * Adopted "actions" vendor prefix
 * Dropped irq.h include
 * Adopted SPDX-License-Identifier (Rob)
 
 arch/arm64/boot/dts/Makefile                      |   1 +
 arch/arm64/boot/dts/actions/Makefile              |   5 +
 arch/arm64/boot/dts/actions/s900-bubblegum-96.dts |  31 ++++++
 arch/arm64/boot/dts/actions/s900.dtsi             | 109 ++++++++++++++++++++++
 4 files changed, 146 insertions(+)
 create mode 100644 arch/arm64/boot/dts/actions/Makefile
 create mode 100644 arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
 create mode 100644 arch/arm64/boot/dts/actions/s900.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 080232b..d1a6b0a 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,3 +1,4 @@
+dts-dirs += actions
 dts-dirs += al
 dts-dirs += allwinner
 dts-dirs += altera
diff --git a/arch/arm64/boot/dts/actions/Makefile b/arch/arm64/boot/dts/actions/Makefile
new file mode 100644
index 0000000..62922d6
--- /dev/null
+++ b/arch/arm64/boot/dts/actions/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_ACTIONS) += s900-bubblegum-96.dtb
+
+always		:= $(dtb-y)
+subdir-y	:= $(dts-dirs)
+clean-files	:= *.dtb
diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
new file mode 100644
index 0000000..a4ab7df
--- /dev/null
+++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2017 Andreas Färber
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+
+#include "s900.dtsi"
+
+/ {
+	compatible = "ucrobotics,bubblegum-96", "actions,s900";
+	model = "Bubblegum-96";
+
+	aliases {
+		serial5 = &uart5;
+	};
+
+	chosen {
+		stdout-path = "serial5:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+};
+
+&uart5 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi
new file mode 100644
index 0000000..75e1dea2
--- /dev/null
+++ b/arch/arm64/boot/dts/actions/s900.dtsi
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2017 Andreas Färber
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "actions,s900";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		secmon@1f000000 {
+			reg = <0x0 0x1f000000 0x0 0x1000000>;
+			no-map;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller@e00f1000 {
+			compatible = "arm,gic-400";
+			reg = <0x0 0xe00f1000 0x0 0x1000>,
+			      <0x0 0xe00f2000 0x0 0x2000>,
+			      <0x0 0xe00f4000 0x0 0x2000>,
+			      <0x0 0xe00f6000 0x0 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
+		uart5: serial@e012a000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe012a000 0x0 0x1000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+	};
+};
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1587274 — Re: [RFC v2 13/17] ARM64: dts: Add Actions Semi S900 and Bubblegum-96

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 05:00 +0100
SubjectRe: [RFC v2 13/17] ARM64: dts: Add Actions Semi S900 and Bubblegum-96
Message-ID<tefcZ-2MS-7@gated-at.bofh.it>
In reply to#1587265
Am 24.02.2017 um 04:40 schrieb Andreas Färber:
> Cc: 96boards@ucrobotics.com
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Reworded subject
>  * Added memory@0 node for Bubblegum-96 (Mark)
>  * Filled in reserved-memory sub-node for Bubblegum-96 (Mark)
>  * Added arm-pmu interrupt-affinity property (Mark)
>  * Changed second GIC reg size 0x1000 -> 0x2000 for Bubblegum-96 (Mark)
>  * Updated ARCH_OWL to ARCH_ACTIONS (Arnd)
>  * Renamed s900-bubblegum96.dts to s900-bubblegum-96.dts
>  * Adopted "actions" vendor prefix
>  * Dropped irq.h include
>  * Adopted SPDX-License-Identifier (Rob)

Sorry, not this patch but the tty patches 15ff/17 should've been RFC.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

[toc] | [prev] | [next] | [standalone]


#1587266 — [PATCH v2 08/17] tty: serial: Add Actions Semi Owl UART earlycon

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 08/17] tty: serial: Add Actions Semi Owl UART earlycon
Message-ID<tef3k-2Ja-23@gated-at.bofh.it>
In reply to#1587260
This implements an earlycon for Actions Semi S500/S900 SoCs.

Based on LeMaker linux-actions tree.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Extended Kconfig help to mention earlycon (Arnd)
 * Spelled out Actions Semiconductor in Kconfig help
 * Adopted "actions" vendor prefix
 
 drivers/tty/serial/Kconfig    |  19 ++++++
 drivers/tty/serial/Makefile   |   1 +
 drivers/tty/serial/owl-uart.c | 135 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 155 insertions(+)
 create mode 100644 drivers/tty/serial/owl-uart.c

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 6117ac8..e145822 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1677,6 +1677,25 @@ config SERIAL_MVEBU_CONSOLE
 	  and warnings and which allows logins in single user mode)
 	  Otherwise, say 'N'.
 
+config SERIAL_OWL
+	bool "Actions Semi Owl serial port support"
+	depends on ARCH_ACTIONS || COMPILE_TEST
+	select SERIAL_CORE
+	help
+	  This driver is for Actions Semiconductor S500/S900 SoC's UART.
+	  Say 'Y' here if you wish to use the on-board serial port.
+	  Otherwise, say 'N'.
+
+config SERIAL_OWL_CONSOLE
+	bool "Console on Actions Semi Owl serial port"
+	depends on SERIAL_OWL=y
+	select SERIAL_CORE_CONSOLE
+	select SERIAL_EARLYCON
+	default y
+	help
+	  Say 'Y' here if you wish to use Actions Semiconductor S500/S900 UART
+	  as the system console. Only earlycon is implemented currently.
+
 endmenu
 
 config SERIAL_MCTRL_GPIO
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 2d6288b..91f3571 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SERIAL_STM32)	+= stm32-usart.o
 obj-$(CONFIG_SERIAL_MVEBU_UART)	+= mvebu-uart.o
 obj-$(CONFIG_SERIAL_PIC32)	+= pic32_uart.o
 obj-$(CONFIG_SERIAL_MPS2_UART)	+= mps2-uart.o
+obj-$(CONFIG_SERIAL_OWL)	+= owl-uart.o
 
 # GPIOLIB helpers for modem control lines
 obj-$(CONFIG_SERIAL_MCTRL_GPIO)	+= serial_mctrl_gpio.o
diff --git a/drivers/tty/serial/owl-uart.c b/drivers/tty/serial/owl-uart.c
new file mode 100644
index 0000000..e097443
--- /dev/null
+++ b/drivers/tty/serial/owl-uart.c
@@ -0,0 +1,135 @@
+/*
+ * Actions Semi Owl family serial console
+ *
+ * Copyright 2013 Actions Semi Inc.
+ * Author: Actions Semi, Inc.
+ *
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+
+#define OWL_UART_CTL	0x000
+#define OWL_UART_TXDAT	0x008
+#define OWL_UART_STAT	0x00c
+
+#define OWL_UART_CTL_TRFS_TX		(1 << 14)
+#define OWL_UART_CTL_EN			(1 << 15)
+#define OWL_UART_CTL_RXIE		(1 << 18)
+#define OWL_UART_CTL_TXIE		(1 << 19)
+
+#define OWL_UART_STAT_RIP		(1 << 0)
+#define OWL_UART_STAT_TIP		(1 << 1)
+#define OWL_UART_STAT_TFFU		(1 << 6)
+#define OWL_UART_STAT_TRFL_MASK		(0x1f << 11)
+#define OWL_UART_STAT_UTBB		(1 << 17)
+
+static inline void owl_uart_write(struct uart_port *port, u32 val, unsigned int off)
+{
+	writel(val, port->membase + off);
+}
+
+static inline u32 owl_uart_read(struct uart_port *port, unsigned int off)
+{
+	return readl(port->membase + off);
+}
+
+#ifdef CONFIG_SERIAL_OWL_CONSOLE
+
+static void owl_console_putchar(struct uart_port *port, int ch)
+{
+	if (!port->membase)
+		return;
+
+	while (owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TFFU)
+		cpu_relax();
+
+	owl_uart_write(port, ch, OWL_UART_TXDAT);
+}
+
+static void owl_uart_port_write(struct uart_port *port, const char *s,
+				u_int count)
+{
+	u32 old_ctl, val;
+	unsigned long flags;
+	int locked;
+
+	local_irq_save(flags);
+
+	if (port->sysrq)
+		locked = 0;
+	else if (oops_in_progress)
+		locked = spin_trylock(&port->lock);
+	else {
+		spin_lock(&port->lock);
+		locked = 1;
+	}
+
+	old_ctl = owl_uart_read(port, OWL_UART_CTL);
+	val = old_ctl | OWL_UART_CTL_TRFS_TX;
+	/* disable IRQ */
+	val &= ~(OWL_UART_CTL_RXIE | OWL_UART_CTL_TXIE);
+	owl_uart_write(port, val, OWL_UART_CTL);
+
+	uart_console_write(port, s, count, owl_console_putchar);
+
+	/* wait until all contents have been sent out */
+	while (owl_uart_read(port, OWL_UART_STAT) & OWL_UART_STAT_TRFL_MASK)
+		cpu_relax();
+
+	/* clear IRQ pending */
+	val = owl_uart_read(port, OWL_UART_STAT);
+	val |= OWL_UART_STAT_TIP | OWL_UART_STAT_RIP;
+	owl_uart_write(port, val, OWL_UART_STAT);
+
+	owl_uart_write(port, old_ctl, OWL_UART_CTL);
+
+	if (locked)
+		spin_unlock(&port->lock);
+
+	local_irq_restore(flags);
+}
+
+static void owl_uart_early_console_write(struct console *co,
+					 const char *s,
+					 u_int count)
+{
+	struct earlycon_device *dev = co->data;
+
+	owl_uart_port_write(&dev->port, s, count);
+}
+
+static int __init
+owl_uart_early_console_setup(struct earlycon_device *device, const char *opt)
+{
+	if (!device->port.membase)
+		return -ENODEV;
+
+	device->con->write = owl_uart_early_console_write;
+
+	return 0;
+}
+OF_EARLYCON_DECLARE(owl, "actions,owl-uart",
+		    owl_uart_early_console_setup);
+
+#endif /* CONFIG_SERIAL_OWL_CONSOLE */
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1587267 — [PATCH v2 09/17] Documentation: kernel-parameters: Document owl earlycon

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 09/17] Documentation: kernel-parameters: Document owl earlycon
Message-ID<tef3l-2Ja-39@gated-at.bofh.it>
In reply to#1587260
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2: unchanged
 
 Documentation/admin-guide/kernel-parameters.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 986e443..f48a142 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -943,6 +943,12 @@
 			must already be setup and configured. Options are not
 			yet supported.
 
+		owl,<addr>
+			Start an early, polled-mode console on an Owl serial
+			port at the specified address. The serial port must
+			already be setup and configured. Options are not yet
+			supported.
+
 		smh	Use ARM semihosting calls for early console.
 
 		s3c2410,<addr>
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1587268 — [PATCH v2 07/17] dt-bindings: serial: Document Actions Semi Owl UARTs

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 07/17] dt-bindings: serial: Document Actions Semi Owl UARTs
Message-ID<tef3l-2Ja-35@gated-at.bofh.it>
In reply to#1587260
This UART is found on S500 and S900 SoCs.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Adopted "actions" vendor prefix
 
 .../devicetree/bindings/serial/actions,owl-uart.txt      | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/actions,owl-uart.txt

diff --git a/Documentation/devicetree/bindings/serial/actions,owl-uart.txt b/Documentation/devicetree/bindings/serial/actions,owl-uart.txt
new file mode 100644
index 0000000..aa873ea
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/actions,owl-uart.txt
@@ -0,0 +1,16 @@
+Actions Semi Owl UART
+
+Required properties:
+- compatible :  "actions,s500-uart", "actions,owl-uart" for S500
+                "actions,s900-uart", "actions,owl-uart" for S900
+- reg        :  Offset and length of the register set for the device.
+- interrupts :  Should contain UART interrupt.
+
+
+Example:
+
+		uart3: serial@b0126000 {
+			compatible = "actions,s500-uart", "actions,owl-uart";
+			reg = <0xb0126000 0x1000>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		};
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1589061 — Re: [PATCH v2 07/17] dt-bindings: serial: Document Actions Semi Owl UARTs

FromRob Herring <robh@kernel.org>
Date2017-02-28 01:20 +0100
SubjectRe: [PATCH v2 07/17] dt-bindings: serial: Document Actions Semi Owl UARTs
Message-ID<tfDGh-4RF-5@gated-at.bofh.it>
In reply to#1587268
On Fri, Feb 24, 2017 at 04:40:45AM +0100, Andreas Färber wrote:
> This UART is found on S500 and S900 SoCs.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Adopted "actions" vendor prefix
>  
>  .../devicetree/bindings/serial/actions,owl-uart.txt      | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/actions,owl-uart.txt

Acked-by: Rob Herring <robh@kernel.org>

[toc] | [prev] | [next] | [standalone]


#1587269 — [RFC v2 03/17] dt-bindings: timer: Document Owl timer

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[RFC v2 03/17] dt-bindings: timer: Document Owl timer
Message-ID<tef3l-2Ja-33@gated-at.bofh.it>
In reply to#1587260
The Actions Semi S500 SoC contains a timer block with two timers.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: new
 
 .../devicetree/bindings/timer/actions,owl-timer.txt      | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/actions,owl-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/actions,owl-timer.txt b/Documentation/devicetree/bindings/timer/actions,owl-timer.txt
new file mode 100644
index 0000000..141bc7b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/actions,owl-timer.txt
@@ -0,0 +1,16 @@
+Actions Semi Owl Timer
+
+Required properties:
+- compatible :  "actions,owl-timer"
+- reg        :  Offset and length of the register set for the device.
+- interrupts :  Should contain two timer interrupts.
+
+
+Example:
+
+		timer@b0168000 {
+			compatible = "actions,owl-timer";
+			reg = <0xb0168000 0x100>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		};
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1588698 — Re: [RFC v2 03/17] dt-bindings: timer: Document Owl timer

FromAndreas Färber <afaerber@suse.de>
Date2017-02-27 15:50 +0100
SubjectRe: [RFC v2 03/17] dt-bindings: timer: Document Owl timer
Message-ID<tfuMI-6Wf-41@gated-at.bofh.it>
In reply to#1587269
Am 24.02.2017 um 04:40 schrieb Andreas Färber:
> The Actions Semi S500 SoC contains a timer block with two timers.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v2: new
>  
>  .../devicetree/bindings/timer/actions,owl-timer.txt      | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/actions,owl-timer.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/actions,owl-timer.txt b/Documentation/devicetree/bindings/timer/actions,owl-timer.txt
> new file mode 100644
> index 0000000..141bc7b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/actions,owl-timer.txt
> @@ -0,0 +1,16 @@
> +Actions Semi Owl Timer
> +
> +Required properties:
> +- compatible :  "actions,owl-timer"
> +- reg        :  Offset and length of the register set for the device.
> +- interrupts :  Should contain two timer interrupts.
> +
> +
> +Example:
> +
> +		timer@b0168000 {
> +			compatible = "actions,owl-timer";
> +			reg = <0xb0168000 0x100>;
> +			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
> +			             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> +		};

I need to modify these bindings for upcoming v3 in the following ways:

* "actions,s500-timer", "actions,owl-timer" to deal with S500 vs. S900
differences while keeping a single driver registration (or would two
registrations be preferred, dropping the second compatible? they do
share a common subset)

* Use named interrupts to deal with 2x 2Hz + 2x Timer vs. 4x Timer for
complete hardware description

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

[toc] | [prev] | [next] | [standalone]


#1589060 — Re: [RFC v2 03/17] dt-bindings: timer: Document Owl timer

FromRob Herring <robh@kernel.org>
Date2017-02-28 01:20 +0100
SubjectRe: [RFC v2 03/17] dt-bindings: timer: Document Owl timer
Message-ID<tfDGh-4RF-7@gated-at.bofh.it>
In reply to#1588698
On Mon, Feb 27, 2017 at 03:40:07PM +0100, Andreas Färber wrote:
> Am 24.02.2017 um 04:40 schrieb Andreas Färber:
> > The Actions Semi S500 SoC contains a timer block with two timers.
> > 
> > Signed-off-by: Andreas Färber <afaerber@suse.de>
> > ---
> >  v2: new
> >  
> >  .../devicetree/bindings/timer/actions,owl-timer.txt      | 16 ++++++++++++++++
> >  1 file changed, 16 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/timer/actions,owl-timer.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/timer/actions,owl-timer.txt b/Documentation/devicetree/bindings/timer/actions,owl-timer.txt
> > new file mode 100644
> > index 0000000..141bc7b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/timer/actions,owl-timer.txt
> > @@ -0,0 +1,16 @@
> > +Actions Semi Owl Timer
> > +
> > +Required properties:
> > +- compatible :  "actions,owl-timer"
> > +- reg        :  Offset and length of the register set for the device.
> > +- interrupts :  Should contain two timer interrupts.
> > +
> > +
> > +Example:
> > +
> > +		timer@b0168000 {
> > +			compatible = "actions,owl-timer";
> > +			reg = <0xb0168000 0x100>;
> > +			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
> > +			             <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> > +		};
> 
> I need to modify these bindings for upcoming v3 in the following ways:
> 
> * "actions,s500-timer", "actions,owl-timer" to deal with S500 vs. S900
> differences while keeping a single driver registration (or would two
> registrations be preferred, dropping the second compatible? they do
> share a common subset)

The former is fine.

> 
> * Use named interrupts to deal with 2x 2Hz + 2x Timer vs. 4x Timer for
> complete hardware description

The compatible should imply this difference.

Rob

[toc] | [prev] | [next] | [standalone]


#1587270 — [PATCH v2 12/17] dt-bindings: arm: Document Actions Semi S900

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 12/17] dt-bindings: arm: Document Actions Semi S900
Message-ID<tef3l-2Ja-37@gated-at.bofh.it>
In reply to#1587260
The Actions Semi S900 is a quad-core ARM Cortex-A53 SoC.
The Bubblegum-96 is a 96Boards Consumer Edition compliant board (4/96).

Cc: 96boards@ucrobotics.com
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Adopted "actions" vendor prefix
 * Extended text
 
 Documentation/devicetree/bindings/arm/actions.txt | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt
index 1d3782e..3bc7ea5 100644
--- a/Documentation/devicetree/bindings/arm/actions.txt
+++ b/Documentation/devicetree/bindings/arm/actions.txt
@@ -22,3 +22,18 @@ Boards:
 Root node property compatible must contain, depending on board:
 
  - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar"
+
+
+S900 SoC
+========
+
+Required root node properties:
+
+- compatible :  must contain "actions,s900"
+
+
+Boards:
+
+Root node property compatible must contain, depending on board:
+
+ - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96"
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1589065 — Re: [PATCH v2 12/17] dt-bindings: arm: Document Actions Semi S900

FromRob Herring <robh@kernel.org>
Date2017-02-28 01:30 +0100
SubjectRe: [PATCH v2 12/17] dt-bindings: arm: Document Actions Semi S900
Message-ID<tfDPX-4VN-1@gated-at.bofh.it>
In reply to#1587270
On Fri, Feb 24, 2017 at 04:40:50AM +0100, Andreas Färber wrote:
> The Actions Semi S900 is a quad-core ARM Cortex-A53 SoC.
> The Bubblegum-96 is a 96Boards Consumer Edition compliant board (4/96).
> 
> Cc: 96boards@ucrobotics.com
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Adopted "actions" vendor prefix
>  * Extended text
>  
>  Documentation/devicetree/bindings/arm/actions.txt | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

[toc] | [prev] | [next] | [standalone]


#1587272 — [PATCH v2 04/17] clocksource: Add Owl timer

FromAndreas Färber <afaerber@suse.de>
Date2017-02-24 04:50 +0100
Subject[PATCH v2 04/17] clocksource: Add Owl timer
Message-ID<tef3l-2Ja-41@gated-at.bofh.it>
In reply to#1587260
Implement clocksource and clockevents for Actions Semi S500.

Based on LeMaker linux-actions tree.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: new
 
 drivers/clocksource/Kconfig     |   7 ++
 drivers/clocksource/Makefile    |   1 +
 drivers/clocksource/owl-timer.c | 146 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 154 insertions(+)
 create mode 100644 drivers/clocksource/owl-timer.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 3356ab8..2551365 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -107,6 +107,13 @@ config ORION_TIMER
 	help
 	  Enables the support for the Orion timer driver
 
+config OWL_TIMER
+	bool "Owl timer driver" if COMPILE_TEST
+	depends on GENERIC_CLOCKEVENTS
+	select CLKSRC_MMIO
+	help
+	  Enables the support for the Actions Semi Owl timer driver.
+
 config SUN4I_TIMER
 	bool "Sun4i timer driver" if COMPILE_TEST
 	depends on GENERIC_CLOCKEVENTS
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index d227d13..801b65a 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_CLKSRC_PISTACHIO)	+= time-pistachio.o
 obj-$(CONFIG_CLKSRC_TI_32K)	+= timer-ti-32k.o
 obj-$(CONFIG_CLKSRC_NPS)	+= timer-nps.o
 obj-$(CONFIG_OXNAS_RPS_TIMER)	+= timer-oxnas-rps.o
+obj-$(CONFIG_OWL_TIMER)		+= owl-timer.o
 
 obj-$(CONFIG_ARC_TIMERS)		+= arc_timer.o
 obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
diff --git a/drivers/clocksource/owl-timer.c b/drivers/clocksource/owl-timer.c
new file mode 100644
index 0000000..e218ad7
--- /dev/null
+++ b/drivers/clocksource/owl-timer.c
@@ -0,0 +1,146 @@
+/*
+ * Actions Semi Owl timer
+ *
+ * Copyright 2012 Actions Semi Inc.
+ * Author: Actions Semi, Inc.
+ *
+ * Copyright (c) 2017 SUSE Linux GmbH
+ * Author: Andreas Färber
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/sched_clock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#define OWL_T0_CTL		0x08
+#define OWL_T0_CMP		0x0c
+#define OWL_T0_VAL		0x10
+#define OWL_T1_CTL		0x14
+#define OWL_T1_CMP		0x18
+#define OWL_T1_VAL		0x1c
+
+#define OWL_Tx_CTL_INTEN	(1 << 1)
+#define OWL_Tx_CTL_EN		(1 << 2)
+
+static void __iomem *owl_timer_base;
+
+static u64 notrace owl_timer_sched_read(void)
+{
+	return (u64)readl(owl_timer_base + OWL_T0_VAL);
+}
+
+static int owl_timer_set_state_shutdown(struct clock_event_device *evt)
+{
+	writel(0, owl_timer_base + OWL_T1_CTL);
+
+	return 0;
+}
+
+static int owl_timer_set_state_oneshot(struct clock_event_device *evt)
+{
+	writel(0, owl_timer_base + OWL_T1_CTL);
+	writel(0, owl_timer_base + OWL_T1_VAL);
+	writel(0, owl_timer_base + OWL_T1_CMP);
+
+	return 0;
+}
+
+static int owl_timer_tick_resume(struct clock_event_device *evt)
+{
+	return 0;
+}
+
+static int owl_timer_set_next_event(unsigned long evt,
+				    struct clock_event_device *ev)
+{
+	writel(0, owl_timer_base + OWL_T1_CTL);
+
+	writel(0, owl_timer_base + OWL_T1_VAL);
+	writel(evt, owl_timer_base + OWL_T1_CMP);
+
+	writel(OWL_Tx_CTL_EN | OWL_Tx_CTL_INTEN, owl_timer_base + OWL_T1_CTL);
+
+	return 0;
+}
+
+static struct clock_event_device owl_clockevent = {
+	.name			= "owl_tick",
+	.rating			= 200,
+	.features		= CLOCK_EVT_FEAT_ONESHOT,
+	.set_state_shutdown	= owl_timer_set_state_shutdown,
+	.set_state_oneshot	= owl_timer_set_state_oneshot,
+	.tick_resume		= owl_timer_tick_resume,
+	.set_next_event		= owl_timer_set_next_event,
+};
+
+static irqreturn_t owl_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction owl_timer_irq = {
+	.name = "owl-timer",
+	.flags = IRQF_TIMER,
+	.handler = owl_timer_interrupt,
+	.dev_id = &owl_clockevent,
+};
+
+static int __init owl_timer_init(struct device_node *node)
+{
+	const unsigned long rate = 24000000;
+	int irq1, ret;
+
+	owl_timer_base = of_io_request_and_map(node, 0, "owl-timer");
+	if (IS_ERR(owl_timer_base)) {
+		pr_err("Can't map timer registers");
+		return -ENXIO;
+	}
+
+	irq1 = irq_of_parse_and_map(node, 1);
+	if (irq1 <= 0) {
+		pr_err("Can't parse timer1 IRQ");
+		return -EINVAL;
+	}
+
+	writel(0, owl_timer_base + OWL_T0_CTL);
+	writel(0, owl_timer_base + OWL_T0_VAL);
+	writel(0, owl_timer_base + OWL_T0_CMP);
+	writel(OWL_Tx_CTL_EN, owl_timer_base + OWL_T0_CTL);
+
+	sched_clock_register(owl_timer_sched_read, 32, rate);
+	clocksource_mmio_init(owl_timer_base + OWL_T0_VAL, node->name,
+			      rate, 200, 32, clocksource_mmio_readl_up);
+
+	writel(0, owl_timer_base + OWL_T1_CTL);
+	writel(0, owl_timer_base + OWL_T1_VAL);
+	writel(0, owl_timer_base + OWL_T1_CMP);
+
+	ret = setup_irq(irq1, &owl_timer_irq);
+	if (ret) {
+		pr_warn("failed to setup irq %d\n", irq1);
+		return ret;
+	}
+
+	owl_clockevent.cpumask = cpumask_of(0);
+	owl_clockevent.irq = irq1;
+
+	clockevents_config_and_register(&owl_clockevent, rate,
+					0xf, 0xffffffff);
+
+	return 0;
+}
+CLOCKSOURCE_OF_DECLARE(owl, "actions,owl-timer", owl_timer_init);
-- 
2.10.2

[toc] | [prev] | [next] | [standalone]


#1587982 — Re: [PATCH v2 04/17] clocksource: Add Owl timer

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-02-24 23:30 +0100
SubjectRe: [PATCH v2 04/17] clocksource: Add Owl timer
Message-ID<tewxb-6Qy-3@gated-at.bofh.it>
In reply to#1587272
On Fri, Feb 24, 2017 at 04:40:42AM +0100, Andreas Färber wrote:
> Implement clocksource and clockevents for Actions Semi S500.
> 
> Based on LeMaker linux-actions tree.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>

As this is a new driver, please give some technical information about the
driver itself and a pointer to documentation if it is publicly available.

[ ... ]

> +#define OWL_T0_CMP		0x0c
> +#define OWL_T0_VAL		0x10
> +#define OWL_T1_CTL		0x14
> +#define OWL_T1_CMP		0x18
> +#define OWL_T1_VAL		0x1c
> +
> +#define OWL_Tx_CTL_INTEN	(1 << 1)
> +#define OWL_Tx_CTL_EN		(1 << 2)

s/(1 << 1)/BIT(1)/
s/(1 << 2)/BIT(2)/

> +
> +static void __iomem *owl_timer_base;
> +
> +static u64 notrace owl_timer_sched_read(void)
> +{
> +	return (u64)readl(owl_timer_base + OWL_T0_VAL);
> +}
> +
> +static int owl_timer_set_state_shutdown(struct clock_event_device *evt)
> +{
> +	writel(0, owl_timer_base + OWL_T1_CTL);
> +
> +	return 0;
> +}
> +
> +static int owl_timer_set_state_oneshot(struct clock_event_device *evt)
> +{
> +	writel(0, owl_timer_base + OWL_T1_CTL);
> +	writel(0, owl_timer_base + OWL_T1_VAL);
> +	writel(0, owl_timer_base + OWL_T1_CMP);
> +
> +	return 0;
> +}
> +
> +static int owl_timer_tick_resume(struct clock_event_device *evt)
> +{
> +	return 0;
> +}
> +
> +static int owl_timer_set_next_event(unsigned long evt,
> +				    struct clock_event_device *ev)
> +{
> +	writel(0, owl_timer_base + OWL_T1_CTL);
> +
> +	writel(0, owl_timer_base + OWL_T1_VAL);
> +	writel(evt, owl_timer_base + OWL_T1_CMP);
> +
> +	writel(OWL_Tx_CTL_EN | OWL_Tx_CTL_INTEN, owl_timer_base + OWL_T1_CTL);
> +
> +	return 0;
> +}
> +
> +static struct clock_event_device owl_clockevent = {
> +	.name			= "owl_tick",
> +	.rating			= 200,
> +	.features		= CLOCK_EVT_FEAT_ONESHOT,

Did you consider adding CLOCK_EVT_FEAT_DYNIRQ ?

> +	.set_state_shutdown	= owl_timer_set_state_shutdown,
> +	.set_state_oneshot	= owl_timer_set_state_oneshot,
> +	.tick_resume		= owl_timer_tick_resume,
> +	.set_next_event		= owl_timer_set_next_event,
> +};
> +
> +static irqreturn_t owl_timer_interrupt(int irq, void *dev_id)
> +{
> +	struct clock_event_device *evt = (struct clock_event_device *)dev_id;
> +
> +	evt->event_handler(evt);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static struct irqaction owl_timer_irq = {
> +	.name = "owl-timer",
> +	.flags = IRQF_TIMER,
> +	.handler = owl_timer_interrupt,
> +	.dev_id = &owl_clockevent,
> +};
> +
> +static int __init owl_timer_init(struct device_node *node)
> +{
> +	const unsigned long rate = 24000000;

Use DT, either use clock-frequency or a clock ref.

> +	int irq1, ret;
> +
> +	owl_timer_base = of_io_request_and_map(node, 0, "owl-timer");
> +	if (IS_ERR(owl_timer_base)) {
> +		pr_err("Can't map timer registers");
> +		return -ENXIO;

Why not PTR_ERR(owl_timer_base) ?

> +	}
> +
> +	irq1 = irq_of_parse_and_map(node, 1);
> +	if (irq1 <= 0) {
> +		pr_err("Can't parse timer1 IRQ");
> +		return -EINVAL;
> +	}
> +
> +	writel(0, owl_timer_base + OWL_T0_CTL);
> +	writel(0, owl_timer_base + OWL_T0_VAL);
> +	writel(0, owl_timer_base + OWL_T0_CMP);
> +	writel(OWL_Tx_CTL_EN, owl_timer_base + OWL_T0_CTL);

Please factor out these calls into a function.

> +
> +	sched_clock_register(owl_timer_sched_read, 32, rate);
> +	clocksource_mmio_init(owl_timer_base + OWL_T0_VAL, node->name,
> +			      rate, 200, 32, clocksource_mmio_readl_up);
> +
> +	writel(0, owl_timer_base + OWL_T1_CTL);
> +	writel(0, owl_timer_base + OWL_T1_VAL);
> +	writel(0, owl_timer_base + OWL_T1_CMP);
> +
> +	ret = setup_irq(irq1, &owl_timer_irq);
> +	if (ret) {
> +		pr_warn("failed to setup irq %d\n", irq1);
> +		return ret;
> +	}

s/setup_irq/request_irq/

> +
> +	owl_clockevent.cpumask = cpumask_of(0);
> +	owl_clockevent.irq = irq1;
> +
> +	clockevents_config_and_register(&owl_clockevent, rate,
> +					0xf, 0xffffffff);
> +
> +	return 0;
> +}
> +CLOCKSOURCE_OF_DECLARE(owl, "actions,owl-timer", owl_timer_init);

Thanks !

  -- Daniel 

-- 

 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

[toc] | [prev] | [next] | [standalone]


Page 1 of 2  [1] 2  Next page →

Back to top | Article view | linux.kernel


csiph-web