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[PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements

Started byJohn Keeping <john@metanate.com>
First post2017-02-24 14:00 +0100
Last post2017-02-27 04:40 +0100
Articles 4 on this page of 24 — 3 participants

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  [PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 18/23] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 13/23] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 23/23] drm/rockchip: dw-mipi-dsi: add reset control John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 12/23] drm/rockchip: dw-mipi-dsi: allow commands in panel_disable John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 02/23] drm/rockchip: dw-mipi-dsi: pass mode in where needed John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 07/23] drm/rockchip: dw-mipi-dsi: include bad value in error message John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 21/23] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 19/23] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 06/23] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 15/23] drm/rockchip: dw-mipi-dsi: configure PHY before enabling John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 08/23] drm/rockchip: dw-mipi-dsi: respect message flags John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 04/23] drm/rockchip: dw-mipi-dsi: fix command header writes John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 10/23] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 11/23] drm/rockchip: dw-mipi-dsi: prepare panel after phy init John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 17/23] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 09/23] drm/rockchip: dw-mipi-dsi: only request HS clock when required John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 03/23] drm/rockchip: dw-mipi-dsi: remove mode_set hook John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 05/23] drm/rockchip: dw-mipi-dsi: fix generic packet status check John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 01/23] drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for MIPI John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 16/23] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping <john@metanate.com> - 2017-02-24 14:00 +0100
    [PATCH v4 22/23] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping <john@metanate.com> - 2017-02-24 14:10 +0100
    Re: [PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements Mark yao <mark.yao@rock-chips.com> - 2017-02-27 02:50 +0100
    Re: [PATCH v4 00/23] drm/rockchip: MIPI fixes & improvements Chris Zhong <zyw@rock-chips.com> - 2017-02-27 04:40 +0100

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#1587597 — [PATCH v4 16/23] drm/rockchip: dw-mipi-dsi: properly configure PHY timing

FromJohn Keeping <john@metanate.com>
Date2017-02-24 14:00 +0100
Subject[PATCH v4 16/23] drm/rockchip: dw-mipi-dsi: properly configure PHY timing
Message-ID<tenDC-eO-65@gated-at.bofh.it>
In reply to#1587574
These values are specified as constant time periods but the PHY
configuration is in terms of the current lane byte clock so using
constant values guarantees that the timings will be outside the
specification with some display configurations.

Derive the necessary configuration from the byte clock in order to
ensure that the PHY configuration is correct.

Signed-off-by: John Keeping <john@metanate.com>
---
v4:
- Simplify ns2bc and ns2ui calculations as suggested by Sean Paul
v3:
- Wrap some long lines
Unchanged in v2
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 35 ++++++++++++++++++++++++++++++----
 1 file changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 4fee5176c606..9b6a60deb69e 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -383,6 +383,22 @@ static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
 	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
 }
 
+/**
+ * ns2bc - Nanoseconds to byte clock cycles
+ */
+static inline unsigned int ns2bc(struct dw_mipi_dsi *dsi, int ns)
+{
+	return DIV_ROUND_UP(ns * dsi->lane_mbps / 8, 1000);
+}
+
+/**
+ * ns2ui - Nanoseconds to UI time periods
+ */
+static inline unsigned int ns2ui(struct dw_mipi_dsi *dsi, int ns)
+{
+	return DIV_ROUND_UP(ns * dsi->lane_mbps, 1000);
+}
+
 static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 {
 	int ret, testdin, vco, val;
@@ -434,10 +450,21 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 					 SETRD_MAX | POWER_MANAGE |
 					 TER_RESISTORS_ON);
 
-
-	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x55);
-	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+	dw_mipi_dsi_phy_write(dsi, 0x60, TLP_PROGRAM_EN | ns2bc(dsi, 500));
+	dw_mipi_dsi_phy_write(dsi, 0x61, THS_PRE_PROGRAM_EN | ns2ui(dsi, 40));
+	dw_mipi_dsi_phy_write(dsi, 0x62, THS_ZERO_PROGRAM_EN | ns2bc(dsi, 300));
+	dw_mipi_dsi_phy_write(dsi, 0x63, THS_PRE_PROGRAM_EN | ns2ui(dsi, 100));
+	dw_mipi_dsi_phy_write(dsi, 0x64, BIT(5) | ns2bc(dsi, 100));
+	dw_mipi_dsi_phy_write(dsi, 0x65, BIT(5) | (ns2bc(dsi, 60) + 7));
+
+	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | ns2bc(dsi, 500));
+	dw_mipi_dsi_phy_write(dsi, 0x71,
+			      THS_PRE_PROGRAM_EN | (ns2ui(dsi, 50) + 5));
+	dw_mipi_dsi_phy_write(dsi, 0x72,
+			      THS_ZERO_PROGRAM_EN | (ns2bc(dsi, 140) + 2));
+	dw_mipi_dsi_phy_write(dsi, 0x73,
+			      THS_PRE_PROGRAM_EN | (ns2ui(dsi, 60) + 8));
+	dw_mipi_dsi_phy_write(dsi, 0x74, BIT(5) | ns2bc(dsi, 100));
 
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
 				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
-- 
2.12.0.rc0.230.gf625d4cdb9.dirty

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#1587606 — [PATCH v4 22/23] drm/rockchip: dw-mipi-dsi: support non-burst modes

FromJohn Keeping <john@metanate.com>
Date2017-02-24 14:10 +0100
Subject[PATCH v4 22/23] drm/rockchip: dw-mipi-dsi: support non-burst modes
Message-ID<tenNh-yV-27@gated-at.bofh.it>
In reply to#1587574
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
---
v4:
- Add Sean's Reviewed-by
v3:
- Add Chris' Reviewed-by
Unchanged in v2
---
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 9edb868f8dc1..0c4bae711e84 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -82,7 +82,9 @@
 #define FRAME_BTA_ACK			BIT(14)
 #define ENABLE_LOW_POWER		(0x3f << 8)
 #define ENABLE_LOW_POWER_MASK		(0x3f << 8)
-#define VID_MODE_TYPE_BURST_SYNC_PULSES		0x2
+#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES	0x0
+#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS	0x1
+#define VID_MODE_TYPE_BURST			0x2
 #define VID_MODE_TYPE_MASK			0x3
 
 #define DSI_VID_PKT_SIZE		0x3c
@@ -286,6 +288,7 @@ struct dw_mipi_dsi {
 	u32 format;
 	u16 input_div;
 	u16 feedback_div;
+	unsigned long mode_flags;
 
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
@@ -558,15 +561,10 @@ static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
 		return -EINVAL;
 	}
 
-	if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) ||
-	    !(device->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)) {
-		dev_err(dsi->dev, "device mode is unsupported\n");
-		return -EINVAL;
-	}
-
 	dsi->lanes = device->lanes;
 	dsi->channel = device->channel;
 	dsi->format = device->format;
+	dsi->mode_flags = device->mode_flags;
 	dsi->panel = of_drm_find_panel(device->dev.of_node);
 	if (dsi->panel)
 		return drm_panel_attach(dsi->panel, &dsi->connector);
@@ -725,7 +723,14 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val;
 
-	val = VID_MODE_TYPE_BURST_SYNC_PULSES | ENABLE_LOW_POWER;
+	val = ENABLE_LOW_POWER;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
+		val |= VID_MODE_TYPE_BURST;
+	else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+		val |= VID_MODE_TYPE_NON_BURST_SYNC_PULSES;
+	else
+		val |= VID_MODE_TYPE_NON_BURST_SYNC_EVENTS;
 
 	dsi_write(dsi, DSI_VID_MODE_CFG, val);
 }
-- 
2.12.0.rc0.230.gf625d4cdb9.dirty

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#1588471

FromMark yao <mark.yao@rock-chips.com>
Date2017-02-27 02:50 +0100
Message-ID<tfiBQ-6J1-5@gated-at.bofh.it>
In reply to#1587574
On 2017年02月24日 20:54, John Keeping wrote:
> This version is mostly small changes in response to review comments from
> Sean and Chris, the details are in the individual patches.
>
> I decided to drop the final patch which adds support for MIPI read
> commands because I'm not using that feature now and I can't easily test
> it.  It's on the list if anyone wants to pick it up in the future.
>
> Version 3 was posted here:
> http://www.spinics.net/lists/dri-devel/msg130977.html
>
> Thanks to Sean Paul and Chris Zhong for their review and testing of this
> series.

Looks good to me.

Acked-by: Mark Yao <mark.yao@rock-chips.com>

>
> John Keeping (23):
>    drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for
>      MIPI
>    drm/rockchip: dw-mipi-dsi: pass mode in where needed
>    drm/rockchip: dw-mipi-dsi: remove mode_set hook
>    drm/rockchip: dw-mipi-dsi: fix command header writes
>    drm/rockchip: dw-mipi-dsi: fix generic packet status check
>    drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf
>    drm/rockchip: dw-mipi-dsi: include bad value in error message
>    drm/rockchip: dw-mipi-dsi: respect message flags
>    drm/rockchip: dw-mipi-dsi: only request HS clock when required
>    drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned
>    drm/rockchip: dw-mipi-dsi: prepare panel after phy init
>    drm/rockchip: dw-mipi-dsi: allow commands in panel_disable
>    drm/rockchip: dw-mipi-dsi: fix escape clock rate
>    drm/rockchip: dw-mipi-dsi: ensure PHY is reset
>    drm/rockchip: dw-mipi-dsi: configure PHY before enabling
>    drm/rockchip: dw-mipi-dsi: properly configure PHY timing
>    drm/rockchip: dw-mipi-dsi: improve PLL configuration
>    drm/rockchip: dw-mipi-dsi: use specific poll helper
>    drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC
>    drm/rockchip: vop: test for P{H,V}SYNC
>    drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded
>    drm/rockchip: dw-mipi-dsi: support non-burst modes
>    drm/rockchip: dw-mipi-dsi: add reset control
>
>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c      | 325 +++++++++++++++++++---------
>   drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   4 +-
>   2 files changed, 220 insertions(+), 109 deletions(-)
>


-- 
Ｍark Yao

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#1588499

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-27 04:40 +0100
Message-ID<tfkkh-7Z3-5@gated-at.bofh.it>
In reply to#1587574
Hi John

I have test this v4 series on my RK3399 board, it works well, thanks.

Tested-by: Chris Zhong<zyw@rock-chips.com>


On 02/24/2017 08:54 PM, John Keeping wrote:
> This version is mostly small changes in response to review comments from
> Sean and Chris, the details are in the individual patches.
>
> I decided to drop the final patch which adds support for MIPI read
> commands because I'm not using that feature now and I can't easily test
> it.  It's on the list if anyone wants to pick it up in the future.
>
> Version 3 was posted here:
> http://www.spinics.net/lists/dri-devel/msg130977.html
>
> Thanks to Sean Paul and Chris Zhong for their review and testing of this
> series.
>
> John Keeping (23):
>    drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for
>      MIPI
>    drm/rockchip: dw-mipi-dsi: pass mode in where needed
>    drm/rockchip: dw-mipi-dsi: remove mode_set hook
>    drm/rockchip: dw-mipi-dsi: fix command header writes
>    drm/rockchip: dw-mipi-dsi: fix generic packet status check
>    drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf
>    drm/rockchip: dw-mipi-dsi: include bad value in error message
>    drm/rockchip: dw-mipi-dsi: respect message flags
>    drm/rockchip: dw-mipi-dsi: only request HS clock when required
>    drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned
>    drm/rockchip: dw-mipi-dsi: prepare panel after phy init
>    drm/rockchip: dw-mipi-dsi: allow commands in panel_disable
>    drm/rockchip: dw-mipi-dsi: fix escape clock rate
>    drm/rockchip: dw-mipi-dsi: ensure PHY is reset
>    drm/rockchip: dw-mipi-dsi: configure PHY before enabling
>    drm/rockchip: dw-mipi-dsi: properly configure PHY timing
>    drm/rockchip: dw-mipi-dsi: improve PLL configuration
>    drm/rockchip: dw-mipi-dsi: use specific poll helper
>    drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC
>    drm/rockchip: vop: test for P{H,V}SYNC
>    drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded
>    drm/rockchip: dw-mipi-dsi: support non-burst modes
>    drm/rockchip: dw-mipi-dsi: add reset control
>
>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c      | 325 +++++++++++++++++++---------
>   drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   4 +-
>   2 files changed, 220 insertions(+), 109 deletions(-)
>

-- 
Chris Zhong

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