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Groups > linux.kernel > #1586244 > unrolled thread
| Started by | Peter De Schrijver <pdeschrijver@nvidia.com> |
|---|---|
| First post | 2017-02-22 16:20 +0100 |
| Last post | 2017-02-23 10:20 +0100 |
| Articles | 2 — 2 participants |
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[PATCH 6/7] clk: tegra: correct tegra210_pll_fixed_mdiv_cfg rate calculation Peter De Schrijver <pdeschrijver@nvidia.com> - 2017-02-22 16:20 +0100
Re: [PATCH 6/7] clk: tegra: correct tegra210_pll_fixed_mdiv_cfg rate calculation Mikko Perttunen <cyndis@kapsi.fi> - 2017-02-23 10:20 +0100
| From | Peter De Schrijver <pdeschrijver@nvidia.com> |
|---|---|
| Date | 2017-02-22 16:20 +0100 |
| Subject | [PATCH 6/7] clk: tegra: correct tegra210_pll_fixed_mdiv_cfg rate calculation |
| Message-ID | <tdGRY-3AG-13@gated-at.bofh.it> |
Return the actually achieved rate in cfg->output_rate rather than just the
requested rate. This is important to make clk_round_rate return the correct
result.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/clk/tegra/clk-tegra210.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index fe698d2..58d7f9c 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -1222,6 +1222,7 @@ static int tegra210_pll_fixed_mdiv_cfg(struct clk_hw *hw,
cfg->n = p_rate / cf;
cfg->sdm_data = 0;
+ cfg->output_rate = input_rate;
if (params->sdm_ctrl_reg) {
unsigned long rem = p_rate - cf * cfg->n;
/* If ssc is enabled SDM enabled as well, even for integer n */
@@ -1232,10 +1233,15 @@ static int tegra210_pll_fixed_mdiv_cfg(struct clk_hw *hw,
s -= PLL_SDM_COEFF / 2;
cfg->sdm_data = sdin_din_to_data(s);
}
+ cfg->output_rate *= cfg->n * PLL_SDM_COEFF + PLL_SDM_COEFF/2 +
+ sdin_data_to_din(cfg->sdm_data);
+ cfg->output_rate /= p * cfg->m * PLL_SDM_COEFF;
+ } else {
+ cfg->output_rate *= cfg->n;
+ cfg->output_rate /= p * cfg->m;
}
cfg->input_rate = input_rate;
- cfg->output_rate = rate;
return 0;
}
--
1.9.1
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| From | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| Date | 2017-02-23 10:20 +0100 |
| Subject | Re: [PATCH 6/7] clk: tegra: correct tegra210_pll_fixed_mdiv_cfg rate calculation |
| Message-ID | <tdXJ7-7Ko-19@gated-at.bofh.it> |
| In reply to | #1586244 |
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
On 22.02.2017 17:14, Peter De Schrijver wrote:
> Return the actually achieved rate in cfg->output_rate rather than just the
> requested rate. This is important to make clk_round_rate return the correct
> result.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra210.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
> index fe698d2..58d7f9c 100644
> --- a/drivers/clk/tegra/clk-tegra210.c
> +++ b/drivers/clk/tegra/clk-tegra210.c
> @@ -1222,6 +1222,7 @@ static int tegra210_pll_fixed_mdiv_cfg(struct clk_hw *hw,
> cfg->n = p_rate / cf;
>
> cfg->sdm_data = 0;
> + cfg->output_rate = input_rate;
> if (params->sdm_ctrl_reg) {
> unsigned long rem = p_rate - cf * cfg->n;
> /* If ssc is enabled SDM enabled as well, even for integer n */
> @@ -1232,10 +1233,15 @@ static int tegra210_pll_fixed_mdiv_cfg(struct clk_hw *hw,
> s -= PLL_SDM_COEFF / 2;
> cfg->sdm_data = sdin_din_to_data(s);
> }
> + cfg->output_rate *= cfg->n * PLL_SDM_COEFF + PLL_SDM_COEFF/2 +
> + sdin_data_to_din(cfg->sdm_data);
> + cfg->output_rate /= p * cfg->m * PLL_SDM_COEFF;
> + } else {
> + cfg->output_rate *= cfg->n;
> + cfg->output_rate /= p * cfg->m;
> }
>
> cfg->input_rate = input_rate;
> - cfg->output_rate = rate;
>
> return 0;
> }
>
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