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Groups > linux.kernel > #1584392 > unrolled thread

[RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver

Started byChris Zhong <zyw@rock-chips.com>
First post2017-02-20 09:10 +0100
Last post2017-02-23 01:30 +0100
Articles 12 — 3 participants

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Contents

  [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver Chris Zhong <zyw@rock-chips.com> - 2017-02-20 09:10 +0100
    [RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient bandwidth of some panel Chris Zhong <zyw@rock-chips.com> - 2017-02-20 09:10 +0100
      Re: [RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient  bandwidth of some panel Sean Paul <seanpaul@chromium.org> - 2017-02-21 16:50 +0100
    [RESEND PATCH v7 1/7] dt-bindings: add rk3399 support for dw-mipi-rockchip Chris Zhong <zyw@rock-chips.com> - 2017-02-20 09:10 +0100
    [RESEND PATCH v7 7/7] drm/rockchip/dsi: add dw-mipi power domain support Chris Zhong <zyw@rock-chips.com> - 2017-02-20 09:10 +0100
    Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver Sean Paul <seanpaul@chromium.org> - 2017-02-21 16:40 +0100
      Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver Chris Zhong <zyw@rock-chips.com> - 2017-02-22 02:50 +0100
      Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver John Keeping <john@metanate.com> - 2017-02-22 14:50 +0100
        Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver Sean Paul <seanpaul@chromium.org> - 2017-02-22 17:00 +0100
          Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver John Keeping <john@metanate.com> - 2017-02-22 20:00 +0100
            Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver Sean Paul <seanpaul@chromium.org> - 2017-02-22 23:20 +0100
              Re: [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver Chris Zhong <zyw@rock-chips.com> - 2017-02-23 01:30 +0100

#1584392 — [RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-20 09:10 +0100
Subject[RESEND PATCH v7 0/7] Rockchip dw-mipi-dsi driver
Message-ID<tcRcJ-27h-11@gated-at.bofh.it>
Hi all

[Resend this v7 version series, since there are 5 mails have gone missing, last
week]

This version does not change the existing v6 patches, just to add the
"bandwidth fix" patch back, since we really need it.

This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
RK3399 is almost the same as RK3288, except a little bit of difference
in phy clock controlling and port id selection register. These patches
add RK3399 support and the power domain support.

And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
they have been tested on rk3288 evb board.

[0]:
[01/24] https://patchwork.kernel.org/patch/9544089
[02/24] https://patchwork.kernel.org/patch/9544061
[03/24] https://patchwork.kernel.org/patch/9544065
[04/24] https://patchwork.kernel.org/patch/9544077
[05/24] https://patchwork.kernel.org/patch/9544033
[06/24] https://patchwork.kernel.org/patch/9544037
[07/24] https://patchwork.kernel.org/patch/9544029
[08/24] https://patchwork.kernel.org/patch/9544031
[09/24] https://patchwork.kernel.org/patch/9544083
[10/24] https://patchwork.kernel.org/patch/9544063
[11/24] https://patchwork.kernel.org/patch/9544085
[12/24] https://patchwork.kernel.org/patch/9544093
[13/24] https://patchwork.kernel.org/patch/9544081
[14/24] https://patchwork.kernel.org/patch/9544057
[15/24] https://patchwork.kernel.org/patch/9544079
[16/24] https://patchwork.kernel.org/patch/9544035
[17/24] https://patchwork.kernel.org/patch/9544105
[18/24] https://patchwork.kernel.org/patch/9544059
[21/24] https://patchwork.kernel.org/patch/9544009
[22/24] https://patchwork.kernel.org/patch/9544049
[23/24] https://patchwork.kernel.org/patch/9544055
[24/24] https://patchwork.kernel.org/patch/9544109


Changes in v6:
- no need check phy_cfg_clk before enable/disable

Changes in v5:
- check the error of phy_cfg_clk in dw_mipi_dsi_bind

Changes in v4:
- remove the unrelated change

Changes in v3:
- base on John Keeping's patch series

Chris Zhong (7):
  dt-bindings: add rk3399 support for dw-mipi-rockchip
  drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi
  drm/rockchip/dsi: dw-mipi: correct the coding style
  drm/rockchip/dsi: remove mode_valid function
  dt-bindings: add power domain node for dw-mipi-rockchip
  drm/rockchip/dsi: fix insufficient bandwidth of some panel
  drm/rockchip/dsi: add dw-mipi power domain support

 .../display/rockchip/dw_mipi_dsi_rockchip.txt      |   7 +-
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c             | 160 ++++++++++++---------
 2 files changed, 100 insertions(+), 67 deletions(-)

-- 
2.6.3

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#1584394 — [RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient bandwidth of some panel

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-20 09:10 +0100
Subject[RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient bandwidth of some panel
Message-ID<tcRcK-27h-29@gated-at.bofh.it>
In reply to#1584392
Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough
for some panel, it will cause the screen display is not normal, so
increases the badnwidth to 1 / 0.8.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None

 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index c2d7674..a653384 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -532,8 +532,8 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
 
 	mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
 	if (mpclk) {
-		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
-		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
+		/* take 1 / 0.8, since mbps must big than bandwidth of RGB */
+		tmp = mpclk * (bpp / dsi->lanes) * 10 / 8;
 		if (tmp < max_mbps)
 			target_mbps = tmp;
 		else
-- 
2.6.3

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#1585448 — Re: [RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient bandwidth of some panel

FromSean Paul <seanpaul@chromium.org>
Date2017-02-21 16:50 +0100
SubjectRe: [RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient bandwidth of some panel
Message-ID<tdkRs-4uK-31@gated-at.bofh.it>
In reply to#1584394
On Mon, Feb 20, 2017 at 04:02:22PM +0800, Chris Zhong wrote:
> Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough
> for some panel, it will cause the screen display is not normal, so
> increases the badnwidth to 1 / 0.8.
> 
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>

Reviewed-by: Sean Paul <seanpaul@chromium.org>

> ---
> 
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> 
>  drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index c2d7674..a653384 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -532,8 +532,8 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
>  
>  	mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
>  	if (mpclk) {
> -		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
> -		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
> +		/* take 1 / 0.8, since mbps must big than bandwidth of RGB */
> +		tmp = mpclk * (bpp / dsi->lanes) * 10 / 8;
>  		if (tmp < max_mbps)
>  			target_mbps = tmp;
>  		else
> -- 
> 2.6.3
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Sean Paul, Software Engineer, Google / Chromium OS

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#1584396 — [RESEND PATCH v7 1/7] dt-bindings: add rk3399 support for dw-mipi-rockchip

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-20 09:10 +0100
Subject[RESEND PATCH v7 1/7] dt-bindings: add rk3399 support for dw-mipi-rockchip
Message-ID<tcRcK-27h-33@gated-at.bofh.it>
In reply to#1584392
The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has
additional phy config clock.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None

 .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt     | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
index 1753f0c..0f82568 100644
--- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt
@@ -5,10 +5,12 @@ Required properties:
 - #address-cells: Should be <1>.
 - #size-cells: Should be <0>.
 - compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi".
+	      "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi".
 - reg: Represent the physical address range of the controller.
 - interrupts: Represent the controller's interrupt to the CPU(s).
 - clocks, clock-names: Phandles to the controller's pll reference
-  clock(ref) and APB clock(pclk), as described in [1].
+  clock(ref) and APB clock(pclk). For RK3399, a phy config clock
+  (phy_cfg) is additional required. As described in [1].
 - rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
 - ports: contain a port node with endpoint definitions as defined in [2].
   For vopb,set the reg = <0> and set the reg = <1> for vopl.
-- 
2.6.3

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#1584398 — [RESEND PATCH v7 7/7] drm/rockchip/dsi: add dw-mipi power domain support

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-20 09:10 +0100
Subject[RESEND PATCH v7 7/7] drm/rockchip/dsi: add dw-mipi power domain support
Message-ID<tcRcK-27h-39@gated-at.bofh.it>
In reply to#1584392
Reference the power domain incase dw-mipi power down when
in use.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None

 drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index a653384..b32e4fc 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -12,6 +12,7 @@
 #include <linux/math64.h>
 #include <linux/module.h>
 #include <linux/of_device.h>
+#include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/reset.h>
 #include <linux/mfd/syscon.h>
@@ -293,6 +294,7 @@ struct dw_mipi_dsi {
 	struct clk *pclk;
 	struct clk *phy_cfg_clk;
 
+	int dpms_mode;
 	unsigned int lane_mbps; /* per lane */
 	u32 channel;
 	u32 lanes;
@@ -960,6 +962,9 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
 {
 	struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
 
+	if (dsi->dpms_mode != DRM_MODE_DPMS_ON)
+		return;
+
 	if (clk_prepare_enable(dsi->pclk)) {
 		dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__);
 		return;
@@ -971,7 +976,9 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
 	drm_panel_unprepare(dsi->panel);
 
 	dw_mipi_dsi_disable(dsi);
+	pm_runtime_put(dsi->dev);
 	clk_disable_unprepare(dsi->pclk);
+	dsi->dpms_mode = DRM_MODE_DPMS_OFF;
 }
 
 static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
@@ -987,11 +994,15 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
 	if (ret < 0)
 		return;
 
+	if (dsi->dpms_mode == DRM_MODE_DPMS_ON)
+		return;
+
 	if (clk_prepare_enable(dsi->pclk)) {
 		dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__);
 		return;
 	}
 
+	pm_runtime_get_sync(dsi->dev);
 	dw_mipi_dsi_init(dsi);
 	dw_mipi_dsi_dpi_config(dsi, mode);
 	dw_mipi_dsi_packet_handler_config(dsi);
@@ -1027,6 +1038,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
 
 	regmap_write(dsi->grf_regmap, pdata->grf_switch_reg, val);
 	dev_dbg(dsi->dev, "vop %s output to dsi0\n", (mux) ? "LIT" : "BIG");
+	dsi->dpms_mode = DRM_MODE_DPMS_ON;
 }
 
 static int
@@ -1194,6 +1206,7 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
 
 	dsi->dev = dev;
 	dsi->pdata = pdata;
+	dsi->dpms_mode = DRM_MODE_DPMS_OFF;
 
 	ret = rockchip_mipi_parse_dt(dsi);
 	if (ret)
@@ -1274,6 +1287,8 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
 
 	dev_set_drvdata(dev, dsi);
 
+	pm_runtime_enable(dev);
+
 	dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
 	dsi->dsi_host.dev = dev;
 	ret = mipi_dsi_host_register(&dsi->dsi_host);
@@ -1296,6 +1311,7 @@ static void dw_mipi_dsi_unbind(struct device *dev, struct device *master,
 	struct dw_mipi_dsi *dsi = dev_get_drvdata(dev);
 
 	mipi_dsi_host_unregister(&dsi->dsi_host);
+	pm_runtime_disable(dev);
 	clk_disable_unprepare(dsi->pllref_clk);
 }
 
-- 
2.6.3

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#1585418

FromSean Paul <seanpaul@chromium.org>
Date2017-02-21 16:40 +0100
Message-ID<tdkHL-4r9-5@gated-at.bofh.it>
In reply to#1584392
On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:
> Hi all
> 
> [Resend this v7 version series, since there are 5 mails have gone missing, last
> week]
> 
> This version does not change the existing v6 patches, just to add the
> "bandwidth fix" patch back, since we really need it.
> 
> This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
> RK3399 is almost the same as RK3288, except a little bit of difference
> in phy clock controlling and port id selection register. These patches
> add RK3399 support and the power domain support.
> 
> And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
> they have been tested on rk3288 evb board.

Do we have an ETA on when John is planning on respinning his patchset based on
review feedback?

> 
> [0]:
> [01/24] https://patchwork.kernel.org/patch/9544089
> [02/24] https://patchwork.kernel.org/patch/9544061
> [03/24] https://patchwork.kernel.org/patch/9544065
> [04/24] https://patchwork.kernel.org/patch/9544077
> [05/24] https://patchwork.kernel.org/patch/9544033
> [06/24] https://patchwork.kernel.org/patch/9544037
> [07/24] https://patchwork.kernel.org/patch/9544029
> [08/24] https://patchwork.kernel.org/patch/9544031
> [09/24] https://patchwork.kernel.org/patch/9544083
> [10/24] https://patchwork.kernel.org/patch/9544063
> [11/24] https://patchwork.kernel.org/patch/9544085
> [12/24] https://patchwork.kernel.org/patch/9544093
> [13/24] https://patchwork.kernel.org/patch/9544081
> [14/24] https://patchwork.kernel.org/patch/9544057
> [15/24] https://patchwork.kernel.org/patch/9544079
> [16/24] https://patchwork.kernel.org/patch/9544035
> [17/24] https://patchwork.kernel.org/patch/9544105
> [18/24] https://patchwork.kernel.org/patch/9544059
> [21/24] https://patchwork.kernel.org/patch/9544009
> [22/24] https://patchwork.kernel.org/patch/9544049
> [23/24] https://patchwork.kernel.org/patch/9544055
> [24/24] https://patchwork.kernel.org/patch/9544109
> 
> 
> Changes in v6:
> - no need check phy_cfg_clk before enable/disable
> 
> Changes in v5:
> - check the error of phy_cfg_clk in dw_mipi_dsi_bind
> 
> Changes in v4:
> - remove the unrelated change
> 
> Changes in v3:
> - base on John Keeping's patch series
> 
> Chris Zhong (7):
>   dt-bindings: add rk3399 support for dw-mipi-rockchip
>   drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi
>   drm/rockchip/dsi: dw-mipi: correct the coding style
>   drm/rockchip/dsi: remove mode_valid function
>   dt-bindings: add power domain node for dw-mipi-rockchip
>   drm/rockchip/dsi: fix insufficient bandwidth of some panel
>   drm/rockchip/dsi: add dw-mipi power domain support
> 
>  .../display/rockchip/dw_mipi_dsi_rockchip.txt      |   7 +-
>  drivers/gpu/drm/rockchip/dw-mipi-dsi.c             | 160 ++++++++++++---------
>  2 files changed, 100 insertions(+), 67 deletions(-)
> 
> -- 
> 2.6.3
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Sean Paul, Software Engineer, Google / Chromium OS

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#1585857

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-22 02:50 +0100
Message-ID<tdue6-2or-5@gated-at.bofh.it>
In reply to#1585418
Hi Sean

On 02/21/2017 11:39 PM, Sean Paul wrote:
> On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:
>> Hi all
>>
>> [Resend this v7 version series, since there are 5 mails have gone missing, last
>> week]
>>
>> This version does not change the existing v6 patches, just to add the
>> "bandwidth fix" patch back, since we really need it.
>>
>> This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
>> RK3399 is almost the same as RK3288, except a little bit of difference
>> in phy clock controlling and port id selection register. These patches
>> add RK3399 support and the power domain support.
>>
>> And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
>> they have been tested on rk3288 evb board.
> Do we have an ETA on when John is planning on respinning his patchset based on
> review feedback?
>
I guess John will send the v4 patch soon, since there are not many point 
need to change.
And as I know, Mark Yao is going to merge John's v4 series to his 
branch, and this v7 series
will be merged after that.


>> [0]:
>> [01/24] https://patchwork.kernel.org/patch/9544089
>> [02/24] https://patchwork.kernel.org/patch/9544061
>> [03/24] https://patchwork.kernel.org/patch/9544065
>> [04/24] https://patchwork.kernel.org/patch/9544077
>> [05/24] https://patchwork.kernel.org/patch/9544033
>> [06/24] https://patchwork.kernel.org/patch/9544037
>> [07/24] https://patchwork.kernel.org/patch/9544029
>> [08/24] https://patchwork.kernel.org/patch/9544031
>> [09/24] https://patchwork.kernel.org/patch/9544083
>> [10/24] https://patchwork.kernel.org/patch/9544063
>> [11/24] https://patchwork.kernel.org/patch/9544085
>> [12/24] https://patchwork.kernel.org/patch/9544093
>> [13/24] https://patchwork.kernel.org/patch/9544081
>> [14/24] https://patchwork.kernel.org/patch/9544057
>> [15/24] https://patchwork.kernel.org/patch/9544079
>> [16/24] https://patchwork.kernel.org/patch/9544035
>> [17/24] https://patchwork.kernel.org/patch/9544105
>> [18/24] https://patchwork.kernel.org/patch/9544059
>> [21/24] https://patchwork.kernel.org/patch/9544009
>> [22/24] https://patchwork.kernel.org/patch/9544049
>> [23/24] https://patchwork.kernel.org/patch/9544055
>> [24/24] https://patchwork.kernel.org/patch/9544109
>>
>>
>> Changes in v6:
>> - no need check phy_cfg_clk before enable/disable
>>
>> Changes in v5:
>> - check the error of phy_cfg_clk in dw_mipi_dsi_bind
>>
>> Changes in v4:
>> - remove the unrelated change
>>
>> Changes in v3:
>> - base on John Keeping's patch series
>>
>> Chris Zhong (7):
>>    dt-bindings: add rk3399 support for dw-mipi-rockchip
>>    drm/rockchip/dsi: dw-mipi: support RK3399 mipi dsi
>>    drm/rockchip/dsi: dw-mipi: correct the coding style
>>    drm/rockchip/dsi: remove mode_valid function
>>    dt-bindings: add power domain node for dw-mipi-rockchip
>>    drm/rockchip/dsi: fix insufficient bandwidth of some panel
>>    drm/rockchip/dsi: add dw-mipi power domain support
>>
>>   .../display/rockchip/dw_mipi_dsi_rockchip.txt      |   7 +-
>>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c             | 160 ++++++++++++---------
>>   2 files changed, 100 insertions(+), 67 deletions(-)
>>
>> -- 
>> 2.6.3
>>
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Chris Zhong

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#1586155

FromJohn Keeping <john@metanate.com>
Date2017-02-22 14:50 +0100
Message-ID<tdFsR-2p2-9@gated-at.bofh.it>
In reply to#1585418
On Tue, 21 Feb 2017 10:39:18 -0500, Sean Paul wrote:

> On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:
> > Hi all
> > 
> > [Resend this v7 version series, since there are 5 mails have gone missing, last
> > week]
> > 
> > This version does not change the existing v6 patches, just to add the
> > "bandwidth fix" patch back, since we really need it.
> > 
> > This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
> > RK3399 is almost the same as RK3288, except a little bit of difference
> > in phy clock controlling and port id selection register. These patches
> > add RK3399 support and the power domain support.
> > 
> > And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
> > they have been tested on rk3288 evb board.  
> 
> Do we have an ETA on when John is planning on respinning his patchset based on
> review feedback?

I have all of the changes queued but I was hoping to find some time to
test the latest version before sending it out; unfortunately everything
else is more important at the moment.  If you're happy with the caveat
that the latest changes are build tested only I can probably send it
out this afternoon.


John

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#1586280

FromSean Paul <seanpaul@chromium.org>
Date2017-02-22 17:00 +0100
Message-ID<tdHuF-40t-21@gated-at.bofh.it>
In reply to#1586155
On Wed, Feb 22, 2017 at 8:43 AM, John Keeping <john@metanate.com> wrote:
> On Tue, 21 Feb 2017 10:39:18 -0500, Sean Paul wrote:
>
>> On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:
>> > Hi all
>> >
>> > [Resend this v7 version series, since there are 5 mails have gone missing, last
>> > week]
>> >
>> > This version does not change the existing v6 patches, just to add the
>> > "bandwidth fix" patch back, since we really need it.
>> >
>> > This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
>> > RK3399 is almost the same as RK3288, except a little bit of difference
>> > in phy clock controlling and port id selection register. These patches
>> > add RK3399 support and the power domain support.
>> >
>> > And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
>> > they have been tested on rk3288 evb board.
>>
>> Do we have an ETA on when John is planning on respinning his patchset based on
>> review feedback?
>
> I have all of the changes queued but I was hoping to find some time to
> test the latest version before sending it out; unfortunately everything
> else is more important at the moment.  If you're happy with the caveat
> that the latest changes are build tested only I can probably send it
> out this afternoon.

I suppose my answer depends on when the tested version will be
available, or perhaps Chris can test the new set for you? I don't have
any rockchip devices with mipi, so i'm not much help.

Sean

>
>
> John



-- 
Sean Paul, Software Engineer, Google / Chromium OS

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#1586407

FromJohn Keeping <john@metanate.com>
Date2017-02-22 20:00 +0100
Message-ID<tdKiR-62X-3@gated-at.bofh.it>
In reply to#1586280
On Wed, 22 Feb 2017 10:57:05 -0500, Sean Paul wrote:

> On Wed, Feb 22, 2017 at 8:43 AM, John Keeping <john@metanate.com> wrote:
> > On Tue, 21 Feb 2017 10:39:18 -0500, Sean Paul wrote:
> >  
> >> On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:  
> >> > Hi all
> >> >
> >> > [Resend this v7 version series, since there are 5 mails have gone missing, last
> >> > week]
> >> >
> >> > This version does not change the existing v6 patches, just to add the
> >> > "bandwidth fix" patch back, since we really need it.
> >> >
> >> > This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
> >> > RK3399 is almost the same as RK3288, except a little bit of difference
> >> > in phy clock controlling and port id selection register. These patches
> >> > add RK3399 support and the power domain support.
> >> >
> >> > And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
> >> > they have been tested on rk3288 evb board.  
> >>
> >> Do we have an ETA on when John is planning on respinning his patchset based on
> >> review feedback?  
> >
> > I have all of the changes queued but I was hoping to find some time to
> > test the latest version before sending it out; unfortunately everything
> > else is more important at the moment.  If you're happy with the caveat
> > that the latest changes are build tested only I can probably send it
> > out this afternoon.  
> 
> I suppose my answer depends on when the tested version will be
> available, or perhaps Chris can test the new set for you? I don't have
> any rockchip devices with mipi, so i'm not much help.

None of the changes scare me that much, so I don't expect testing to
throw up any problems but I don't like throwing out patches without at
least a basic test run.

I might have time to test on Friday, but I expect Chris has more time to
devote to this than I do, so maybe it's better if I send the patches out
tomorrow.


John

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#1586520

FromSean Paul <seanpaul@chromium.org>
Date2017-02-22 23:20 +0100
Message-ID<tdNqq-8tx-7@gated-at.bofh.it>
In reply to#1586407
On Wed, Feb 22, 2017 at 1:55 PM, John Keeping <john@metanate.com> wrote:
> On Wed, 22 Feb 2017 10:57:05 -0500, Sean Paul wrote:
>
>> On Wed, Feb 22, 2017 at 8:43 AM, John Keeping <john@metanate.com> wrote:
>> > On Tue, 21 Feb 2017 10:39:18 -0500, Sean Paul wrote:
>> >
>> >> On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:
>> >> > Hi all
>> >> >
>> >> > [Resend this v7 version series, since there are 5 mails have gone missing, last
>> >> > week]
>> >> >
>> >> > This version does not change the existing v6 patches, just to add the
>> >> > "bandwidth fix" patch back, since we really need it.
>> >> >
>> >> > This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
>> >> > RK3399 is almost the same as RK3288, except a little bit of difference
>> >> > in phy clock controlling and port id selection register. These patches
>> >> > add RK3399 support and the power domain support.
>> >> >
>> >> > And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
>> >> > they have been tested on rk3288 evb board.
>> >>
>> >> Do we have an ETA on when John is planning on respinning his patchset based on
>> >> review feedback?
>> >
>> > I have all of the changes queued but I was hoping to find some time to
>> > test the latest version before sending it out; unfortunately everything
>> > else is more important at the moment.  If you're happy with the caveat
>> > that the latest changes are build tested only I can probably send it
>> > out this afternoon.
>>
>> I suppose my answer depends on when the tested version will be
>> available, or perhaps Chris can test the new set for you? I don't have
>> any rockchip devices with mipi, so i'm not much help.
>
> None of the changes scare me that much, so I don't expect testing to
> throw up any problems but I don't like throwing out patches without at
> least a basic test run.
>

Agreed. I don't think we're in such desperate need that we should
forego testing. If Chris can provide Tested-by, you should send them
out, otherwise I'm happy to wait.

Thanks for the update,

Sean


> I might have time to test on Friday, but I expect Chris has more time to
> devote to this than I do, so maybe it's better if I send the patches out
> tomorrow.
>
>
> John



-- 
Sean Paul, Software Engineer, Google / Chromium OS

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#1586573

FromChris Zhong <zyw@rock-chips.com>
Date2017-02-23 01:30 +0100
Message-ID<tdPsd-1tR-1@gated-at.bofh.it>
In reply to#1586520
On 02/23/2017 06:10 AM, Sean Paul wrote:
> On Wed, Feb 22, 2017 at 1:55 PM, John Keeping <john@metanate.com> wrote:
>> On Wed, 22 Feb 2017 10:57:05 -0500, Sean Paul wrote:
>>
>>> On Wed, Feb 22, 2017 at 8:43 AM, John Keeping <john@metanate.com> wrote:
>>>> On Tue, 21 Feb 2017 10:39:18 -0500, Sean Paul wrote:
>>>>
>>>>> On Mon, Feb 20, 2017 at 04:02:16PM +0800, Chris Zhong wrote:
>>>>>> Hi all
>>>>>>
>>>>>> [Resend this v7 version series, since there are 5 mails have gone missing, last
>>>>>> week]
>>>>>>
>>>>>> This version does not change the existing v6 patches, just to add the
>>>>>> "bandwidth fix" patch back, since we really need it.
>>>>>>
>>>>>> This patch serial is for RK3399 MIPI DSI. The MIPI DSI controller of
>>>>>> RK3399 is almost the same as RK3288, except a little bit of difference
>>>>>> in phy clock controlling and port id selection register. These patches
>>>>>> add RK3399 support and the power domain support.
>>>>>>
>>>>>> And these patches base on John Keeping's v3 patches[0], it fixes many bugs,
>>>>>> they have been tested on rk3288 evb board.
>>>>> Do we have an ETA on when John is planning on respinning his patchset based on
>>>>> review feedback?
>>>> I have all of the changes queued but I was hoping to find some time to
>>>> test the latest version before sending it out; unfortunately everything
>>>> else is more important at the moment.  If you're happy with the caveat
>>>> that the latest changes are build tested only I can probably send it
>>>> out this afternoon.
>>> I suppose my answer depends on when the tested version will be
>>> available, or perhaps Chris can test the new set for you? I don't have
>>> any rockchip devices with mipi, so i'm not much help.
>> None of the changes scare me that much, so I don't expect testing to
>> throw up any problems but I don't like throwing out patches without at
>> least a basic test run.
>>
> Agreed. I don't think we're in such desperate need that we should
> forego testing. If Chris can provide Tested-by, you should send them
> out, otherwise I'm happy to wait.
>
> Thanks for the update,
>
> Sean

Sure, I am very glad to test them.
Actually, I have picked the v3 patches to cros kernel (changed a little 
bit).
So far, my 2 mipi dsi panels works well. The cros patches:
https://chromium-review.googlesource.com/#/c/430596/
...
https://chromium-review.googlesource.com/#/c/442347/

>
>> I might have time to test on Friday, but I expect Chris has more time to
>> devote to this than I do, so maybe it's better if I send the patches out
>> tomorrow.
>>
>>
>> John
>
>

-- 
Chris Zhong

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