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| Started by | Andy Lutomirski <luto@kernel.org> |
|---|---|
| First post | 2017-02-21 20:20 +0100 |
| Last post | 2017-02-22 16:20 +0100 |
| Articles | 5 — 3 participants |
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[PATCH v2 0/7] KVM TSS cleanups and speedups Andy Lutomirski <luto@kernel.org> - 2017-02-21 20:20 +0100
Re: [PATCH v2 0/7] KVM TSS cleanups and speedups Andy Lutomirski <luto@amacapital.net> - 2017-02-22 16:20 +0100
Re: [PATCH v2 0/7] KVM TSS cleanups and speedups Andy Lutomirski <luto@amacapital.net> - 2017-02-22 16:40 +0100
Re: [PATCH v2 0/7] KVM TSS cleanups and speedups Paolo Bonzini <pbonzini@redhat.com> - 2017-02-22 17:00 +0100
Re: [PATCH v2 0/7] KVM TSS cleanups and speedups Paolo Bonzini <pbonzini@redhat.com> - 2017-02-22 16:20 +0100
| From | Andy Lutomirski <luto@kernel.org> |
|---|---|
| Date | 2017-02-21 20:20 +0100 |
| Subject | [PATCH v2 0/7] KVM TSS cleanups and speedups |
| Message-ID | <tdo8G-6Sm-19@gated-at.bofh.it> |
The first four patches here are intended to be straightforward cleanups and to make a better base for Thomas' GDT series. They may be a slight speedup, too, because they remove an STR instruction from the VMX entry path. The last two patches are a reasonably large speedup but need careful review. FWIW, I can see lots of additional easy-ish speedups here. For example: - The GDT reload on VM exit isn't really needed at all. Instead let's just change the kernel limit to 0xFFFF. Doing that naively would waste memory, but doing it carefully on top of Thomas' series would be straightforward and almost free. - RDMSR from MSR_GS_BASE is totally pointless. - Once I or someone finishes the FSGSBASE series, we get a big speedup there. - The LDT reload code should be split up and optimized better, I think. Changes from v1: - Fix some changelog typos. - Fix the bug that Paolo found. - Rename the helpers to make their usage more obvious. - Move clearing __tss_limit_invalid into force_reload_TR() as a tiny optimization. - Add a test case. It doesn't test all the machinations, but at least it checks basic functionality. Andy Lutomirski (7): x86/asm: Define the kernel TSS limit in a macro x86/kvm/vmx: Don't fetch the TSS base from the GDT x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels x86/kvm/vmx: Simplify segment_base() x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss x86/kvm/vmx: Defer TR reload after VM exit selftests/x86: Add a basic selftest for ioperm arch/x86/include/asm/desc.h | 62 +++++++++++-- arch/x86/include/asm/processor.h | 12 ++- arch/x86/kernel/ioport.c | 11 +++ arch/x86/kernel/process.c | 10 ++ arch/x86/kvm/vmx.c | 63 ++++++------- tools/testing/selftests/x86/Makefile | 2 +- tools/testing/selftests/x86/ioperm.c | 171 +++++++++++++++++++++++++++++++++++ 7 files changed, 284 insertions(+), 47 deletions(-) create mode 100644 tools/testing/selftests/x86/ioperm.c -- 2.9.3
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| From | Andy Lutomirski <luto@amacapital.net> |
|---|---|
| Date | 2017-02-22 16:20 +0100 |
| Message-ID | <tdGRY-3AG-17@gated-at.bofh.it> |
| In reply to | #1585664 |
On Wed, Feb 22, 2017 at 7:13 AM, Paolo Bonzini <pbonzini@redhat.com> wrote: > On 21/02/2017 20:14, Andy Lutomirski wrote: >> The first four patches here are intended to be straightforward >> cleanups and to make a better base for Thomas' GDT series. They may >> be a slight speedup, too, because they remove an STR instruction >> from the VMX entry path. >> >> The last two patches are a reasonably large speedup but need careful >> review. >> >> FWIW, I can see lots of additional easy-ish speedups here. For example: >> >> - The GDT reload on VM exit isn't really needed at all. Instead let's >> just change the kernel limit to 0xFFFF. Doing that naively would >> waste memory, but doing it carefully on top of Thomas' series would >> be straightforward and almost free. >> >> - RDMSR from MSR_GS_BASE is totally pointless. >> >> - Once I or someone finishes the FSGSBASE series, we get a big speedup >> there. >> >> - The LDT reload code should be split up and optimized better, I think. >> >> Changes from v1: >> - Fix some changelog typos. >> - Fix the bug that Paolo found. >> - Rename the helpers to make their usage more obvious. >> - Move clearing __tss_limit_invalid into force_reload_TR() as a tiny >> optimization. >> - Add a test case. It doesn't test all the machinations, but at least >> it checks basic functionality. >> >> Andy Lutomirski (7): >> x86/asm: Define the kernel TSS limit in a macro >> x86/kvm/vmx: Don't fetch the TSS base from the GDT >> x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels >> x86/kvm/vmx: Simplify segment_base() >> x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss >> x86/kvm/vmx: Defer TR reload after VM exit >> selftests/x86: Add a basic selftest for ioperm >> >> arch/x86/include/asm/desc.h | 62 +++++++++++-- >> arch/x86/include/asm/processor.h | 12 ++- >> arch/x86/kernel/ioport.c | 11 +++ >> arch/x86/kernel/process.c | 10 ++ >> arch/x86/kvm/vmx.c | 63 ++++++------- >> tools/testing/selftests/x86/Makefile | 2 +- >> tools/testing/selftests/x86/ioperm.c | 171 +++++++++++++++++++++++++++++++++++ >> 7 files changed, 284 insertions(+), 47 deletions(-) >> create mode 100644 tools/testing/selftests/x86/ioperm.c >> > > I pushed and tagged before seeing this v2. :( The differences seem to > be x86-only, so I suppose Ingo can handle them if you resubmit. > I renamed the helpers to make it less likely that someone would repeat my little buglet. I can submit a patch that just has the differences, but I think it should go in through your tree. Would that work? --Andy -- Andy Lutomirski AMA Capital Management, LLC
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| From | Andy Lutomirski <luto@amacapital.net> |
|---|---|
| Date | 2017-02-22 16:40 +0100 |
| Message-ID | <tdHbk-3Iw-31@gated-at.bofh.it> |
| In reply to | #1586246 |
On Wed, Feb 22, 2017 at 7:25 AM, Paolo Bonzini <pbonzini@redhat.com> wrote: > > > On 22/02/2017 16:17, Andy Lutomirski wrote: >>> I pushed and tagged before seeing this v2. :( The differences seem to >>> be x86-only, so I suppose Ingo can handle them if you resubmit. >>> >> I renamed the helpers to make it less likely that someone would repeat >> my little buglet. I can submit a patch that just has the differences, >> but I think it should go in through your tree. Would that work? > > That's fine for me as long as it is for Ingo. :) > Sent.
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| From | Paolo Bonzini <pbonzini@redhat.com> |
|---|---|
| Date | 2017-02-22 17:00 +0100 |
| Message-ID | <tdHbk-3Iw-33@gated-at.bofh.it> |
| In reply to | #1586246 |
On 22/02/2017 16:17, Andy Lutomirski wrote: >> I pushed and tagged before seeing this v2. :( The differences seem to >> be x86-only, so I suppose Ingo can handle them if you resubmit. >> > I renamed the helpers to make it less likely that someone would repeat > my little buglet. I can submit a patch that just has the differences, > but I think it should go in through your tree. Would that work? That's fine for me as long as it is for Ingo. :) Paolo
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| From | Paolo Bonzini <pbonzini@redhat.com> |
|---|---|
| Date | 2017-02-22 16:20 +0100 |
| Message-ID | <tdGRY-3AG-19@gated-at.bofh.it> |
| In reply to | #1585664 |
On 21/02/2017 20:14, Andy Lutomirski wrote: > The first four patches here are intended to be straightforward > cleanups and to make a better base for Thomas' GDT series. They may > be a slight speedup, too, because they remove an STR instruction > from the VMX entry path. > > The last two patches are a reasonably large speedup but need careful > review. > > FWIW, I can see lots of additional easy-ish speedups here. For example: > > - The GDT reload on VM exit isn't really needed at all. Instead let's > just change the kernel limit to 0xFFFF. Doing that naively would > waste memory, but doing it carefully on top of Thomas' series would > be straightforward and almost free. > > - RDMSR from MSR_GS_BASE is totally pointless. > > - Once I or someone finishes the FSGSBASE series, we get a big speedup > there. > > - The LDT reload code should be split up and optimized better, I think. > > Changes from v1: > - Fix some changelog typos. > - Fix the bug that Paolo found. > - Rename the helpers to make their usage more obvious. > - Move clearing __tss_limit_invalid into force_reload_TR() as a tiny > optimization. > - Add a test case. It doesn't test all the machinations, but at least > it checks basic functionality. > > Andy Lutomirski (7): > x86/asm: Define the kernel TSS limit in a macro > x86/kvm/vmx: Don't fetch the TSS base from the GDT > x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels > x86/kvm/vmx: Simplify segment_base() > x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss > x86/kvm/vmx: Defer TR reload after VM exit > selftests/x86: Add a basic selftest for ioperm > > arch/x86/include/asm/desc.h | 62 +++++++++++-- > arch/x86/include/asm/processor.h | 12 ++- > arch/x86/kernel/ioport.c | 11 +++ > arch/x86/kernel/process.c | 10 ++ > arch/x86/kvm/vmx.c | 63 ++++++------- > tools/testing/selftests/x86/Makefile | 2 +- > tools/testing/selftests/x86/ioperm.c | 171 +++++++++++++++++++++++++++++++++++ > 7 files changed, 284 insertions(+), 47 deletions(-) > create mode 100644 tools/testing/selftests/x86/ioperm.c > I pushed and tagged before seeing this v2. :( The differences seem to be x86-only, so I suppose Ingo can handle them if you resubmit. Paolo
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