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[PATCH 0/5] x86/intel_rdt: Improvements/Fixes to RDT framework

Started byVikas Shivappa <vikas.shivappa@linux.intel.com>
First post2017-02-17 20:50 +0100
Last post2017-02-17 20:50 +0100
Articles 4 — 1 participant

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Contents

  [PATCH 0/5] x86/intel_rdt: Improvements/Fixes to RDT framework  Vikas Shivappa <vikas.shivappa@linux.intel.com> - 2017-02-17 20:50 +0100
    [PATCH 1/5] x86/intel_rdt: Update control registers only when user really modifies it Vikas Shivappa <vikas.shivappa@linux.intel.com> - 2017-02-17 20:50 +0100
    [PATCH 5/5] x86/intel_rdt: hotcpu updates for RDT Vikas Shivappa <vikas.shivappa@linux.intel.com> - 2017-02-17 20:50 +0100
    [PATCH 3/5] x86/intel_rdt: Fail early on a resource with incorrect domains Vikas Shivappa <vikas.shivappa@linux.intel.com> - 2017-02-17 20:50 +0100

#1583673 — [PATCH 0/5] x86/intel_rdt: Improvements/Fixes to RDT framework

FromVikas Shivappa <vikas.shivappa@linux.intel.com>
Date2017-02-17 20:50 +0100
Subject[PATCH 0/5] x86/intel_rdt: Improvements/Fixes to RDT framework
Message-ID<tbWHv-8v1-5@gated-at.bofh.it>
Add some improvements to the existing RDT(Resource director technology)
framework and fix some hotcpu RDT code.  Sending them as a seperate
series as per Thomas suggestion during the V1 of MBA review (Memory
bandwidth allocation) -
https://marc.info/?l=linux-kernel&m=148407699309286

Patches are based on 4.10-rc8

[PATCH 1/5] x86/intel_rdt: Update control registers only when user
[PATCH 2/5] x86/intel_rdt: Improvements to parsing schemata
[PATCH 3/5] x86/intel_rdt: Fail early on a resource with incorrect
[PATCH 4/5] x86/intel_rdt: Reset the cbm MSR during rmdir
[PATCH 5/5] x86/intel_rdt: hotcpu updates for RDT

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#1583676 — [PATCH 1/5] x86/intel_rdt: Update control registers only when user really modifies it

FromVikas Shivappa <vikas.shivappa@linux.intel.com>
Date2017-02-17 20:50 +0100
Subject[PATCH 1/5] x86/intel_rdt: Update control registers only when user really modifies it
Message-ID<tbWHw-8v1-11@gated-at.bofh.it>
In reply to#1583673
When a schemata is updated, the values for all the domains and all
resources are entered.  However, the values for each of them may not
change in many use cases as the user is only updating values for a
subset of resources and domains. The resource control values are updated
via QOS_MSRs which are per package. Change the update to QOS_MSRs to
happen only when the control value on the particular domain is updated.
Hence not sending IPIs on all domains when user updates the control
vals.

Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
---
 arch/x86/kernel/cpu/intel_rdt_schemata.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_rdt_schemata.c b/arch/x86/kernel/cpu/intel_rdt_schemata.c
index f369cb8..14ba504 100644
--- a/arch/x86/kernel/cpu/intel_rdt_schemata.c
+++ b/arch/x86/kernel/cpu/intel_rdt_schemata.c
@@ -114,9 +114,16 @@ static int update_domains(struct rdt_resource *r, int closid)
 	msr_param.high = msr_param.low + 1;
 	msr_param.res = r;
 
+	/*
+	 * Only update the domains that user has changed.
+	 * There by avoiding unnecessary IPIs.
+	 */
 	list_for_each_entry(d, &r->domains, list) {
-		cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask);
-		d->cbm[msr_param.low] = r->tmp_cbms[idx++];
+		if (d->cbm[msr_param.low] != r->tmp_cbms[idx]) {
+			cpumask_set_cpu(cpumask_any(&d->cpu_mask), cpu_mask);
+			d->cbm[msr_param.low] = r->tmp_cbms[idx];
+		}
+		idx++;
 	}
 	cpu = get_cpu();
 	/* Update CBM on this cpu if it's in cpu_mask. */
-- 
1.9.1

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#1583679 — [PATCH 5/5] x86/intel_rdt: hotcpu updates for RDT

FromVikas Shivappa <vikas.shivappa@linux.intel.com>
Date2017-02-17 20:50 +0100
Subject[PATCH 5/5] x86/intel_rdt: hotcpu updates for RDT
Message-ID<tbWHw-8v1-19@gated-at.bofh.it>
In reply to#1583673
For closid and rmid, change both the per cpu cache and PQR_MSR to be
cleared only when offlining cpu at the respective handlers.  The other
places to clear them may not be required and is removed.  This can be
done at offlining so that the cache occupancy is not counted soon after
the cpu goes down, rather than waiting to clear it during online cpu.

Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
---
 arch/x86/events/intel/cqm.c     | 10 +++++-----
 arch/x86/kernel/cpu/intel_rdt.c |  1 -
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/x86/events/intel/cqm.c b/arch/x86/events/intel/cqm.c
index 8c00dc0..681e32f 100644
--- a/arch/x86/events/intel/cqm.c
+++ b/arch/x86/events/intel/cqm.c
@@ -1569,13 +1569,8 @@ static inline void cqm_pick_event_reader(int cpu)
 
 static int intel_cqm_cpu_starting(unsigned int cpu)
 {
-	struct intel_pqr_state *state = &per_cpu(pqr_state, cpu);
 	struct cpuinfo_x86 *c = &cpu_data(cpu);
 
-	state->rmid = 0;
-	state->closid = 0;
-	state->rmid_usecnt = 0;
-
 	WARN_ON(c->x86_cache_max_rmid != cqm_max_rmid);
 	WARN_ON(c->x86_cache_occ_scale != cqm_l3_scale);
 
@@ -1585,12 +1580,17 @@ static int intel_cqm_cpu_starting(unsigned int cpu)
 
 static int intel_cqm_cpu_exit(unsigned int cpu)
 {
+	struct intel_pqr_state *state = &per_cpu(pqr_state, cpu);
 	int target;
 
 	/* Is @cpu the current cqm reader for this package ? */
 	if (!cpumask_test_and_clear_cpu(cpu, &cqm_cpumask))
 		return 0;
 
+	state->rmid = 0;
+	state->rmid_usecnt = 0;
+	wrmsr(MSR_IA32_PQR_ASSOC, 0, state->closid);
+
 	/* Find another online reader in this package */
 	target = cpumask_any_but(topology_core_cpumask(cpu), cpu);
 
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
index 5a533fe..c8af5d9 100644
--- a/arch/x86/kernel/cpu/intel_rdt.c
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -350,7 +350,6 @@ static int intel_rdt_online_cpu(unsigned int cpu)
 		domain_add_cpu(cpu, r);
 	/* The cpu is set in default rdtgroup after online. */
 	cpumask_set_cpu(cpu, &rdtgroup_default.cpu_mask);
-	clear_closid(cpu);
 	mutex_unlock(&rdtgroup_mutex);
 
 	return 0;
-- 
1.9.1

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#1583682 — [PATCH 3/5] x86/intel_rdt: Fail early on a resource with incorrect domains

FromVikas Shivappa <vikas.shivappa@linux.intel.com>
Date2017-02-17 20:50 +0100
Subject[PATCH 3/5] x86/intel_rdt: Fail early on a resource with incorrect domains
Message-ID<tbWHx-8v1-33@gated-at.bofh.it>
In reply to#1583673
When a schemata file is changed, user enters control values for all
domains and all resources in the below format (Consider L3 and L2
resources):

L3:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
L2:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...

Return error as soon as we detect a resource not entering all domain
values in schemata rather than waiting till we parse all resources
because the entire change is atomic. Also this avoids looping all
enabled resources again.

Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
---
 arch/x86/kernel/cpu/intel_rdt_schemata.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_rdt_schemata.c b/arch/x86/kernel/cpu/intel_rdt_schemata.c
index 64b43b1..527d042 100644
--- a/arch/x86/kernel/cpu/intel_rdt_schemata.c
+++ b/arch/x86/kernel/cpu/intel_rdt_schemata.c
@@ -94,6 +94,10 @@ static int parse_line(char *line, struct rdt_resource *r)
 			return -EINVAL;
 	}
 
+	/* Incorrect number of domains in the line */
+	if (r->num_tmp_cbms != r->num_domains)
+		return -EINVAL;
+
 	/* Any garbage at the end of the line? */
 	if (line && line[0])
 		return -EINVAL;
@@ -212,14 +216,6 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_file *of,
 		}
 	}
 
-	/* Did the parser find all the masks we need? */
-	for_each_enabled_rdt_resource(r) {
-		if (r->num_tmp_cbms != r->num_domains) {
-			ret = -EINVAL;
-			goto out;
-		}
-	}
-
 	for_each_enabled_rdt_resource(r) {
 		ret = update_domains(r, closid);
 		if (ret)
-- 
1.9.1

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