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Groups > linux.kernel > #1678626 > unrolled thread
| Started by | Alvaro Gamez Machado <alvaro.gamez@hazent.com> |
|---|---|
| First post | 2017-06-30 11:30 +0200 |
| Last post | 2017-07-02 12:30 +0200 |
| Articles | 3 — 2 participants |
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[PATCH] net: axienet: add of_phy_connect call for XAE_PHY_TYPE_MII case Alvaro Gamez Machado <alvaro.gamez@hazent.com> - 2017-06-30 11:30 +0200
Re: [PATCH] net: axienet: add of_phy_connect call for XAE_PHY_TYPE_MII case Florian Fainelli <f.fainelli@gmail.com> - 2017-06-30 19:40 +0200
Re: [PATCH] net: axienet: add of_phy_connect call for XAE_PHY_TYPE_MII case Alvaro Gamez Machado <alvaro.gamez@hazent.com> - 2017-07-02 12:30 +0200
| From | Alvaro Gamez Machado <alvaro.gamez@hazent.com> |
|---|---|
| Date | 2017-06-30 11:30 +0200 |
| Subject | [PATCH] net: axienet: add of_phy_connect call for XAE_PHY_TYPE_MII case |
| Message-ID | <tY0ps-3C8-3@gated-at.bofh.it> |
This IP core has support for mii connectivity to the phy, so be ready to
connect to it when this is the case.
Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 33c595f4691d..9b3f55449b5e 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -935,7 +935,11 @@ static int axienet_open(struct net_device *ndev)
return ret;
if (lp->phy_node) {
- if (lp->phy_type == XAE_PHY_TYPE_GMII) {
+ if (lp->phy_type == XAE_PHY_TYPE_MII) {
+ phydev = of_phy_connect(lp->ndev, lp->phy_node,
+ axienet_adjust_link, 0,
+ PHY_INTERFACE_MODE_MII);
+ } else if (lp->phy_type == XAE_PHY_TYPE_GMII) {
phydev = of_phy_connect(lp->ndev, lp->phy_node,
axienet_adjust_link, 0,
PHY_INTERFACE_MODE_GMII);
--
2.11.0
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2017-06-30 19:40 +0200 |
| Subject | Re: [PATCH] net: axienet: add of_phy_connect call for XAE_PHY_TYPE_MII case |
| Message-ID | <tY83E-8nx-17@gated-at.bofh.it> |
| In reply to | #1678626 |
On 06/30/2017 02:25 AM, Alvaro Gamez Machado wrote:
> This IP core has support for mii connectivity to the phy, so be ready to
> connect to it when this is the case.
>
> Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com>
> ---
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 33c595f4691d..9b3f55449b5e 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -935,7 +935,11 @@ static int axienet_open(struct net_device *ndev)
> return ret;
>
> if (lp->phy_node) {
> - if (lp->phy_type == XAE_PHY_TYPE_GMII) {
> + if (lp->phy_type == XAE_PHY_TYPE_MII) {
> + phydev = of_phy_connect(lp->ndev, lp->phy_node,
> + axienet_adjust_link, 0,
> + PHY_INTERFACE_MODE_MII);
> + } else if (lp->phy_type == XAE_PHY_TYPE_GMII) {
> phydev = of_phy_connect(lp->ndev, lp->phy_node,
> axienet_adjust_link, 0,
> PHY_INTERFACE_MODE_GMII);
Seems like this could be simplified even further if the values of
lp->phy_type directly mapped to those of phy_interface_t.
--
Florian
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| From | Alvaro Gamez Machado <alvaro.gamez@hazent.com> |
|---|---|
| Date | 2017-07-02 12:30 +0200 |
| Subject | Re: [PATCH] net: axienet: add of_phy_connect call for XAE_PHY_TYPE_MII case |
| Message-ID | <tYKiC-su-25@gated-at.bofh.it> |
| In reply to | #1679024 |
On Fri, Jun 30, 2017 at 10:30:38AM -0700, Florian Fainelli wrote:
> On 06/30/2017 02:25 AM, Alvaro Gamez Machado wrote:
> > if (lp->phy_node) {
> > - if (lp->phy_type == XAE_PHY_TYPE_GMII) {
> > + if (lp->phy_type == XAE_PHY_TYPE_MII) {
> > + phydev = of_phy_connect(lp->ndev, lp->phy_node,
> > + axienet_adjust_link, 0,
> > + PHY_INTERFACE_MODE_MII);
> > + } else if (lp->phy_type == XAE_PHY_TYPE_GMII) {
> > phydev = of_phy_connect(lp->ndev, lp->phy_node,
> > axienet_adjust_link, 0,
> > PHY_INTERFACE_MODE_GMII);
>
> Seems like this could be simplified even further if the values of
> lp->phy_type directly mapped to those of phy_interface_t.
Sadly, that's not the case. PHY_INTERFACE_MODE_* belong to a enum of twenty
different values, of which only _MII and _GMII overlap with XAW_PHY_*
values, but XAE_PHY_TYPE_RGMII_2_0 doesn't match
PHY_INTERFACE_MODE_RGMII_ID.
Regards
--
Alvaro G. M.
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