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Groups > linux.kernel > #1676516 > unrolled thread
| Started by | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
|---|---|
| First post | 2017-06-28 12:20 +0200 |
| Last post | 2017-06-28 12:20 +0200 |
| Articles | 3 — 1 participant |
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[PATCH v2 0/2] add thermal nodes for UniPhier SoCs Kunihiko Hayashi <hayashi.kunihiko@socionext.com> - 2017-06-28 12:20 +0200
[PATCH v2 1/2] ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> - 2017-06-28 12:20 +0200
[PATCH v2 2/2] arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> - 2017-06-28 12:20 +0200
| From | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
|---|---|
| Date | 2017-06-28 12:20 +0200 |
| Subject | [PATCH v2 0/2] add thermal nodes for UniPhier SoCs |
| Message-ID | <tXieJ-5vN-15@gated-at.bofh.it> |
This series adds thermal nodes for UniPhier PXs2 and LD20 SoCs.
Changes in v1:
- separate from driver's patchset[1]
- add cooling-maps nodes on the device tree
- fix an interrupt trigger to set 'level-triggered' according to
hardware specification
- bring up threshold temperature for LD20 according to the spec sheet
- add cpuN labels for reference in cooling-device property on PXs2 dts
[1] https://lkml.org/lkml/2017/6/28/170
Kunihiko Hayashi (2):
ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for
PXs2
arm64: dts: uniphier: add nodes of thermal monitor and thermal zone
for LD20
arch/arm/boot/dts/uniphier-pxs2.dtsi | 43 +++++++++++++++++++++---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 40 ++++++++++++++++++++++
2 files changed, 79 insertions(+), 4 deletions(-)
--
2.7.4
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| From | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
|---|---|
| Date | 2017-06-28 12:20 +0200 |
| Subject | [PATCH v2 1/2] ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2 |
| Message-ID | <tXieJ-5vN-13@gated-at.bofh.it> |
| In reply to | #1676516 |
Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor is included in sysctrl.
Furthermore, add cpuN labels for reference in cooling-device property.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm/boot/dts/uniphier-pxs2.dtsi | 43 ++++++++++++++++++++++++++++++++----
1 file changed, 39 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index e9e031d..1ff5531 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -52,7 +52,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
@@ -60,9 +60,10 @@
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu_opp>;
+ #cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@@ -72,7 +73,7 @@
operating-points-v2 = <&cpu_opp>;
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <2>;
@@ -82,7 +83,7 @@
operating-points-v2 = <&cpu_opp>;
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <3>;
@@ -150,6 +151,34 @@
};
};
+ thermal-zones {
+ cpu_thermal {
+ polling-delay-passive = <250>; /* 250ms */
+ polling-delay = <1000>; /* 1000ms */
+ thermal-sensors = <&pvtctl>;
+
+ trips {
+ cpu_crit: cpu_crit {
+ temperature = <95000>; /* 95C */
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ cpu_alert: cpu_alert {
+ temperature = <85000>; /* 85C */
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu0 (-1) (-1)>;
+ };
+ };
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -387,6 +416,12 @@
compatible = "socionext,uniphier-pxs2-reset";
#reset-cells = <1>;
};
+
+ pvtctl: pvtctl {
+ compatible = "socionext,uniphier-pxs2-thermal";
+ interrupts = <0 3 4>;
+ #thermal-sensor-cells = <0>;
+ };
};
};
};
--
2.7.4
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| From | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
|---|---|
| Date | 2017-06-28 12:20 +0200 |
| Subject | [PATCH v2 2/2] arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20 |
| Message-ID | <tXieK-5vN-21@gated-at.bofh.it> |
| In reply to | #1676516 |
Add nodes of thermal monitor and thermal zone for UniPhier LD20 SoC.
The thermal monitor is included in sysctrl.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 40 ++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index a6b3a70..22d04111 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -82,6 +82,7 @@
clocks = <&sys_clk 32>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -100,6 +101,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster1_opp>;
+ #cooling-cells = <2>;
};
cpu3: cpu@101 {
@@ -209,6 +211,38 @@
<1 10 4>;
};
+ thermal-zones {
+ cpu_thermal {
+ polling-delay-passive = <250>; /* 250ms */
+ polling-delay = <1000>; /* 1000ms */
+ thermal-sensors = <&pvtctl>;
+
+ trips {
+ cpu_crit: cpu_crit {
+ temperature = <110000>; /* 110C */
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ cpu_alert: cpu_alert {
+ temperature = <100000>; /* 100C */
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu0 (-1) (-1)>;
+ };
+ map1 {
+ trip = <&cpu_alert>;
+ cooling-device = <&cpu2 (-1) (-1)>;
+ };
+ };
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -417,6 +451,12 @@
compatible = "socionext,uniphier-ld20-reset";
#reset-cells = <1>;
};
+
+ pvtctl: pvtctl {
+ compatible = "socionext,uniphier-ld20-thermal";
+ interrupts = <0 3 4>;
+ #thermal-sensor-cells = <0>;
+ };
};
};
};
--
2.7.4
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