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[PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE

Started byKees Cook <keescook@chromium.org>
First post2017-06-22 20:10 +0200
Last post2017-06-23 17:10 +0200
Articles 5 — 2 participants

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  [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE Kees Cook <keescook@chromium.org> - 2017-06-22 20:10 +0200
    Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2017-06-23 09:00 +0200
      Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE Kees Cook <keescook@chromium.org> - 2017-06-23 16:00 +0200
        Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE Kees Cook <keescook@chromium.org> - 2017-06-23 16:10 +0200
          Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2017-06-23 17:10 +0200

#1672930 — [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE

FromKees Cook <keescook@chromium.org>
Date2017-06-22 20:10 +0200
Subject[PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE
Message-ID<tVeIi-8fG-13@gated-at.bofh.it>
Now that explicitly executed loaders are loaded in the mmap region,
position PIE binaries lower in the address space to avoid possible
collisions with mmap or stack regions. For 64-bit, align to 4GB to
allow runtimes to use the entire 32-bit address space for 32-bit
pointers.

Signed-off-by: Kees Cook <keescook@chromium.org>
---
 arch/arm64/include/asm/elf.h | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index 5d1700425efe..f742af8f7c42 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -113,12 +113,13 @@
 #define ELF_EXEC_PAGESIZE	PAGE_SIZE
 
 /*
- * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
- * use of this is to invoke "./ld.so someprog" to test out a new version of
- * the loader.  We need to make sure that it is out of the way of the program
- * that it will "exec", and that there is sufficient room for the brk.
+ * This is the base location for PIE (ET_DYN with INTERP) loads. On
+ * 64-bit, this is raised to 4GB to leave the entire 32-bit address
+ * space open for things that want to use the area for 32-bit pointers.
  */
-#define ELF_ET_DYN_BASE	(2 * TASK_SIZE_64 / 3)
+#define ELF_ET_DYN_BASE		(test_thread_flag(TIF_32BIT) ?	\
+					0x000400000UL :		\
+					0x100000000UL)
 
 #ifndef __ASSEMBLY__
 
@@ -173,8 +174,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
 
 #ifdef CONFIG_COMPAT
 
-#define COMPAT_ELF_ET_DYN_BASE		(2 * TASK_SIZE_32 / 3)
-
 /* AArch32 registers. */
 #define COMPAT_ELF_NGREG		18
 typedef unsigned int			compat_elf_greg_t;
-- 
2.7.4

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#1673302 — Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE

FromArd Biesheuvel <ard.biesheuvel@linaro.org>
Date2017-06-23 09:00 +0200
SubjectRe: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE
Message-ID<tVqJr-7bI-11@gated-at.bofh.it>
In reply to#1672930
Hi Kees,

On 22 June 2017 at 18:06, Kees Cook <keescook@chromium.org> wrote:
> Now that explicitly executed loaders are loaded in the mmap region,
> position PIE binaries lower in the address space to avoid possible
> collisions with mmap or stack regions. For 64-bit, align to 4GB to
> allow runtimes to use the entire 32-bit address space for 32-bit
> pointers.
>
> Signed-off-by: Kees Cook <keescook@chromium.org>
> ---
>  arch/arm64/include/asm/elf.h | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
> index 5d1700425efe..f742af8f7c42 100644
> --- a/arch/arm64/include/asm/elf.h
> +++ b/arch/arm64/include/asm/elf.h
> @@ -113,12 +113,13 @@
>  #define ELF_EXEC_PAGESIZE      PAGE_SIZE
>
>  /*
> - * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
> - * use of this is to invoke "./ld.so someprog" to test out a new version of
> - * the loader.  We need to make sure that it is out of the way of the program
> - * that it will "exec", and that there is sufficient room for the brk.
> + * This is the base location for PIE (ET_DYN with INTERP) loads. On
> + * 64-bit, this is raised to 4GB to leave the entire 32-bit address
> + * space open for things that want to use the area for 32-bit pointers.
>   */
> -#define ELF_ET_DYN_BASE        (2 * TASK_SIZE_64 / 3)
> +#define ELF_ET_DYN_BASE                (test_thread_flag(TIF_32BIT) ?  \
> +                                       0x000400000UL :         \
> +                                       0x100000000UL)
>

Why are you merging this with the COMPAT definition?

>  #ifndef __ASSEMBLY__
>
> @@ -173,8 +174,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
>
>  #ifdef CONFIG_COMPAT
>
> -#define COMPAT_ELF_ET_DYN_BASE         (2 * TASK_SIZE_32 / 3)
> -
>  /* AArch32 registers. */
>  #define COMPAT_ELF_NGREG               18
>  typedef unsigned int                   compat_elf_greg_t;
> --
> 2.7.4
>

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#1673574 — Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE

FromKees Cook <keescook@chromium.org>
Date2017-06-23 16:00 +0200
SubjectRe: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE
Message-ID<tVxhU-2U3-23@gated-at.bofh.it>
In reply to#1673302
On Thu, Jun 22, 2017 at 11:57 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> Hi Kees,
>
> On 22 June 2017 at 18:06, Kees Cook <keescook@chromium.org> wrote:
>> Now that explicitly executed loaders are loaded in the mmap region,
>> position PIE binaries lower in the address space to avoid possible
>> collisions with mmap or stack regions. For 64-bit, align to 4GB to
>> allow runtimes to use the entire 32-bit address space for 32-bit
>> pointers.
>>
>> Signed-off-by: Kees Cook <keescook@chromium.org>
>> ---
>>  arch/arm64/include/asm/elf.h | 13 ++++++-------
>>  1 file changed, 6 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
>> index 5d1700425efe..f742af8f7c42 100644
>> --- a/arch/arm64/include/asm/elf.h
>> +++ b/arch/arm64/include/asm/elf.h
>> @@ -113,12 +113,13 @@
>>  #define ELF_EXEC_PAGESIZE      PAGE_SIZE
>>
>>  /*
>> - * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
>> - * use of this is to invoke "./ld.so someprog" to test out a new version of
>> - * the loader.  We need to make sure that it is out of the way of the program
>> - * that it will "exec", and that there is sufficient room for the brk.
>> + * This is the base location for PIE (ET_DYN with INTERP) loads. On
>> + * 64-bit, this is raised to 4GB to leave the entire 32-bit address
>> + * space open for things that want to use the area for 32-bit pointers.
>>   */
>> -#define ELF_ET_DYN_BASE        (2 * TASK_SIZE_64 / 3)
>> +#define ELF_ET_DYN_BASE                (test_thread_flag(TIF_32BIT) ?  \
>> +                                       0x000400000UL :         \
>> +                                       0x100000000UL)
>>
>
> Why are you merging this with the COMPAT definition?

It seemed like the right thing to do since a single definition could
handle both cases. Is there something I'm overlooking in the arm64
case?

-Kees

>
>>  #ifndef __ASSEMBLY__
>>
>> @@ -173,8 +174,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
>>
>>  #ifdef CONFIG_COMPAT
>>
>> -#define COMPAT_ELF_ET_DYN_BASE         (2 * TASK_SIZE_32 / 3)
>> -
>>  /* AArch32 registers. */
>>  #define COMPAT_ELF_NGREG               18
>>  typedef unsigned int                   compat_elf_greg_t;
>> --
>> 2.7.4
>>



-- 
Kees Cook
Pixel Security

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#1673593 — Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE

FromKees Cook <keescook@chromium.org>
Date2017-06-23 16:10 +0200
SubjectRe: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE
Message-ID<tVxrB-3cr-43@gated-at.bofh.it>
In reply to#1673574
On Fri, Jun 23, 2017 at 6:52 AM, Kees Cook <keescook@chromium.org> wrote:
> On Thu, Jun 22, 2017 at 11:57 PM, Ard Biesheuvel
> <ard.biesheuvel@linaro.org> wrote:
>> Hi Kees,
>>
>> On 22 June 2017 at 18:06, Kees Cook <keescook@chromium.org> wrote:
>>> Now that explicitly executed loaders are loaded in the mmap region,
>>> position PIE binaries lower in the address space to avoid possible
>>> collisions with mmap or stack regions. For 64-bit, align to 4GB to
>>> allow runtimes to use the entire 32-bit address space for 32-bit
>>> pointers.
>>>
>>> Signed-off-by: Kees Cook <keescook@chromium.org>
>>> ---
>>>  arch/arm64/include/asm/elf.h | 13 ++++++-------
>>>  1 file changed, 6 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
>>> index 5d1700425efe..f742af8f7c42 100644
>>> --- a/arch/arm64/include/asm/elf.h
>>> +++ b/arch/arm64/include/asm/elf.h
>>> @@ -113,12 +113,13 @@
>>>  #define ELF_EXEC_PAGESIZE      PAGE_SIZE
>>>
>>>  /*
>>> - * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
>>> - * use of this is to invoke "./ld.so someprog" to test out a new version of
>>> - * the loader.  We need to make sure that it is out of the way of the program
>>> - * that it will "exec", and that there is sufficient room for the brk.
>>> + * This is the base location for PIE (ET_DYN with INTERP) loads. On
>>> + * 64-bit, this is raised to 4GB to leave the entire 32-bit address
>>> + * space open for things that want to use the area for 32-bit pointers.
>>>   */
>>> -#define ELF_ET_DYN_BASE        (2 * TASK_SIZE_64 / 3)
>>> +#define ELF_ET_DYN_BASE                (test_thread_flag(TIF_32BIT) ?  \
>>> +                                       0x000400000UL :         \
>>> +                                       0x100000000UL)
>>>
>>
>> Why are you merging this with the COMPAT definition?
>
> It seemed like the right thing to do since a single definition could
> handle both cases. Is there something I'm overlooking in the arm64
> case?

And like 5 minutes later there was a loud head-slapping noise in my
office. Durr, yeah, arm64 doesn't have to deal with a "native 32-bit"
mode, so the merge isn't needed. Yes yes, I will split it back up and
drop the thread flag test.

Thanks!

-Kees

>>>  #ifndef __ASSEMBLY__
>>>
>>> @@ -173,8 +174,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
>>>
>>>  #ifdef CONFIG_COMPAT
>>>
>>> -#define COMPAT_ELF_ET_DYN_BASE         (2 * TASK_SIZE_32 / 3)
>>> -
>>>  /* AArch32 registers. */
>>>  #define COMPAT_ELF_NGREG               18
>>>  typedef unsigned int                   compat_elf_greg_t;
>>> --
>>> 2.7.4
>>>
>
>
>
> --
> Kees Cook
> Pixel Security



-- 
Kees Cook
Pixel Security

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#1673624 — Re: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE

FromArd Biesheuvel <ard.biesheuvel@linaro.org>
Date2017-06-23 17:10 +0200
SubjectRe: [kernel-hardening] [PATCH 2/4] arm64: Reduce ELF_ET_DYN_BASE
Message-ID<tVynE-3Lp-13@gated-at.bofh.it>
In reply to#1673593
On 23 June 2017 at 14:02, Kees Cook <keescook@chromium.org> wrote:
> On Fri, Jun 23, 2017 at 6:52 AM, Kees Cook <keescook@chromium.org> wrote:
>> On Thu, Jun 22, 2017 at 11:57 PM, Ard Biesheuvel
>> <ard.biesheuvel@linaro.org> wrote:
>>> Hi Kees,
>>>
>>> On 22 June 2017 at 18:06, Kees Cook <keescook@chromium.org> wrote:
>>>> Now that explicitly executed loaders are loaded in the mmap region,
>>>> position PIE binaries lower in the address space to avoid possible
>>>> collisions with mmap or stack regions. For 64-bit, align to 4GB to
>>>> allow runtimes to use the entire 32-bit address space for 32-bit
>>>> pointers.
>>>>
>>>> Signed-off-by: Kees Cook <keescook@chromium.org>
>>>> ---
>>>>  arch/arm64/include/asm/elf.h | 13 ++++++-------
>>>>  1 file changed, 6 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
>>>> index 5d1700425efe..f742af8f7c42 100644
>>>> --- a/arch/arm64/include/asm/elf.h
>>>> +++ b/arch/arm64/include/asm/elf.h
>>>> @@ -113,12 +113,13 @@
>>>>  #define ELF_EXEC_PAGESIZE      PAGE_SIZE
>>>>
>>>>  /*
>>>> - * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
>>>> - * use of this is to invoke "./ld.so someprog" to test out a new version of
>>>> - * the loader.  We need to make sure that it is out of the way of the program
>>>> - * that it will "exec", and that there is sufficient room for the brk.
>>>> + * This is the base location for PIE (ET_DYN with INTERP) loads. On
>>>> + * 64-bit, this is raised to 4GB to leave the entire 32-bit address
>>>> + * space open for things that want to use the area for 32-bit pointers.
>>>>   */
>>>> -#define ELF_ET_DYN_BASE        (2 * TASK_SIZE_64 / 3)
>>>> +#define ELF_ET_DYN_BASE                (test_thread_flag(TIF_32BIT) ?  \
>>>> +                                       0x000400000UL :         \
>>>> +                                       0x100000000UL)
>>>>
>>>
>>> Why are you merging this with the COMPAT definition?
>>
>> It seemed like the right thing to do since a single definition could
>> handle both cases. Is there something I'm overlooking in the arm64
>> case?
>
> And like 5 minutes later there was a loud head-slapping noise in my
> office. Durr, yeah, arm64 doesn't have to deal with a "native 32-bit"
> mode, so the merge isn't needed. Yes yes, I will split it back up and
> drop the thread flag test.
>

Oh, is that what I heard?

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