Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1672518 > unrolled thread

[RESEND PATCH v2 0/7] add some device nodes support for rk322x SoC

Started byFrank Wang <frank.wang@rock-chips.com>
First post2017-06-22 12:40 +0200
Last post2017-06-22 12:40 +0200
Articles 6 — 2 participants

Back to article view | Back to linux.kernel

Contents

  [RESEND PATCH v2 0/7] add some device nodes support for rk322x SoC Frank Wang <frank.wang@rock-chips.com> - 2017-06-22 12:40 +0200
    [RESEND PATCH v2 4/7] ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC Frank Wang <frank.wang@rock-chips.com> - 2017-06-22 12:40 +0200
    [RESEND PATCH v2 3/7] Documentation: rockchip-dw-mshc: add description for rk3228 Frank Wang <frank.wang@rock-chips.com> - 2017-06-22 12:40 +0200
      Re: [RESEND PATCH v2 3/7] Documentation: rockchip-dw-mshc: add  description for rk3228 Rob Herring <robh@kernel.org> - 2017-06-26 20:50 +0200
    [RESEND PATCH v2 5/7] ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC Frank Wang <frank.wang@rock-chips.com> - 2017-06-22 12:40 +0200
    [RESEND PATCH v2 1/7] ARM: dts: rockchip: add cpu enable method for rk3228 SoC Frank Wang <frank.wang@rock-chips.com> - 2017-06-22 12:40 +0200

#1672518 — [RESEND PATCH v2 0/7] add some device nodes support for rk322x SoC

FromFrank Wang <frank.wang@rock-chips.com>
Date2017-06-22 12:40 +0200
Subject[RESEND PATCH v2 0/7] add some device nodes support for rk322x SoC
Message-ID<tV7GN-3pi-5@gated-at.bofh.it>
Resend these series for adding compatible changes of efuse in [PATCH v2 7/7].

These series add sdmmc, sdio, and other device nodes support for
rk322x SoCs, and also introduce rk3229 basic dtsi file specifically.

Changes from v1:
- Extracted cpu enable-method from rk3229.dtsi to rk322x.dtsi
- Amended compatible rk322x-efuse to rk3228-efuse in [PATCH v2 7/7].
- Updated the 'Reviewed-by' tag from Heiko Stuebner <heiko@sntech.de> for [PATCH v2 3/7].

The following patch on patchwork are required for this changes.
https://patchwork.kernel.org/patch/9803825/

David Wu (1):
  ARM: dts: rockchip: Add io-domain node for rk3228

Finley Xiao (1):
  ARM: dts: rockchip: add efuse device node for rk3228

Frank Wang (2):
  ARM: dts: rockchip: add cpu enable method for rk3228 SoC
  ARM: dts: rockchip: add basic dtsi file for RK3229 SoC

Shawn Lin (3):
  Documentation: rockchip-dw-mshc: add description for rk3228
  ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC
  ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC

 .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |  1 +
 arch/arm/boot/dts/rk3229-evb.dts                   |  2 +-
 arch/arm/boot/dts/rk3229.dtsi                      | 89 +++++++++++++++++++++
 arch/arm/boot/dts/rk322x.dtsi                      | 93 +++++++++++++++++++++-
 4 files changed, 183 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/boot/dts/rk3229.dtsi

-- 
2.0.0

[toc] | [next] | [standalone]

#1672519 — [RESEND PATCH v2 4/7] ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC

FromFrank Wang <frank.wang@rock-chips.com>
Date2017-06-22 12:40 +0200
Subject[RESEND PATCH v2 4/7] ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC
Message-ID<tV7GN-3pi-17@gated-at.bofh.it>
In reply to#1672518
From: Shawn Lin <shawn.lin@rock-chips.com>

This adds amend compatible content for eMMC of RK3228 SoC.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 34d175e..c4d43ce 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -523,7 +523,7 @@
 	};
 
 	emmc: dwmmc@30020000 {
-		compatible = "rockchip,rk3288-dw-mshc";
+		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x30020000 0x4000>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		clock-frequency = <37500000>;
-- 
2.0.0

[toc] | [prev] | [next] | [standalone]

#1672520 — [RESEND PATCH v2 3/7] Documentation: rockchip-dw-mshc: add description for rk3228

FromFrank Wang <frank.wang@rock-chips.com>
Date2017-06-22 12:40 +0200
Subject[RESEND PATCH v2 3/7] Documentation: rockchip-dw-mshc: add description for rk3228
Message-ID<tV7GO-3pi-23@gated-at.bofh.it>
In reply to#1672518
From: Shawn Lin <shawn.lin@rock-chips.com>

Add "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk322x platform.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
 Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
index 18e33cb..a600833 100644
--- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
@@ -15,6 +15,7 @@ Required Properties:
 	- "rockchip,rk3288-dw-mshc": for Rockchip RK3288
 	- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108
 	- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036
+	- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x
 	- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328
 	- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368
 	- "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399
-- 
2.0.0

[toc] | [prev] | [next] | [standalone]

#1675005 — Re: [RESEND PATCH v2 3/7] Documentation: rockchip-dw-mshc: add description for rk3228

FromRob Herring <robh@kernel.org>
Date2017-06-26 20:50 +0200
SubjectRe: [RESEND PATCH v2 3/7] Documentation: rockchip-dw-mshc: add description for rk3228
Message-ID<tWHfb-5UG-13@gated-at.bofh.it>
In reply to#1672520
On Thu, Jun 22, 2017 at 06:29:58PM +0800, Frank Wang wrote:
> From: Shawn Lin <shawn.lin@rock-chips.com>
> 
> Add "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc" for
> dwmmc on rk322x platform.
> 
> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

[toc] | [prev] | [next] | [standalone]

#1672521 — [RESEND PATCH v2 5/7] ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC

FromFrank Wang <frank.wang@rock-chips.com>
Date2017-06-22 12:40 +0200
Subject[RESEND PATCH v2 5/7] ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC
Message-ID<tV7GO-3pi-29@gated-at.bofh.it>
In reply to#1672518
From: Shawn Lin <shawn.lin@rock-chips.com>

This patch adds sdmmc/sdio controller nodes for rk3228 SoC.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 60 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index c4d43ce..66578fa 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -522,6 +522,32 @@
 		status = "disabled";
 	};
 
+	sdmmc: dwmmc@30000000 {
+		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x30000000 0x4000>;
+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		fifo-depth = <0x100>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+		status = "disabled";
+	};
+
+	sdio: dwmmc@30010000 {
+		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x30010000 0x4000>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		fifo-depth = <0x100>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+		status = "disabled";
+	};
+
 	emmc: dwmmc@30020000 {
 		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x30020000 0x4000>;
@@ -732,6 +758,40 @@
 			drive-strength = <12>;
 		};
 
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
+				rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+			};
+
+			sdmmc_cmd: sdmmc-cmd {
+				rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+			};
+
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+						<1 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+						<1 20 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+						<1 21 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+			};
+		};
+
+		sdio {
+			sdio_clk: sdio-clk {
+				rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+			};
+
+			sdio_cmd: sdio-cmd {
+				rockchip,pins = <3 1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+			};
+
+			sdio_bus4: sdio-bus4 {
+				rockchip,pins = <3 2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+						<3 3 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+						<3 4 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+						<3 5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>;
+			};
+		};
+
 		emmc {
 			emmc_clk: emmc-clk {
 				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
-- 
2.0.0

[toc] | [prev] | [next] | [standalone]

#1672524 — [RESEND PATCH v2 1/7] ARM: dts: rockchip: add cpu enable method for rk3228 SoC

FromFrank Wang <frank.wang@rock-chips.com>
Date2017-06-22 12:40 +0200
Subject[RESEND PATCH v2 1/7] ARM: dts: rockchip: add cpu enable method for rk3228 SoC
Message-ID<tV7GO-3pi-37@gated-at.bofh.it>
In reply to#1672518
This patch sets PSCI as the default cpu enable-method for RK3228 SoC.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 31e04e9..34d175e 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -70,6 +70,7 @@
 			#cooling-cells = <2>; /* min followed by max */
 			clock-latency = <40000>;
 			clocks = <&cru ARMCLK>;
+			enable-method = "psci";
 		};
 
 		cpu1: cpu@f01 {
@@ -78,6 +79,7 @@
 			reg = <0xf01>;
 			resets = <&cru SRST_CORE1>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			enable-method = "psci";
 		};
 
 		cpu2: cpu@f02 {
@@ -86,6 +88,7 @@
 			reg = <0xf02>;
 			resets = <&cru SRST_CORE2>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			enable-method = "psci";
 		};
 
 		cpu3: cpu@f03 {
@@ -94,6 +97,7 @@
 			reg = <0xf03>;
 			resets = <&cru SRST_CORE3>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			enable-method = "psci";
 		};
 	};
 
@@ -151,6 +155,11 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	psci {
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
+		method = "smc";
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		arm,cpu-registers-not-fw-configured;
-- 
2.0.0

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web