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[PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings

Started byAmelie Delaunay <amelie.delaunay@st.com>
First post2017-06-21 16:40 +0200
Last post2017-06-27 09:40 +0200
Articles 8 — 5 participants

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  [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings Amelie Delaunay <amelie.delaunay@st.com> - 2017-06-21 16:40 +0200
    Applied "spi: Document the STM32 SPI bindings" to the spi tree Mark Brown <broonie@kernel.org> - 2017-06-21 17:20 +0200
      Re: Applied "spi: Document the STM32 SPI bindings" to the spi tree Rob Herring <robh@kernel.org> - 2017-06-26 20:30 +0200
        Re: Applied "spi: Document the STM32 SPI bindings" to the spi tree Mark Brown <broonie@kernel.org> - 2017-06-27 03:20 +0200
    Re: [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings Neil Armstrong <narmstrong@baylibre.com> - 2017-06-21 19:00 +0200
      Re: [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings Amelie DELAUNAY <amelie.delaunay@st.com> - 2017-06-22 14:00 +0200
    Re: [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings Rob Herring <robh@kernel.org> - 2017-06-26 20:30 +0200
      Re: [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings Amelie DELAUNAY <amelie.delaunay@st.com> - 2017-06-27 09:40 +0200

#1671708 — [PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings

FromAmelie Delaunay <amelie.delaunay@st.com>
Date2017-06-21 16:40 +0200
Subject[PATCH 1/2] dt-bindings: spi: Document the STM32 SPI bindings
Message-ID<tUOXv-7i3-5@gated-at.bofh.it>
This patch adds the documentation of device tree bindings
for the STM32 SPI controller.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
---
 .../devicetree/bindings/spi/spi-stm32.txt          | 60 ++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
new file mode 100644
index 0000000..3958bf6
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
@@ -0,0 +1,60 @@
+STMicroelectronics STM32 SPI Controller
+
+The STM32 SPI controller is used to communicate with external devices using
+the Serial Peripheral Interface. It supports full-duplex, half-duplex and
+simplex synchronous serial communication with external devices. It supports
+from 4 to 32-bit data size. Although it can be configured as master or slave,
+only master is supported by the driver.
+
+Required properties:
+- compatible: Must be "st,stm32-spi".
+- reg: Offset and length of the device's register set.
+- interrupts: Must contain the interrupt id.
+- clocks: Must contain an entry for spiclk (which feeds the internal clock
+	  generator).
+- #address-cells:  Number of cells required to define a chip select address.
+- #size-cells: Should be zero.
+
+Optional properties:
+- resets: Must contain the phandle to the reset controller.
+- A pinctrl state named "default" may be defined to set pins in mode of
+  operation for SPI transfer.
+- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
+  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
+- dma-names: DMA request names should include "tx" and "rx" if present.
+- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
+  Documentation/devicetree/bindings/spi/spi-bus.txt
+
+
+Child nodes represent devices on the SPI bus
+  See ../spi/spi-bus.txt
+
+Optional properties:
+- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
+		  nanoseconds inserted between two consecutive data frames.
+
+
+Example:
+	spi2: spi@40003800 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "st,stm32-spi";
+		reg = <0x40003800 0x400>;
+		interrupts = <36>;
+		clocks = <&rcc SPI2_CK>;
+		resets = <&rcc 1166>;
+		dmas = <&dmamux1 0 39 0x400 0x01>,
+		       <&dmamux1 1 40 0x400 0x01>;
+		dma-names = "rx", "tx";
+		pinctrl-0 = <&spi2_pins_b>;
+		pinctrl-names = "default";
+		status = "okay";
+		cs-gpios = <&gpioa 11 0>;
+
+		spidev@0 {
+			compatible = "spidev";
+			reg = <0>;
+			spi-max-frequency = <4000000>;
+			st,spi-midi = <4000>;
+		};
+	};
-- 
1.9.1

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#1671746 — Applied "spi: Document the STM32 SPI bindings" to the spi tree

FromMark Brown <broonie@kernel.org>
Date2017-06-21 17:20 +0200
SubjectApplied "spi: Document the STM32 SPI bindings" to the spi tree
Message-ID<tUPAd-7N4-1@gated-at.bofh.it>
In reply to#1671708
The patch

   spi: Document the STM32 SPI bindings

has been applied to the spi tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From 82a29bf9952acd1be7e76783604686abeb4e5b1d Mon Sep 17 00:00:00 2001
From: Amelie Delaunay <amelie.delaunay@st.com>
Date: Wed, 21 Jun 2017 16:32:05 +0200
Subject: [PATCH] spi: Document the STM32 SPI bindings

This patch adds the documentation of device tree bindings
for the STM32 SPI controller.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 .../devicetree/bindings/spi/spi-stm32.txt          | 60 ++++++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
new file mode 100644
index 000000000000..3958bf6e8b37
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
@@ -0,0 +1,60 @@
+STMicroelectronics STM32 SPI Controller
+
+The STM32 SPI controller is used to communicate with external devices using
+the Serial Peripheral Interface. It supports full-duplex, half-duplex and
+simplex synchronous serial communication with external devices. It supports
+from 4 to 32-bit data size. Although it can be configured as master or slave,
+only master is supported by the driver.
+
+Required properties:
+- compatible: Must be "st,stm32-spi".
+- reg: Offset and length of the device's register set.
+- interrupts: Must contain the interrupt id.
+- clocks: Must contain an entry for spiclk (which feeds the internal clock
+	  generator).
+- #address-cells:  Number of cells required to define a chip select address.
+- #size-cells: Should be zero.
+
+Optional properties:
+- resets: Must contain the phandle to the reset controller.
+- A pinctrl state named "default" may be defined to set pins in mode of
+  operation for SPI transfer.
+- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
+  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
+- dma-names: DMA request names should include "tx" and "rx" if present.
+- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
+  Documentation/devicetree/bindings/spi/spi-bus.txt
+
+
+Child nodes represent devices on the SPI bus
+  See ../spi/spi-bus.txt
+
+Optional properties:
+- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
+		  nanoseconds inserted between two consecutive data frames.
+
+
+Example:
+	spi2: spi@40003800 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "st,stm32-spi";
+		reg = <0x40003800 0x400>;
+		interrupts = <36>;
+		clocks = <&rcc SPI2_CK>;
+		resets = <&rcc 1166>;
+		dmas = <&dmamux1 0 39 0x400 0x01>,
+		       <&dmamux1 1 40 0x400 0x01>;
+		dma-names = "rx", "tx";
+		pinctrl-0 = <&spi2_pins_b>;
+		pinctrl-names = "default";
+		status = "okay";
+		cs-gpios = <&gpioa 11 0>;
+
+		spidev@0 {
+			compatible = "spidev";
+			reg = <0>;
+			spi-max-frequency = <4000000>;
+			st,spi-midi = <4000>;
+		};
+	};
-- 
2.11.0

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#1674993 — Re: Applied "spi: Document the STM32 SPI bindings" to the spi tree

FromRob Herring <robh@kernel.org>
Date2017-06-26 20:30 +0200
SubjectRe: Applied "spi: Document the STM32 SPI bindings" to the spi tree
Message-ID<tWGVQ-5Oa-19@gated-at.bofh.it>
In reply to#1671746
On Wed, Jun 21, 2017 at 04:16:21PM +0100, Mark Brown wrote:
> The patch
> 
>    spi: Document the STM32 SPI bindings
> 
> has been applied to the spi tree at
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 
> 
> All being well this means that it will be integrated into the linux-next
> tree (usually sometime in the next 24 hours) and sent to Linus during
> the next merge window (or sooner if it is a bug fix), however if
> problems are discovered then the patch may be dropped or reverted.  
> 
> You may get further e-mails resulting from automated or manual testing
> and review of the tree, please engage with people reporting problems and
> send followup patches addressing any issues that are reported if needed.
> 
> If any updates are required or you are submitting further changes they
> should be sent as incremental updates against current git, existing
> patches will not be replaced.
> 
> Please add any relevant lists and maintainers to the CCs when replying
> to this mail.
> 
> Thanks,
> Mark
> 
> From 82a29bf9952acd1be7e76783604686abeb4e5b1d Mon Sep 17 00:00:00 2001
> From: Amelie Delaunay <amelie.delaunay@st.com>
> Date: Wed, 21 Jun 2017 16:32:05 +0200

A bit quick on the applying as there are several comments...

Rob

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#1675226 — Re: Applied "spi: Document the STM32 SPI bindings" to the spi tree

FromMark Brown <broonie@kernel.org>
Date2017-06-27 03:20 +0200
SubjectRe: Applied "spi: Document the STM32 SPI bindings" to the spi tree
Message-ID<tWNkB-1E6-9@gated-at.bofh.it>
In reply to#1674993

[Multipart message — attachments visible in raw view] — view raw

On Mon, Jun 26, 2017 at 01:22:40PM -0500, Rob Herring wrote:

> A bit quick on the applying as there are several comments...

Really trivial things which can easily be fixed incrementally without
having to repeatedly review the entire driver.

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#1671806

FromNeil Armstrong <narmstrong@baylibre.com>
Date2017-06-21 19:00 +0200
Message-ID<tUR8Z-eq-11@gated-at.bofh.it>
In reply to#1671708
On 06/21/2017 04:32 PM, Amelie Delaunay wrote:
> This patch adds the documentation of device tree bindings
> for the STM32 SPI controller.
> 
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> ---
>  .../devicetree/bindings/spi/spi-stm32.txt          | 60 ++++++++++++++++++++++
>  1 file changed, 60 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
> new file mode 100644
> index 0000000..3958bf6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
> @@ -0,0 +1,60 @@
> +STMicroelectronics STM32 SPI Controller
> +
> +The STM32 SPI controller is used to communicate with external devices using
> +the Serial Peripheral Interface. It supports full-duplex, half-duplex and
> +simplex synchronous serial communication with external devices. It supports
> +from 4 to 32-bit data size. Although it can be configured as master or slave,
> +only master is supported by the driver.
> +
> +Required properties:
> +- compatible: Must be "st,stm32-spi".

Hi Amelie,

What about the gen1 SPI devices like the F4 ?

It should have been better to use SoC specific compatible, or specify the SPI HW gen like gen1 or gen2.

Neil

> +- reg: Offset and length of the device's register set.
> +- interrupts: Must contain the interrupt id.
> +- clocks: Must contain an entry for spiclk (which feeds the internal clock
> +	  generator).
> +- #address-cells:  Number of cells required to define a chip select address.
> +- #size-cells: Should be zero.
> +
> +Optional properties:
> +- resets: Must contain the phandle to the reset controller.
> +- A pinctrl state named "default" may be defined to set pins in mode of
> +  operation for SPI transfer.
> +- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
> +  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
> +- dma-names: DMA request names should include "tx" and "rx" if present.
> +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
> +  Documentation/devicetree/bindings/spi/spi-bus.txt
> +
> +
> +Child nodes represent devices on the SPI bus
> +  See ../spi/spi-bus.txt
> +
> +Optional properties:
> +- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
> +		  nanoseconds inserted between two consecutive data frames.
> +
> +
> +Example:
> +	spi2: spi@40003800 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "st,stm32-spi";
> +		reg = <0x40003800 0x400>;
> +		interrupts = <36>;
> +		clocks = <&rcc SPI2_CK>;
> +		resets = <&rcc 1166>;
> +		dmas = <&dmamux1 0 39 0x400 0x01>,
> +		       <&dmamux1 1 40 0x400 0x01>;
> +		dma-names = "rx", "tx";
> +		pinctrl-0 = <&spi2_pins_b>;
> +		pinctrl-names = "default";
> +		status = "okay";
> +		cs-gpios = <&gpioa 11 0>;
> +
> +		spidev@0 {
> +			compatible = "spidev";
> +			reg = <0>;
> +			spi-max-frequency = <4000000>;
> +			st,spi-midi = <4000>;
> +		};
> +	};
> 

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#1672562

FromAmelie DELAUNAY <amelie.delaunay@st.com>
Date2017-06-22 14:00 +0200
Message-ID<tV8We-4b0-17@gated-at.bofh.it>
In reply to#1671806

On 06/21/2017 05:20 PM, Neil Armstrong wrote:
> On 06/21/2017 04:32 PM, Amelie Delaunay wrote:
>> This patch adds the documentation of device tree bindings
>> for the STM32 SPI controller.
>>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>> ---
>>   .../devicetree/bindings/spi/spi-stm32.txt          | 60 ++++++++++++++++++++++
>>   1 file changed, 60 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
>> new file mode 100644
>> index 0000000..3958bf6
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
>> @@ -0,0 +1,60 @@
>> +STMicroelectronics STM32 SPI Controller
>> +
>> +The STM32 SPI controller is used to communicate with external devices using
>> +the Serial Peripheral Interface. It supports full-duplex, half-duplex and
>> +simplex synchronous serial communication with external devices. It supports
>> +from 4 to 32-bit data size. Although it can be configured as master or slave,
>> +only master is supported by the driver.
>> +
>> +Required properties:
>> +- compatible: Must be "st,stm32-spi".
> 
> Hi Amelie,
> 
> What about the gen1 SPI devices like the F4 ?
> 
> It should have been better to use SoC specific compatible, or specify the SPI HW gen like gen1 or gen2.
> 
> Neil
> 

Hi Neil,

The gen1 SPI controller embedded on F4/F7 is different from gen2 
embedded on H7 and just to illustrate this, there are 5 main registers 
(16-bit) on gen1 versus 10 main registers on gen2 (32-bit)! Their 
operating modes are different, fifo management and so on... Moreover, I 
know that the community is working on an SPI driver for F4.

I agree with you on the fact that it would be better to use a SoC 
specific compatible: I will send a v2 with "st,stm32h7-spi". This way, 
this will be aligned with what have been done for the I2S part of this 
controller: https://patchwork.kernel.org/patch/9737799/

By the way, I also noticed that my optional property "st,spi-midi-ns" 
doesn't fit with the example "st,spi-midi". I will fix that in the v2 
and keep "st,spi-midi-ns".

Regards,
Amelie

>> +- reg: Offset and length of the device's register set.
>> +- interrupts: Must contain the interrupt id.
>> +- clocks: Must contain an entry for spiclk (which feeds the internal clock
>> +	  generator).
>> +- #address-cells:  Number of cells required to define a chip select address.
>> +- #size-cells: Should be zero.
>> +
>> +Optional properties:
>> +- resets: Must contain the phandle to the reset controller.
>> +- A pinctrl state named "default" may be defined to set pins in mode of
>> +  operation for SPI transfer.
>> +- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
>> +  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
>> +- dma-names: DMA request names should include "tx" and "rx" if present.
>> +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
>> +  Documentation/devicetree/bindings/spi/spi-bus.txt
>> +
>> +
>> +Child nodes represent devices on the SPI bus
>> +  See ../spi/spi-bus.txt
>> +
>> +Optional properties:
>> +- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
>> +		  nanoseconds inserted between two consecutive data frames.
>> +
>> +
>> +Example:
>> +	spi2: spi@40003800 {
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +		compatible = "st,stm32-spi";
>> +		reg = <0x40003800 0x400>;
>> +		interrupts = <36>;
>> +		clocks = <&rcc SPI2_CK>;
>> +		resets = <&rcc 1166>;
>> +		dmas = <&dmamux1 0 39 0x400 0x01>,
>> +		       <&dmamux1 1 40 0x400 0x01>;
>> +		dma-names = "rx", "tx";
>> +		pinctrl-0 = <&spi2_pins_b>;
>> +		pinctrl-names = "default";
>> +		status = "okay";
>> +		cs-gpios = <&gpioa 11 0>;
>> +
>> +		spidev@0 {
>> +			compatible = "spidev";
>> +			reg = <0>;
>> +			spi-max-frequency = <4000000>;
>> +			st,spi-midi = <4000>;
>> +		};
>> +	};
>>
> 

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#1674992

FromRob Herring <robh@kernel.org>
Date2017-06-26 20:30 +0200
Message-ID<tWGVP-5Oa-11@gated-at.bofh.it>
In reply to#1671708
On Wed, Jun 21, 2017 at 04:32:05PM +0200, Amelie Delaunay wrote:
> This patch adds the documentation of device tree bindings
> for the STM32 SPI controller.
> 
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> ---
>  .../devicetree/bindings/spi/spi-stm32.txt          | 60 ++++++++++++++++++++++
>  1 file changed, 60 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt
> 
> diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
> new file mode 100644
> index 0000000..3958bf6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
> @@ -0,0 +1,60 @@
> +STMicroelectronics STM32 SPI Controller
> +
> +The STM32 SPI controller is used to communicate with external devices using
> +the Serial Peripheral Interface. It supports full-duplex, half-duplex and
> +simplex synchronous serial communication with external devices. It supports
> +from 4 to 32-bit data size. Although it can be configured as master or slave,
> +only master is supported by the driver.
> +
> +Required properties:
> +- compatible: Must be "st,stm32-spi".
> +- reg: Offset and length of the device's register set.
> +- interrupts: Must contain the interrupt id.
> +- clocks: Must contain an entry for spiclk (which feeds the internal clock
> +	  generator).
> +- #address-cells:  Number of cells required to define a chip select address.
> +- #size-cells: Should be zero.
> +
> +Optional properties:
> +- resets: Must contain the phandle to the reset controller.
> +- A pinctrl state named "default" may be defined to set pins in mode of
> +  operation for SPI transfer.
> +- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
> +  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
> +- dma-names: DMA request names should include "tx" and "rx" if present.
> +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
> +  Documentation/devicetree/bindings/spi/spi-bus.txt
> +
> +
> +Child nodes represent devices on the SPI bus
> +  See ../spi/spi-bus.txt
> +
> +Optional properties:
> +- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
> +		  nanoseconds inserted between two consecutive data frames.
> +
> +
> +Example:
> +	spi2: spi@40003800 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "st,stm32-spi";
> +		reg = <0x40003800 0x400>;
> +		interrupts = <36>;
> +		clocks = <&rcc SPI2_CK>;
> +		resets = <&rcc 1166>;
> +		dmas = <&dmamux1 0 39 0x400 0x01>,
> +		       <&dmamux1 1 40 0x400 0x01>;
> +		dma-names = "rx", "tx";
> +		pinctrl-0 = <&spi2_pins_b>;
> +		pinctrl-names = "default";
> +		status = "okay";

Don't show status in examples.

> +		cs-gpios = <&gpioa 11 0>;
> +
> +		spidev@0 {
> +			compatible = "spidev";

This is not a valid compatible. Pick a real device.

Rob

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#1675367

FromAmelie DELAUNAY <amelie.delaunay@st.com>
Date2017-06-27 09:40 +0200
Message-ID<tWTgl-5HC-15@gated-at.bofh.it>
In reply to#1674992
Hi Rob,

On 06/26/2017 08:21 PM, Rob Herring wrote:
> On Wed, Jun 21, 2017 at 04:32:05PM +0200, Amelie Delaunay wrote:
>> This patch adds the documentation of device tree bindings
>> for the STM32 SPI controller.
>>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>> ---
>>   .../devicetree/bindings/spi/spi-stm32.txt          | 60 ++++++++++++++++++++++
>>   1 file changed, 60 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32.txt
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-stm32.txt b/Documentation/devicetree/bindings/spi/spi-stm32.txt
>> new file mode 100644
>> index 0000000..3958bf6
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-stm32.txt
>> @@ -0,0 +1,60 @@
>> +STMicroelectronics STM32 SPI Controller
>> +
>> +The STM32 SPI controller is used to communicate with external devices using
>> +the Serial Peripheral Interface. It supports full-duplex, half-duplex and
>> +simplex synchronous serial communication with external devices. It supports
>> +from 4 to 32-bit data size. Although it can be configured as master or slave,
>> +only master is supported by the driver.
>> +
>> +Required properties:
>> +- compatible: Must be "st,stm32-spi".
>> +- reg: Offset and length of the device's register set.
>> +- interrupts: Must contain the interrupt id.
>> +- clocks: Must contain an entry for spiclk (which feeds the internal clock
>> +	  generator).
>> +- #address-cells:  Number of cells required to define a chip select address.
>> +- #size-cells: Should be zero.
>> +
>> +Optional properties:
>> +- resets: Must contain the phandle to the reset controller.
>> +- A pinctrl state named "default" may be defined to set pins in mode of
>> +  operation for SPI transfer.
>> +- dmas: DMA specifiers for tx and rx dma. DMA fifo mode must be used. See the
>> +  STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt.
>> +- dma-names: DMA request names should include "tx" and "rx" if present.
>> +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
>> +  Documentation/devicetree/bindings/spi/spi-bus.txt
>> +
>> +
>> +Child nodes represent devices on the SPI bus
>> +  See ../spi/spi-bus.txt
>> +
>> +Optional properties:
>> +- st,spi-midi-ns: (Master Inter-Data Idleness) minimum time delay in
>> +		  nanoseconds inserted between two consecutive data frames.
>> +
>> +
>> +Example:
>> +	spi2: spi@40003800 {
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +		compatible = "st,stm32-spi";
>> +		reg = <0x40003800 0x400>;
>> +		interrupts = <36>;
>> +		clocks = <&rcc SPI2_CK>;
>> +		resets = <&rcc 1166>;
>> +		dmas = <&dmamux1 0 39 0x400 0x01>,
>> +		       <&dmamux1 1 40 0x400 0x01>;
>> +		dma-names = "rx", "tx";
>> +		pinctrl-0 = <&spi2_pins_b>;
>> +		pinctrl-names = "default";
>> +		status = "okay";
> 
> Don't show status in examples.
> 
Ok.
>> +		cs-gpios = <&gpioa 11 0>;
>> +
>> +		spidev@0 {
>> +			compatible = "spidev";
> 
> This is not a valid compatible. Pick a real device.
Ok this was just to illustrate the optional property st,spi-midi-ns.
> 
> Rob
> 

I will send a new patch to fix these issues.
Thanks,

Amelie

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