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Groups > linux.kernel > #1670419 > unrolled thread
| Started by | Anshuman Khandual <khandual@linux.vnet.ibm.com> |
|---|---|
| First post | 2017-06-20 10:30 +0200 |
| Last post | 2017-06-21 01:30 +0200 |
| Articles | 2 — 2 participants |
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Re: [RFC v2 06/12] powerpc: Program HPTE key protection bits. Anshuman Khandual <khandual@linux.vnet.ibm.com> - 2017-06-20 10:30 +0200
Re: [RFC v2 06/12] powerpc: Program HPTE key protection bits. Ram Pai <linuxram@us.ibm.com> - 2017-06-21 01:30 +0200
| From | Anshuman Khandual <khandual@linux.vnet.ibm.com> |
|---|---|
| Date | 2017-06-20 10:30 +0200 |
| Subject | Re: [RFC v2 06/12] powerpc: Program HPTE key protection bits. |
| Message-ID | <tUmHV-6aA-33@gated-at.bofh.it> |
On 06/17/2017 09:22 AM, Ram Pai wrote: > Map the PTE protection key bits to the HPTE key protection bits, > while creatiing HPTE entries. > > Signed-off-by: Ram Pai <linuxram@us.ibm.com> > --- > arch/powerpc/include/asm/book3s/64/mmu-hash.h | 5 +++++ > arch/powerpc/include/asm/pkeys.h | 7 +++++++ > arch/powerpc/mm/hash_utils_64.c | 5 +++++ > 3 files changed, 17 insertions(+) > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > index cfb8169..3d7872c 100644 > --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h > +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > @@ -90,6 +90,8 @@ > #define HPTE_R_PP0 ASM_CONST(0x8000000000000000) > #define HPTE_R_TS ASM_CONST(0x4000000000000000) > #define HPTE_R_KEY_HI ASM_CONST(0x3000000000000000) > +#define HPTE_R_KEY_BIT0 ASM_CONST(0x2000000000000000) > +#define HPTE_R_KEY_BIT1 ASM_CONST(0x1000000000000000) > #define HPTE_R_RPN_SHIFT 12 > #define HPTE_R_RPN ASM_CONST(0x0ffffffffffff000) > #define HPTE_R_RPN_3_0 ASM_CONST(0x01fffffffffff000) > @@ -104,6 +106,9 @@ > #define HPTE_R_C ASM_CONST(0x0000000000000080) > #define HPTE_R_R ASM_CONST(0x0000000000000100) > #define HPTE_R_KEY_LO ASM_CONST(0x0000000000000e00) > +#define HPTE_R_KEY_BIT2 ASM_CONST(0x0000000000000800) > +#define HPTE_R_KEY_BIT3 ASM_CONST(0x0000000000000400) > +#define HPTE_R_KEY_BIT4 ASM_CONST(0x0000000000000200) > Should we indicate/document how these 5 bits are not contiguous in the HPTE format for any given real page ? > #define HPTE_V_1TB_SEG ASM_CONST(0x4000000000000000) > #define HPTE_V_VRMA_MASK ASM_CONST(0x4001ffffff000000) > diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h > index 0f3dca8..9b6820d 100644 > --- a/arch/powerpc/include/asm/pkeys.h > +++ b/arch/powerpc/include/asm/pkeys.h > @@ -27,6 +27,13 @@ > ((vm_flags & VM_PKEY_BIT3) ? H_PAGE_PKEY_BIT1 : 0x0UL) | \ > ((vm_flags & VM_PKEY_BIT4) ? H_PAGE_PKEY_BIT0 : 0x0UL)) > > +#define calc_pte_to_hpte_pkey_bits(pteflags) \ > + (((pteflags & H_PAGE_PKEY_BIT0) ? HPTE_R_KEY_BIT0 : 0x0UL) | \ > + ((pteflags & H_PAGE_PKEY_BIT1) ? HPTE_R_KEY_BIT1 : 0x0UL) | \ > + ((pteflags & H_PAGE_PKEY_BIT2) ? HPTE_R_KEY_BIT2 : 0x0UL) | \ > + ((pteflags & H_PAGE_PKEY_BIT3) ? HPTE_R_KEY_BIT3 : 0x0UL) | \ > + ((pteflags & H_PAGE_PKEY_BIT4) ? HPTE_R_KEY_BIT4 : 0x0UL)) > + We can drop calc_ in here. pte_to_hpte_pkey_bits should be sufficient.
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| From | Ram Pai <linuxram@us.ibm.com> |
|---|---|
| Date | 2017-06-21 01:30 +0200 |
| Message-ID | <tUAKS-6CT-15@gated-at.bofh.it> |
| In reply to | #1670419 |
On Tue, Jun 20, 2017 at 01:51:45PM +0530, Anshuman Khandual wrote: > On 06/17/2017 09:22 AM, Ram Pai wrote: > > Map the PTE protection key bits to the HPTE key protection bits, > > while creatiing HPTE entries. > > > > Signed-off-by: Ram Pai <linuxram@us.ibm.com> > > --- > > arch/powerpc/include/asm/book3s/64/mmu-hash.h | 5 +++++ > > arch/powerpc/include/asm/pkeys.h | 7 +++++++ > > arch/powerpc/mm/hash_utils_64.c | 5 +++++ > > 3 files changed, 17 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > > index cfb8169..3d7872c 100644 > > --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h > > +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > > @@ -90,6 +90,8 @@ > > #define HPTE_R_PP0 ASM_CONST(0x8000000000000000) > > #define HPTE_R_TS ASM_CONST(0x4000000000000000) > > #define HPTE_R_KEY_HI ASM_CONST(0x3000000000000000) > > +#define HPTE_R_KEY_BIT0 ASM_CONST(0x2000000000000000) > > +#define HPTE_R_KEY_BIT1 ASM_CONST(0x1000000000000000) > > #define HPTE_R_RPN_SHIFT 12 > > #define HPTE_R_RPN ASM_CONST(0x0ffffffffffff000) > > #define HPTE_R_RPN_3_0 ASM_CONST(0x01fffffffffff000) > > @@ -104,6 +106,9 @@ > > #define HPTE_R_C ASM_CONST(0x0000000000000080) > > #define HPTE_R_R ASM_CONST(0x0000000000000100) > > #define HPTE_R_KEY_LO ASM_CONST(0x0000000000000e00) > > +#define HPTE_R_KEY_BIT2 ASM_CONST(0x0000000000000800) > > +#define HPTE_R_KEY_BIT3 ASM_CONST(0x0000000000000400) > > +#define HPTE_R_KEY_BIT4 ASM_CONST(0x0000000000000200) > > > > Should we indicate/document how these 5 bits are not contiguous > in the HPTE format for any given real page ? I can, but its all well documented in the ISA. Infact all the bits and the macros are one to one translation from the ISA. > > > #define HPTE_V_1TB_SEG ASM_CONST(0x4000000000000000) > > #define HPTE_V_VRMA_MASK ASM_CONST(0x4001ffffff000000) > > diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h > > index 0f3dca8..9b6820d 100644 > > --- a/arch/powerpc/include/asm/pkeys.h > > +++ b/arch/powerpc/include/asm/pkeys.h > > @@ -27,6 +27,13 @@ > > ((vm_flags & VM_PKEY_BIT3) ? H_PAGE_PKEY_BIT1 : 0x0UL) | \ > > ((vm_flags & VM_PKEY_BIT4) ? H_PAGE_PKEY_BIT0 : 0x0UL)) > > > > +#define calc_pte_to_hpte_pkey_bits(pteflags) \ > > + (((pteflags & H_PAGE_PKEY_BIT0) ? HPTE_R_KEY_BIT0 : 0x0UL) | \ > > + ((pteflags & H_PAGE_PKEY_BIT1) ? HPTE_R_KEY_BIT1 : 0x0UL) | \ > > + ((pteflags & H_PAGE_PKEY_BIT2) ? HPTE_R_KEY_BIT2 : 0x0UL) | \ > > + ((pteflags & H_PAGE_PKEY_BIT3) ? HPTE_R_KEY_BIT3 : 0x0UL) | \ > > + ((pteflags & H_PAGE_PKEY_BIT4) ? HPTE_R_KEY_BIT4 : 0x0UL)) > > + > > We can drop calc_ in here. pte_to_hpte_pkey_bits should be > sufficient. ok. will do. thanks for your comments, RP
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