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| Started by | Magnus Damm <magnus.damm@gmail.com> |
|---|---|
| First post | 2017-06-19 11:20 +0200 |
| Last post | 2017-06-19 11:20 +0200 |
| Articles | 1 — 1 participant |
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[PATCH v4 05/09] iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master Magnus Damm <magnus.damm@gmail.com> - 2017-06-19 11:20 +0200
| From | Magnus Damm <magnus.damm@gmail.com> |
|---|---|
| Date | 2017-06-19 11:20 +0200 |
| Subject | [PATCH v4 05/09] iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master |
| Message-ID | <tU10J-Jx-5@gated-at.bofh.it> |
From: Magnus Damm <damm+renesas@opensource.se> The r8a7795 IPMMU supports 40-bit bus mastering. Both the coherent DMA mask and the streaming DMA mask are set to unlock the 40-bit address space for coherent allocations and streaming operations. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> --- Changes since V3: - None Changes since V2: - Updated the code and commit message to use 40 bits instead of 64 bits Changes since V1: - Updated the commit message drivers/iommu/ipmmu-vmsa.c | 1 + 1 file changed, 1 insertion(+) --- 0021/drivers/iommu/ipmmu-vmsa.c +++ work/drivers/iommu/ipmmu-vmsa.c 2017-06-19 14:05:33.720607110 +0900 @@ -1004,6 +1004,7 @@ static int ipmmu_probe(struct platform_d spin_lock_init(&mmu->lock); bitmap_zero(mmu->ctx, IPMMU_CTX_MAX); mmu->features = of_device_get_match_data(&pdev->dev); + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40)); /* Map I/O memory and request IRQ. */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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