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Groups > linux.kernel > #1666411 > unrolled thread

[PATCH v4 00/20] arm64: dts: hi3660: add device nodes

Started byGuodong Xu <guodong.xu@linaro.org>
First post2017-06-15 05:10 +0200
Last post2017-06-15 22:00 +0200
Articles 17 — 2 participants

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Contents

  [PATCH v4 00/20] arm64: dts: hi3660: add device nodes Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 02/20] arm64: dts: hisilicon: update compatible string for hikey960 Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 20/20] arm64: dts: hi3660-hikey960: add nodes for WiFi Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 07/20] arm64: dts: hi3660: Add uarts nodes Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 10/20] arm64: dts: hi3660: add power key dts node Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 11/20] arm64: dts: hikey960: add LED nodes Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 15/20] arm64: dts: hisi: add kirin pcie node Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
      [PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node Guodong Xu <guodong.xu@linaro.org> - 2017-06-16 16:20 +0200
        Re: [PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node Wei Xu <xuwei5@hisilicon.com> - 2017-06-16 17:00 +0200
    [PATCH v4 04/20] arm64: dts: hi3660: add resources for clock and reset Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 18/20] dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 14/20] dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 08/20] arm64: dts: hikey960: add WL1837 Bluetooth device node Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 01/20] dt-bindings: arm: hisilicon: add bindings for HiKey960 board Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 19/20] arm64: dts: hi3660: add sd/sdio device nodes Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:10 +0200
    [PATCH v4 09/20] arm64: dts: hi3660: Add pl031 rtc node Guodong Xu <guodong.xu@linaro.org> - 2017-06-15 05:20 +0200
    Re: [PATCH v4 00/20] arm64: dts: hi3660: add device nodes Wei Xu <xuwei5@hisilicon.com> - 2017-06-15 22:00 +0200

#1666411 — [PATCH v4 00/20] arm64: dts: hi3660: add device nodes

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 00/20] arm64: dts: hi3660: add device nodes
Message-ID<tStkt-5rK-5@gated-at.bofh.it>
This patchset adds various devices nodes for hi3660 and hikey960.

HiKey960 is one of 96boards. For details information about it, please
refer to [1].

In v4, I removed cpuidle patch
* (v3-0014-arm64-dts-hi3660-enable-idle-states.patch)
  , since we are not sure yet whether the corresponding driver can get
  into mainline. Sorry about the noise.
* Other patches are not changed.

In v3,
* nothing is changed for patches already exists in v2.
* added 9 more dts patches. Most of them already were reviewed with their
    corresponding driver patchset. For purpose of easy integration for
    platform maintainer, I copied them here, including threads [2], [3],
    and [4].
* four patches, this is the first time they are sent out for review.
v3-0014-arm64-dts-hi3660-enable-idle-states.patch
v3-0019-dt-bindings-mmc-dw_mmc-k3-add-document-of-hi3660-.patch
v3-0020-arm64-dts-hi3660-add-sd-sdio-device-nodes.patch
v3-0021-arm64-dts-hi3660-hikey960-add-nodes-for-WiFi.patch
    mmc driver is under review in [5].

In v2, incorporated review comments from Rob Herring <robh@kernel.org>
* uart4: max-speed should be in slave device bluetooth node
* LEDs:	- bt_active triggered by 'hci0-power'
	- move out of SoC level
* pinctrl: update dts to use #pinctrl-cells
* uart: add pinctrl information into uart nodes; add label strings.
* chosen: update stdout-path. serial6 is used.
* i2c: add label strings. change reg address to lower case.
* remove unnecessary status="ok"
* gpio-keys: move out of SoC level.

[1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960
[2] sp804 timer: https://www.spinics.net/lists/kernel/msg2513025.html
[3] PCIe: https://www.spinics.net/lists/kernel/msg2520677.html
[4] mfd and regulator: https://www.spinics.net/lists/arm-kernel/msg586147.html
[5] mmc: https://patchwork.kernel.org/patch/9783273/

Chen Feng (2):
  arm64: dts: hi3660: Add uarts nodes
  arm64: dts: hi3660: Add pl031 rtc node

Chen Jun (1):
  arm64: dts: hi3660: add power key dts node

Guodong Xu (7):
  dt-bindings: arm: hisilicon: add bindings for HiKey960 board
  arm64: dts: hisilicon: update compatible string for hikey960
  arm64: dts: hikey960: add WL1837 Bluetooth device node
  arm64: dts: hikey960: add LED nodes
  dt-bindings: mfd: hi6421: Add hi6421v530 compatible string
  dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc
  arm64: dts: hi3660-hikey960: add nodes for WiFi

Leo Yan (1):
  arm64: dts: hi3660: add sp804 timer node

Li Wei (1):
  arm64: dts: hi3660: add sd/sdio device nodes

Wang Xiaoyin (4):
  arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig
  arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC
  arm64: dts: hi3660: add spi device nodes
  arm64: dts: hikey960: add device node for pmic and regulators

Xiaowei Song (2):
  dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs
  arm64: dts: hisi: add kirin pcie node

Zhangfei Gao (2):
  arm64: dts: hi3660: add resources for clock and reset
  arm64: dts: Add I2C nodes for Hi3660

 .../bindings/arm/hisilicon/hisilicon.txt           |   4 +
 Documentation/devicetree/bindings/mfd/hi6421.txt   |   4 +-
 .../devicetree/bindings/mmc/k3-dw-mshc.txt         |   1 +
 .../devicetree/bindings/pci/kirin-pcie.txt         |  50 ++
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts  | 217 +++++-
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi          | 702 ++++++++++++++++++-
 .../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi | 778 +++++++++++++++++++--
 7 files changed, 1681 insertions(+), 75 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt

-- 
2.10.2

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#1666413 — [PATCH v4 02/20] arm64: dts: hisilicon: update compatible string for hikey960

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 02/20] arm64: dts: hisilicon: update compatible string for hikey960
Message-ID<tStku-5rK-25@gated-at.bofh.it>
In reply to#1666411
Update compatible string for hikey960. HiKey960 is a develpment board built
with SoC Hi3660.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 186251f..64875a5 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "HiKey960";
-	compatible = "hisilicon,hi3660";
+	compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
 
 	aliases {
 		serial5 = &uart5;       /* console UART */
-- 
2.10.2

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#1666414 — [PATCH v4 20/20] arm64: dts: hi3660-hikey960: add nodes for WiFi

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 20/20] arm64: dts: hi3660-hikey960: add nodes for WiFi
Message-ID<tStku-5rK-23@gated-at.bofh.it>
In reply to#1666411
Add nodes for WiFi. HiKey960 is using TI WL1837MOD module.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 33 +++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index cec0b60..6609b0f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -145,6 +145,20 @@
 			};
 		};
 	};
+
+	wlan_en: wlan-en-1-8v {
+		compatible = "regulator-fixed";
+		regulator-name = "wlan-en-regulator";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+
+		/* GPIO_051_WIFI_EN */
+		gpio = <&gpio6 3 0>;
+
+		/* WLAN card specific delay */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
 };
 
 &i2c0 {
@@ -208,3 +222,22 @@
 	vqmmc-supply = <&ldo9>;
 	status = "okay";
 };
+
+&dwmmc2 { /* WIFI */
+	broken-cd;
+	/* WL_EN */
+	vmmc-supply = <&wlan_en>;
+	ti,non-removable;
+	non-removable;
+	#address-cells = <0x1>;
+	#size-cells = <0x0>;
+	status = "ok";
+
+	wlcore: wlcore@2 {
+		compatible = "ti,wl1837";
+		reg = <2>;      /* sdio func num */
+		/* WL_IRQ, GPIO_179_WL_WAKEUP_AP */
+		interrupt-parent = <&gpio22>;
+		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+	};
+};
-- 
2.10.2

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#1666415 — [PATCH v4 07/20] arm64: dts: hi3660: Add uarts nodes

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 07/20] arm64: dts: hi3660: Add uarts nodes
Message-ID<tStku-5rK-27@gated-at.bofh.it>
In reply to#1666411
From: Chen Feng <puck.chen@hisilicon.com>

Add nodes uart0 to uart4 and uart6 for hi3660 SoC.
Enable uart3 and uart6, disable uart5, in hikey960 board dts.

On HiKey960:
 - UART6 is used as default console, and is wired out through low speed
         expansion connector.
 - UART3 has RTS/CTS hardware handshake, and is wired out through low
         speed expansion connector.
 - UART5 is not used in commercial launched boards. So disable it.
 - UART4 is connected to Bluetooth, WL1837.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@hisilicon.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 20 +++++-
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi         | 74 +++++++++++++++++++++++
 2 files changed, 91 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 1a4d6c5..0a3f2e0 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -15,11 +15,17 @@
 	compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
 
 	aliases {
-		serial5 = &uart5;       /* console UART */
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
 	};
 
 	chosen {
-		stdout-path = "serial5:115200n8";
+		stdout-path = "serial6:115200n8";
 	};
 
 	memory@0 {
@@ -51,6 +57,14 @@
 	status = "okay";
 };
 
-&uart5 {
+&uart3 {
+	/* On Low speed expansion */
+	label = "LS-UART0";
+	status = "okay";
+};
+
+&uart6 {
+	/* On Low speed expansion */
+	label = "LS-UART1";
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index b03be4d..7a90c92 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -242,6 +242,66 @@
 			status = "disabled";
 		};
 
+		uart0: serial@fdf02000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xfdf02000 0x0 0x1000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
+				 <&crg_ctrl HI3660_PCLK>;
+			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
+			status = "disabled";
+		};
+
+		uart1: serial@fdf00000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xfdf00000 0x0 0x1000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
+				 <&crg_ctrl HI3660_CLK_GATE_UART1>;
+			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
+			status = "disabled";
+		};
+
+		uart2: serial@fdf03000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xfdf03000 0x0 0x1000>;
+			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
+				 <&crg_ctrl HI3660_PCLK>;
+			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
+			status = "disabled";
+		};
+
+		uart3: serial@ffd74000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xffd74000 0x0 0x1000>;
+			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_FACTOR_UART3>,
+				 <&crg_ctrl HI3660_PCLK>;
+			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
+			status = "disabled";
+		};
+
+		uart4: serial@fdf01000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xfdf01000 0x0 0x1000>;
+			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>,
+				 <&crg_ctrl HI3660_CLK_GATE_UART4>;
+			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
+			status = "disabled";
+		};
+
 		uart5: serial@fdf05000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xfdf05000 0x0 0x1000>;
@@ -249,6 +309,20 @@
 			clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
 				 <&crg_ctrl HI3660_CLK_GATE_UART5>;
 			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart5_pmx_func &uart5_cfg_func>;
+			status = "disabled";
+		};
+
+		uart6: serial@fff32000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x0 0xfff32000 0x0 0x1000>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_UART6>,
+				 <&crg_ctrl HI3660_PCLK>;
+			clock-names = "uartclk", "apb_pclk";
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart6_pmx_func &uart6_cfg_func>;
 			status = "disabled";
 		};
 
-- 
2.10.2

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#1666416 — [PATCH v4 10/20] arm64: dts: hi3660: add power key dts node

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 10/20] arm64: dts: hi3660: add power key dts node
Message-ID<tStku-5rK-29@gated-at.bofh.it>
In reply to#1666411
From: Chen Jun <chenjun14@huawei.com>

We use gpio_034 as power key on hikey960, and set gpio with pull-up
state, when key press the voltage on the gpio will come to lower, and
power key event will be reported.

Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index c25fff9..7aac35b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -10,6 +10,8 @@
 #include "hi3660.dtsi"
 #include "hikey960-pinctrl.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
 	model = "HiKey960";
@@ -34,6 +36,19 @@
 		/* rewrite this at bootloader */
 		reg = <0x0 0x0 0x0 0x0>;
 	};
+
+	keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>;
+
+		power {
+			wakeup-source;
+			gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
+			label = "GPIO Power";
+			linux,code = <KEY_POWER>;
+		};
+	};
 };
 
 &i2c0 {
-- 
2.10.2

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#1666417 — [PATCH v4 11/20] arm64: dts: hikey960: add LED nodes

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 11/20] arm64: dts: hikey960: add LED nodes
Message-ID<tStku-5rK-31@gated-at.bofh.it>
In reply to#1666411
HiKey960 has four user LEDs, and two special purpose LEDs: WiFi and BT
respectively.

All of them are implemented as GPIO.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 48 +++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 7aac35b..9ecf6c6 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -49,6 +49,54 @@
 			linux,code = <KEY_POWER>;
 		};
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		user_led1 {
+			label = "user_led1";
+			/* gpio_150_user_led1 */
+			gpios = <&gpio18 6 0>;
+			linux,default-trigger = "heartbeat";
+		};
+
+		user_led2 {
+			label = "user_led2";
+			/* gpio_151_user_led2 */
+			gpios = <&gpio18 7 0>;
+			linux,default-trigger = "mmc0";
+		};
+
+		user_led3 {
+			label = "user_led3";
+			/* gpio_189_user_led3 */
+			gpios = <&gpio23 5 0>;
+			default-state = "off";
+		};
+
+		user_led4 {
+			label = "user_led4";
+			/* gpio_190_user_led4 */
+			gpios = <&gpio23 6 0>;
+			linux,default-trigger = "cpu0";
+		};
+
+		wlan_active_led {
+			label = "wifi_active";
+			/* gpio_205_wifi_active */
+			gpios = <&gpio25 5 0>;
+			linux,default-trigger = "phy0tx";
+			default-state = "off";
+		};
+
+		bt_active_led {
+			label = "bt_active";
+			gpios = <&gpio25 7 0>;
+			/* gpio_207_user_led1 */
+			linux,default-trigger = "hci0-power";
+			default-state = "off";
+		};
+	};
 };
 
 &i2c0 {
-- 
2.10.2

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#1666418 — [PATCH v4 15/20] arm64: dts: hisi: add kirin pcie node

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 15/20] arm64: dts: hisi: add kirin pcie node
Message-ID<tStku-5rK-33@gated-at.bofh.it>
In reply to#1666411
From: Xiaowei Song <songxiaowei@hisilicon.com>

Add PCIe node for hi3660, and add binding documentation.

Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index e138973..529cf08 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -754,5 +754,37 @@
 			cs-gpios = <&gpio18 5 0>;
 			status = "disabled";
 		};
+
+		pcie@f4000000 {
+			compatible = "hisilicon,kirin960-pcie";
+			reg = <0x0 0xf4000000 0x0 0x1000>,
+			      <0x0 0xff3fe000 0x0 0x1000>,
+			      <0x0 0xf3f20000 0x0 0x40000>,
+			      <0x0 0xf5000000 0x0 0x2000>;
+			reg-names = "dbi", "apb", "phy", "config";
+			bus-range = <0x0  0x1>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			device_type = "pci";
+			ranges = <0x02000000 0x0 0x00000000 0x0
+				  0xf6000000 0x0 0x2000000>;
+			num-lanes = <1>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>,
+					<0x0 0 0 2 &gic 0 0 0  283 4>,
+					<0x0 0 0 3 &gic 0 0 0  284 4>,
+					<0x0 0 0 4 &gic 0 0 0  285 4>;
+			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
+				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
+				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
+				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
+				 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
+			clock-names = "pcie_phy_ref", "pcie_aux",
+				      "pcie_apb_phy", "pcie_apb_sys",
+				      "pcie_aclk";
+			reset-gpios = <&gpio11 1 0 >;
+			status = "ok";
+		};
 	};
 };
-- 
2.10.2

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#1667788 — [PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-16 16:20 +0200
Subject[PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node
Message-ID<tT0gq-1a4-23@gated-at.bofh.it>
In reply to#1666418
From: Xiaowei Song <songxiaowei@hisilicon.com>

Add PCIe node for hi3660

Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Changes in v5:
 * fix interrupt-map, to conform to gic's #address-cells = <0>
 * remove redundant status = "ok"
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 36 +++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index e138973..8183d71 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -754,5 +754,41 @@
 			cs-gpios = <&gpio18 5 0>;
 			status = "disabled";
 		};
+
+		pcie@f4000000 {
+			compatible = "hisilicon,kirin960-pcie";
+			reg = <0x0 0xf4000000 0x0 0x1000>,
+			      <0x0 0xff3fe000 0x0 0x1000>,
+			      <0x0 0xf3f20000 0x0 0x40000>,
+			      <0x0 0xf5000000 0x0 0x2000>;
+			reg-names = "dbi", "apb", "phy", "config";
+			bus-range = <0x0  0x1>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			device_type = "pci";
+			ranges = <0x02000000 0x0 0x00000000
+				  0x0 0xf6000000
+				  0x0 0x02000000>;
+			num-lanes = <1>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <0x0 0 0 1
+					 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0 0 0 2
+					 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0 0 0 3
+					 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0 0 0 4
+					 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
+				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
+				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
+				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
+				 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
+			clock-names = "pcie_phy_ref", "pcie_aux",
+				      "pcie_apb_phy", "pcie_apb_sys",
+				      "pcie_aclk";
+			reset-gpios = <&gpio11 1 0 >;
+		};
 	};
 };
-- 
2.10.2

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#1667819 — Re: [PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node

FromWei Xu <xuwei5@hisilicon.com>
Date2017-06-16 17:00 +0200
SubjectRe: [PATCH v5 15/20] arm64: dts: hisi: add kirin pcie node
Message-ID<tT0T7-1p7-15@gated-at.bofh.it>
In reply to#1667788
Hi Guodong,

On 2017/6/16 15:13, Guodong Xu wrote:
> From: Xiaowei Song <songxiaowei@hisilicon.com>
> 
> Add PCIe node for hi3660
> 
> Cc: Guodong Xu <guodong.xu@linaro.org>
> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> 
> Changes in v5:
>  * fix interrupt-map, to conform to gic's #address-cells = <0>
>  * remove redundant status = "ok"
> ---

Thanks!
Applied v5 and dropped the v4 in the hisilicon arm64 dt tree.

BR,
Wei


>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 36 +++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index e138973..8183d71 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -754,5 +754,41 @@
>  			cs-gpios = <&gpio18 5 0>;
>  			status = "disabled";
>  		};
> +
> +		pcie@f4000000 {
> +			compatible = "hisilicon,kirin960-pcie";
> +			reg = <0x0 0xf4000000 0x0 0x1000>,
> +			      <0x0 0xff3fe000 0x0 0x1000>,
> +			      <0x0 0xf3f20000 0x0 0x40000>,
> +			      <0x0 0xf5000000 0x0 0x2000>;
> +			reg-names = "dbi", "apb", "phy", "config";
> +			bus-range = <0x0  0x1>;
> +			#address-cells = <3>;
> +			#size-cells = <2>;
> +			device_type = "pci";
> +			ranges = <0x02000000 0x0 0x00000000
> +				  0x0 0xf6000000
> +				  0x0 0x02000000>;
> +			num-lanes = <1>;
> +			#interrupt-cells = <1>;
> +			interrupt-map-mask = <0xf800 0 0 7>;
> +			interrupt-map = <0x0 0 0 1
> +					 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
> +					<0x0 0 0 2
> +					 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
> +					<0x0 0 0 3
> +					 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
> +					<0x0 0 0 4
> +					 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
> +				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
> +				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
> +				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
> +				 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
> +			clock-names = "pcie_phy_ref", "pcie_aux",
> +				      "pcie_apb_phy", "pcie_apb_sys",
> +				      "pcie_aclk";
> +			reset-gpios = <&gpio11 1 0 >;
> +		};
>  	};
>  };
>

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#1666419 — [PATCH v4 04/20] arm64: dts: hi3660: add resources for clock and reset

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 04/20] arm64: dts: hi3660: add resources for clock and reset
Message-ID<tStkv-5rK-37@gated-at.bofh.it>
In reply to#1666411
From: Zhangfei Gao <zhangfei.gao@linaro.org>

Add some resource nodes for clock and reset

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 53 +++++++++++++++++++++++++++----
 1 file changed, 46 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 3983086..f55710a 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/hi3660-clock.h>
 
 / {
 	compatible = "hisilicon,hi3660";
@@ -141,18 +142,56 @@
 		#size-cells = <2>;
 		ranges;
 
-		fixed_uart5: fixed_19_2M {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <19200000>;
-			clock-output-names = "fixed:uart5";
+		crg_ctrl: crg_ctrl@fff35000 {
+			compatible = "hisilicon,hi3660-crgctrl", "syscon";
+			reg = <0x0 0xfff35000 0x0 0x1000>;
+			#clock-cells = <1>;
 		};
 
-		uart5: uart@fdf05000 {
+		crg_rst: crg_rst_controller {
+			compatible = "hisilicon,hi3660-reset";
+			#reset-cells = <2>;
+			hisi,rst-syscon = <&crg_ctrl>;
+		};
+
+
+		pctrl: pctrl@e8a09000 {
+			compatible = "hisilicon,hi3660-pctrl", "syscon";
+			reg = <0x0 0xe8a09000 0x0 0x2000>;
+			#clock-cells = <1>;
+		};
+
+		pmuctrl: crg_ctrl@fff34000 {
+			compatible = "hisilicon,hi3660-pmuctrl", "syscon";
+			reg = <0x0 0xfff34000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		sctrl: sctrl@fff0a000 {
+			compatible = "hisilicon,hi3660-sctrl", "syscon";
+			reg = <0x0 0xfff0a000 0x0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		iomcu: iomcu@ffd7e000 {
+			compatible = "hisilicon,hi3660-iomcu", "syscon";
+			reg = <0x0 0xffd7e000 0x0 0x1000>;
+			#clock-cells = <1>;
+
+		};
+
+		iomcu_rst: reset {
+			compatible = "hisilicon,hi3660-reset";
+			hisi,rst-syscon = <&iomcu>;
+			#reset-cells = <2>;
+		};
+
+		uart5: serial@fdf05000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xfdf05000 0x0 0x1000>;
 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&fixed_uart5 &fixed_uart5>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
+				 <&crg_ctrl HI3660_CLK_GATE_UART5>;
 			clock-names = "uartclk", "apb_pclk";
 			status = "disabled";
 		};
-- 
2.10.2

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#1666420 — [PATCH v4 18/20] dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 18/20] dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc
Message-ID<tStkv-5rK-39@gated-at.bofh.it>
In reply to#1666411
Add bindings for hi3660 mmc support

Signed-off-by: Li Wei <liwei213@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
 Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
index df37058..8af1afc 100644
--- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt
@@ -12,6 +12,7 @@ extensions to the Synopsys Designware Mobile Storage Host Controller.
 Required Properties:
 
 * compatible: should be one of the following.
+  - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
   - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
   - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
 
-- 
2.10.2

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#1666421 — [PATCH v4 14/20] dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 14/20] dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs
Message-ID<tStkv-5rK-41@gated-at.bofh.it>
In reply to#1666411
From: Xiaowei Song <songxiaowei@hisilicon.com>

This patch adds document for PCIe of Kirin SoC series.

Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/pci/kirin-pcie.txt         | 50 ++++++++++++++++++++++
 1 file changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt

diff --git a/Documentation/devicetree/bindings/pci/kirin-pcie.txt b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
new file mode 100644
index 0000000..68ffa0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/kirin-pcie.txt
@@ -0,0 +1,50 @@
+HiSilicon Kirin SoCs PCIe host DT description
+
+Kirin PCIe host controller is based on Designware PCI core.
+It shares common functions with PCIe Designware core driver
+and inherits common properties defined in
+Documentation/devicetree/bindings/pci/designware-pci.txt.
+
+Additional properties are described here:
+
+Required properties
+- compatible:
+	"hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC
+- reg: Should contain rc_dbi, apb, phy, config registers location and length.
+- reg-names: Must include the following entries:
+  "dbi": controller configuration registers;
+  "apb": apb Ctrl register defined by Kirin;
+  "phy": apb PHY register defined by Kirin;
+  "config": PCIe configuration space registers.
+- reset-gpios: The gpio to generate PCIe perst assert and deassert signal.
+
+Optional properties:
+
+Example based on kirin960:
+
+	pcie@f4000000 {
+		compatible = "hisilicon,kirin-pcie";
+		reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>,
+		      <0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>;
+		reg-names = "dbi","apb","phy", "config";
+		bus-range = <0x0  0x1>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		device_type = "pci";
+		ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>;
+		num-lanes = <1>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0xf800 0 0 7>;
+		interrupt-map = <0x0 0 0 1 &gic 0 0 0  282 4>,
+				<0x0 0 0 2 &gic 0 0 0  283 4>,
+				<0x0 0 0 3 &gic 0 0 0  284 4>,
+				<0x0 0 0 4 &gic 0 0 0  285 4>;
+		clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
+			 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
+			 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
+			 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
+			 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
+		clock-names = "pcie_phy_ref", "pcie_aux",
+			      "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk";
+		reset-gpios = <&gpio11 1 0 >;
+	};
-- 
2.10.2

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#1666422 — [PATCH v4 08/20] arm64: dts: hikey960: add WL1837 Bluetooth device node

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 08/20] arm64: dts: hikey960: add WL1837 Bluetooth device node
Message-ID<tStkv-5rK-43@gated-at.bofh.it>
In reply to#1666411
This adds the serial slave device for the WL1837 Bluetooth interface.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 0a3f2e0..c25fff9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -9,6 +9,7 @@
 
 #include "hi3660.dtsi"
 #include "hikey960-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "HiKey960";
@@ -63,6 +64,16 @@
 	status = "okay";
 };
 
+&uart4 {
+	status = "okay";
+
+	bluetooth {
+		compatible = "ti,wl1837-st";
+		enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>;
+		max-speed = <921600>;
+	};
+};
+
 &uart6 {
 	/* On Low speed expansion */
 	label = "LS-UART1";
-- 
2.10.2

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#1666423 — [PATCH v4 01/20] dt-bindings: arm: hisilicon: add bindings for HiKey960 board

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 01/20] dt-bindings: arm: hisilicon: add bindings for HiKey960 board
Message-ID<tStkv-5rK-45@gated-at.bofh.it>
In reply to#1666411
Add bindings for HiKey960 Board.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 2e73215..7111fbc8 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,6 +4,10 @@ Hi3660 SoC
 Required root node properties:
 	- compatible = "hisilicon,hi3660";
 
+HiKey960 Board
+Required root node properties:
+	- compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
+
 Hi3798cv200 SoC
 Required root node properties:
 	- compatible = "hisilicon,hi3798cv200";
-- 
2.10.2

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#1666424 — [PATCH v4 19/20] arm64: dts: hi3660: add sd/sdio device nodes

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:10 +0200
Subject[PATCH v4 19/20] arm64: dts: hi3660: add sd/sdio device nodes
Message-ID<tStkv-5rK-47@gated-at.bofh.it>
In reply to#1666411
From: Li Wei <liwei213@huawei.com>

Add sd/sdio device nodes for hi3660 soc

Signed-off-by: Li Wei <liwei213@huawei.com>
Signed-off-by: Chen Jun <chenjun14@huawei.com>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts |  8 ++++
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi         | 58 +++++++++++++++++++++++
 2 files changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index e579333..cec0b60 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -18,6 +18,8 @@
 	compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
 
 	aliases {
+		mshc1 = &dwmmc1;
+		mshc2 = &dwmmc2;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -200,3 +202,9 @@
 	label = "HS-SPI1";
 	status = "okay";
 };
+
+&dwmmc1 {
+	vmmc-supply = <&ldo16>;
+	vqmmc-supply = <&ldo9>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 529cf08..f7ff593 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -786,5 +786,63 @@
 			reset-gpios = <&gpio11 1 0 >;
 			status = "ok";
 		};
+
+		/* SD */
+		dwmmc1: dwmmc1@ff37f000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cd-inverted;
+			compatible = "hisilicon,hi3660-dw-mshc";
+			num-slots = <1>;
+			bus-width = <0x4>;
+			disable-wp;
+			cap-sd-highspeed;
+			supports-highspeed;
+			card-detect-delay = <200>;
+			reg = <0x0 0xff37f000 0x0 0x1000>;
+			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_SD>,
+				<&crg_ctrl HI3660_HCLK_GATE_SD>;
+			clock-names = "ciu", "biu";
+			clock-frequency = <3200000>;
+			resets = <&crg_rst 0x94 18>;
+			cd-gpios = <&gpio25 3 0>;
+			hisilicon,peripheral-syscon = <&sctrl>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&sd_pmx_func
+				     &sd_clk_cfg_func
+				     &sd_cfg_func>;
+			sd-uhs-sdr12;
+			sd-uhs-sdr25;
+			sd-uhs-sdr50;
+			sd-uhs-sdr104;
+			status = "disabled";
+
+			slot@0 {
+				reg = <0x0>;
+				bus-width = <4>;
+				disable-wp;
+			};
+		};
+
+		/* SDIO */
+		dwmmc2: dwmmc2@ff3ff000 {
+			compatible = "hisilicon,hi3660-dw-mshc";
+			reg = <0x0 0xff3ff000 0x0 0x1000>;
+			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+			num-slots = <1>;
+			clocks = <&crg_ctrl HI3660_CLK_GATE_SDIO0>,
+				 <&crg_ctrl HI3660_HCLK_GATE_SDIO0>;
+			clock-names = "ciu", "biu";
+			resets = <&crg_rst 0x94 20>;
+			card-detect-delay = <200>;
+			supports-highspeed;
+			keep-power-in-suspend;
+			pinctrl-names = "default";
+			pinctrl-0 = <&sdio_pmx_func
+				     &sdio_clk_cfg_func
+				     &sdio_cfg_func>;
+			status = "disabled";
+		};
 	};
 };
-- 
2.10.2

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#1666426 — [PATCH v4 09/20] arm64: dts: hi3660: Add pl031 rtc node

FromGuodong Xu <guodong.xu@linaro.org>
Date2017-06-15 05:20 +0200
Subject[PATCH v4 09/20] arm64: dts: hi3660: Add pl031 rtc node
Message-ID<tStu9-5uX-1@gated-at.bofh.it>
In reply to#1666411
From: Chen Feng <puck.chen@hisilicon.com>

Add dts node to enable pl031 rtc.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 7a90c92..3b2a3a7 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -326,6 +326,14 @@
 			status = "disabled";
 		};
 
+		rtc0: rtc@fff04000 {
+			compatible = "arm,pl031", "arm,primecell";
+			reg = <0x0 0Xfff04000 0x0 0x1000>;
+			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&crg_ctrl HI3660_PCLK>;
+			clock-names = "apb_pclk";
+		};
+
 		gpio0: gpio@e8a0b000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0 0xe8a0b000 0 0x1000>;
-- 
2.10.2

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#1667213

FromWei Xu <xuwei5@hisilicon.com>
Date2017-06-15 22:00 +0200
Message-ID<tSJ5T-6JI-13@gated-at.bofh.it>
In reply to#1666411
Hi Guodong,

On 2017/6/15 4:03, Guodong Xu wrote:
> This patchset adds various devices nodes for hi3660 and hikey960.
> 
> HiKey960 is one of 96boards. For details information about it, please
> refer to [1].
> 
> In v4, I removed cpuidle patch
> * (v3-0014-arm64-dts-hi3660-enable-idle-states.patch)
>   , since we are not sure yet whether the corresponding driver can get
>   into mainline. Sorry about the noise.
> * Other patches are not changed.
> 
> In v3,
> * nothing is changed for patches already exists in v2.
> * added 9 more dts patches. Most of them already were reviewed with their
>     corresponding driver patchset. For purpose of easy integration for
>     platform maintainer, I copied them here, including threads [2], [3],
>     and [4].
> * four patches, this is the first time they are sent out for review.
> v3-0014-arm64-dts-hi3660-enable-idle-states.patch
> v3-0019-dt-bindings-mmc-dw_mmc-k3-add-document-of-hi3660-.patch
> v3-0020-arm64-dts-hi3660-add-sd-sdio-device-nodes.patch
> v3-0021-arm64-dts-hi3660-hikey960-add-nodes-for-WiFi.patch
>     mmc driver is under review in [5].
> 
> In v2, incorporated review comments from Rob Herring <robh@kernel.org>
> * uart4: max-speed should be in slave device bluetooth node
> * LEDs:	- bt_active triggered by 'hci0-power'
> 	- move out of SoC level
> * pinctrl: update dts to use #pinctrl-cells
> * uart: add pinctrl information into uart nodes; add label strings.
> * chosen: update stdout-path. serial6 is used.
> * i2c: add label strings. change reg address to lower case.
> * remove unnecessary status="ok"
> * gpio-keys: move out of SoC level.
> 
> [1] https://github.com/96boards/documentation/tree/master/ConsumerEdition/HiKey960
> [2] sp804 timer: https://www.spinics.net/lists/kernel/msg2513025.html
> [3] PCIe: https://www.spinics.net/lists/kernel/msg2520677.html
> [4] mfd and regulator: https://www.spinics.net/lists/arm-kernel/msg586147.html
> [5] mmc: https://patchwork.kernel.org/patch/9783273/
> 
> Chen Feng (2):
>   arm64: dts: hi3660: Add uarts nodes
>   arm64: dts: hi3660: Add pl031 rtc node
> 
> Chen Jun (1):
>   arm64: dts: hi3660: add power key dts node
> 
> Guodong Xu (7):
>   dt-bindings: arm: hisilicon: add bindings for HiKey960 board
>   arm64: dts: hisilicon: update compatible string for hikey960
>   arm64: dts: hikey960: add WL1837 Bluetooth device node
>   arm64: dts: hikey960: add LED nodes
>   dt-bindings: mfd: hi6421: Add hi6421v530 compatible string
>   dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc
>   arm64: dts: hi3660-hikey960: add nodes for WiFi
> 
> Leo Yan (1):
>   arm64: dts: hi3660: add sp804 timer node
> 
> Li Wei (1):
>   arm64: dts: hi3660: add sd/sdio device nodes
> 
> Wang Xiaoyin (4):
>   arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig
>   arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC
>   arm64: dts: hi3660: add spi device nodes
>   arm64: dts: hikey960: add device node for pmic and regulators
> 
> Xiaowei Song (2):
>   dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs
>   arm64: dts: hisi: add kirin pcie node
> 
> Zhangfei Gao (2):
>   arm64: dts: hi3660: add resources for clock and reset
>   arm64: dts: Add I2C nodes for Hi3660
> 
>  .../bindings/arm/hisilicon/hisilicon.txt           |   4 +
>  Documentation/devicetree/bindings/mfd/hi6421.txt   |   4 +-
>  .../devicetree/bindings/mmc/k3-dw-mshc.txt         |   1 +
>  .../devicetree/bindings/pci/kirin-pcie.txt         |  50 ++
>  arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts  | 217 +++++-
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi          | 702 ++++++++++++++++++-
>  .../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi | 778 +++++++++++++++++++--
>  7 files changed, 1681 insertions(+), 75 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt
> 

Series applied to hisilicon arm64 dt tree.
Thanks!

BR,
Wei

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