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[PATCH v3 0/6] irqchip: meson: add support for the gpio interrupt controller

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  [PATCH v3 0/6] irqchip: meson: add support for the gpio interrupt controller Jerome Brunet <jbrunet@baylibre.com> - 2017-06-15 18:20 +0200
    [PATCH v3 4/6] ARM64: meson: enable MESON_IRQ_GPIO in Kconfig Jerome Brunet <jbrunet@baylibre.com> - 2017-06-15 18:20 +0200
    [PATCH v3 6/6] ARM64: dts: meson-gx: add gpio interrupt controller Jerome Brunet <jbrunet@baylibre.com> - 2017-06-15 18:20 +0200
    Re: [PATCH v3 0/6] irqchip: meson: add support for the gpio interrupt  controller Marc Zyngier <marc.zyngier@arm.com> - 2017-06-16 10:50 +0200
      Re: [PATCH v3 0/6] irqchip: meson: add support for the gpio  interrupt controller Jerome Brunet <jbrunet@baylibre.com> - 2017-06-16 12:30 +0200

#1666840 — [PATCH v3 0/6] irqchip: meson: add support for the gpio interrupt controller

This patch series adds support for the GPIO interrupt controller found on
Amlogic's meson SoC families.

Unlike what the name suggests, this controller is not part of the SoC
GPIO subsystem. It is a separate controller from which can watch almost
all pads of the SoC and generate and interrupt from it. Some pins, which
are not part of the public datasheet, don't seem to have this capability
though.

Hardware wise, the controller is a 256 to 8 router with filtering block
to select edge or level input and the polarity of the signal.  As there
we can't setup the filtring to generate a signal on both the high and low
polarity, there is no easy way to support IRQ_TYPE_EDGE_BOTH at the
moment

The number of interrupt line routed to the controller depends on the SoC,
and essentially the number of GPIO available on the SoC.

This series has been tested on Amlogic S905-P200 board with the front
panel power button.

This work is derived from the previous work of Carlo Caione [1].

Changes since RFC : [2]
* Remove interrupt property in device tree: the controller cannot generate
  interrupts on its own and is merely routing the interrupt to the GIC,
  therefore it should not use the interrupt property. This data is now
  stored directly in the driver, same as the pinctrl data.
* Improve compatibility checking of meson pinctrl on its interrupt
  parent to activate gpio_to_irq callback
* Drop IRQ_BOTH hack. Need more work to have an acceptable solution for
  this

Changes since v1 : [3]
* Correct mistake in patch 4 when no compatible
  controller is found. Sorry for the inconvenience.

Changes since v2: [4]
* Address Marc's comment on the irqchip driver from v2
* Drop all gpio subsystem related patches. Discussion regarding
  the issue faced will be initiated.

[1] : https://lkml.kernel.org/r/1448987062-31225-1-git-send-email-carlo@caione.org
[2] : https://lkml.kernel.org/r/1475593708-10526-1-git-send-email-jbrunet@baylibre.com
[3] : https://lkml.kernel.org/r/1476871709-8359-1-git-send-email-jbrunet@baylibre.com
[4] : https://lkml.kernel.org/r/1476890480-8884-1-git-send-email-jbrunet@baylibre.com

Jerome Brunet (6):
  dt-bindings: interrupt-controller: add DT binding for meson GPIO
    interrupt controller
  irqchip: meson: add support for gpio interrupt controller
  ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b
  ARM64: meson: enable MESON_IRQ_GPIO in Kconfig
  ARM: dts: meson8b: enable gpio interrupt controller
  ARM64: dts: meson-gx: add gpio interrupt controller

 .../amlogic,meson-gpio-intc.txt                    |  35 ++
 arch/arm/boot/dts/meson.dtsi                       |   9 +
 arch/arm/boot/dts/meson8b.dtsi                     |   6 +
 arch/arm/mach-meson/Kconfig                        |   1 +
 arch/arm64/Kconfig.platforms                       |   1 +
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi          |   9 +
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi        |   6 +
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi         |   6 +
 drivers/irqchip/Kconfig                            |   8 +
 drivers/irqchip/Makefile                           |   1 +
 drivers/irqchip/irq-meson-gpio.c                   | 407 +++++++++++++++++++++
 11 files changed, 489 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt
 create mode 100644 drivers/irqchip/irq-meson-gpio.c

-- 
2.9.4

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#1666841 — [PATCH v3 4/6] ARM64: meson: enable MESON_IRQ_GPIO in Kconfig

select MESON_IRQ_GPIO in Kconfig for Amlogic's meson SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 arch/arm64/Kconfig.platforms | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 73272f43ca01..3906472fae16 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -98,6 +98,7 @@ config ARCH_MESON
 	select PINCTRL_MESON
 	select COMMON_CLK_AMLOGIC
 	select COMMON_CLK_GXBB
+	select MESON_IRQ_GPIO
 	help
 	  This enables support for the Amlogic S905 SoCs.
 
-- 
2.9.4

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#1666844 — [PATCH v3 6/6] ARM64: dts: meson-gx: add gpio interrupt controller

Add gpio interrupt controller to Amlogic GX family SoCs

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 9 +++++++++
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 ++++++
 arch/arm64/boot/dts/amlogic/meson-gxl.dtsi  | 6 ++++++
 3 files changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 603491df9f0f..95d4f4c60b4f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -218,6 +218,15 @@
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
 
+			gpio_intc: interrupt-controller@9880 {
+				compatible = "amlogic,meson-gpio-intc";
+				reg = <0x0 0x9880 0x0 0x10>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				amlogic,upstream-interrupts = <64 65 66 67 68 69 70 71>;
+				status = "disabled";
+			};
+
 			reset: reset-controller@4404 {
 				compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
 				reg = <0x0 0x04404 0x0 0x20>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index dbd300fffa8a..b6f3561c803c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -314,6 +314,12 @@
 	clock-names = "stmmaceth", "clkin0", "clkin1";
 };
 
+&gpio_intc {
+	compatible = "amlogic,meson-gpio-intc",
+		     "amlogic,meson-gxbb-gpio-intc";
+	status = "okay";
+};
+
 &hdmi_tx {
 	compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
 	resets = <&reset RESET_HDMITX_CAPB3>,
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index 4dfc22b07bf0..08268cedd965 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -207,6 +207,12 @@
 	};
 };
 
+&gpio_intc {
+	compatible = "amlogic,meson-gpio-intc",
+		     "amlogic,meson-gxl-gpio-intc";
+	status = "okay";
+};
+
 &hdmi_tx {
 	compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
 	resets = <&reset RESET_HDMITX_CAPB3>,
-- 
2.9.4

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#1667532 — Re: [PATCH v3 0/6] irqchip: meson: add support for the gpio interrupt controller

On 15/06/17 17:17, Jerome Brunet wrote:
> This patch series adds support for the GPIO interrupt controller found on
> Amlogic's meson SoC families.
> 
> Unlike what the name suggests, this controller is not part of the SoC
> GPIO subsystem. It is a separate controller from which can watch almost
> all pads of the SoC and generate and interrupt from it. Some pins, which
> are not part of the public datasheet, don't seem to have this capability
> though.
> 
> Hardware wise, the controller is a 256 to 8 router with filtering block
> to select edge or level input and the polarity of the signal.  As there
> we can't setup the filtring to generate a signal on both the high and low
> polarity, there is no easy way to support IRQ_TYPE_EDGE_BOTH at the
> moment
> 
> The number of interrupt line routed to the controller depends on the SoC,
> and essentially the number of GPIO available on the SoC.
> 
> This series has been tested on Amlogic S905-P200 board with the front
> panel power button.
> 
> This work is derived from the previous work of Carlo Caione [1].

[...]

So we have two competing series, all based on the same stuff. I must say
this is rather disappointing that people can't manage to collaborate and
work towards a common goal.

I'm going to review the irqchip part, because I've done that on Heiner's
series as well, but that's where I'm going to stop.

Heiner, Jerome: please sort this out between yourselves *BEFORE* sending
any other patch series. This is wasting everybody's time, both yours and
mine (and frankly, this a rather rare commodity these days).

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

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#1667621 — Re: [PATCH v3 0/6] irqchip: meson: add support for the gpio interrupt controller

On Fri, 2017-06-16 at 09:46 +0100, Marc Zyngier wrote:
> On 15/06/17 17:17, Jerome Brunet wrote:
> > This patch series adds support for the GPIO interrupt controller found on
> > Amlogic's meson SoC families.
> > 
> > Unlike what the name suggests, this controller is not part of the SoC
> > GPIO subsystem. It is a separate controller from which can watch almost
> > all pads of the SoC and generate and interrupt from it. Some pins, which
> > are not part of the public datasheet, don't seem to have this capability
> > though.
> > 
> > Hardware wise, the controller is a 256 to 8 router with filtering block
> > to select edge or level input and the polarity of the signal.  As there
> > we can't setup the filtring to generate a signal on both the high and low
> > polarity, there is no easy way to support IRQ_TYPE_EDGE_BOTH at the
> > moment
> > 
> > The number of interrupt line routed to the controller depends on the SoC,
> > and essentially the number of GPIO available on the SoC.
> > 
> > This series has been tested on Amlogic S905-P200 board with the front
> > panel power button.
> > 
> > This work is derived from the previous work of Carlo Caione [1].
> 
> [...]
> 
> So we have two competing series, all based on the same stuff. I must say
> this is rather disappointing that people can't manage to collaborate and
> work towards a common goal.
> 
> I'm going to review the irqchip part, because I've done that on Heiner's
> series as well, but that's where I'm going to stop.
> 
> Heiner, Jerome: please sort this out between yourselves *BEFORE* sending
> any other patch series. This is wasting everybody's time, both yours and
> mine (and frankly, this a rather rare commodity these days).

I really don't enjoy doing things that way, and I understand the feeling.

I also spent a lot of time reviewing Heiner's patches, only to see comments
repeatedly ignored. You know well how time consuming those reviews are. 

After 7 versions, some comments have been taken into account, some are still
completely ignored, even with Kevin and Neil's warnings. I wouldn't have posted
a competing if things were not stuck.

Like you, I have things far more interesting to do than duplicating efforts, and
I sincerely hope better collaboration can be achieved.

Anyway, thanks for your time and sorry for the mess. 

Cheers
Jerome

> 
> Thanks,
> 
> 	M.

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