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Groups > linux.kernel > #1665289 > unrolled thread
| Started by | Salil Mehta <salil.mehta@huawei.com> |
|---|---|
| First post | 2017-06-14 01:20 +0200 |
| Last post | 2017-06-19 17:50 +0200 |
| Articles | 4 — 2 participants |
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[PATCH V2 net-next 0/8] Hisilicon Network Subsystem 3 Ethernet Driver Salil Mehta <salil.mehta@huawei.com> - 2017-06-14 01:20 +0200
Re: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC Stephen Hemminger <stephen@networkplumber.org> - 2017-06-14 02:00 +0200
RE: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC Salil Mehta <salil.mehta@huawei.com> - 2017-06-17 12:50 +0200
Re: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC Stephen Hemminger <stephen@networkplumber.org> - 2017-06-19 17:50 +0200
| From | Salil Mehta <salil.mehta@huawei.com> |
|---|---|
| Date | 2017-06-14 01:20 +0200 |
| Subject | [PATCH V2 net-next 0/8] Hisilicon Network Subsystem 3 Ethernet Driver |
| Message-ID | <tS3gl-5Od-5@gated-at.bofh.it> |
This patch-set contains the support of the HNS3 (Hisilicon Network Subsystem 3)
Ethernet driver for hip08 family of SoCs and future upcoming SoCs.
Hisilicon's new hip08 SoCs have integrated ethernet based on PCI Express and
hence there was a need of new driver over the previous HNS driver which is
already part of the Linux mainline. This new driver is NOT backward
compatible with HNS.
This current driver is meant to control the Physical Function and there would
soon be a support of a separate driver for Virtual Function once this base PF
driver has been accepted. Also, this driver is the ongoing development work and
HNS3 Ethernet driver would be incrementally enhanced with more new features.
High Level Architecture:
[ Ethtool ]
^ |
| |
[Ethernet Client] [RoCE Client] . . . [ Ethernet Client ]
--------------------------------------------- |
| |
[ HNAE3 Framework (Register/unregister) ] |
| |
--------------------------------------------- |
[ HNAE Device ] |
| |
[ HCLGE Layer] |
________________|_________________ |
| | | |
[ MDIO ] [ Scheduler/Shaper ] [ Debugfs ] |
| | | |
|________________|_________________| |
| |
[ IMP command Interface ] |
--------------------------------------------- |
HIP08 H A R D W A R E *
Current patch-set broadly adds the support of the following PF functionality:
1. Basic Rx and Tx functionality
2. TSO support
3. Ethtool support
4. Debugfs support
5. HNAE framework and hardware compatability layer
6. Scheduler and Shaper support in transmit function
7. MDIO support
Change Log:
V1->V2: Addressed some comments by kbuild, Yuval MIntz, Andrew Lunn &
Florian Fainelli in the following patches:
* Add support of HNS3 Ethernet Driver for hip08 SoC
* Add MDIO support to HNS3 Ethernet driver for hip08 SoC
* Add support of debugfs interface to HNS3 driver
Salil Mehta (8):
net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC
net: hns3: Add support of the HNAE3 framework
net: hns3: Add HNS3 IMP(Integrated Mgmt Proc) Cmd Interface Support
net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support
net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver
net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC
net: hns3: Add Ethtool support to HNS3 driver
net: hns3: Add HNS3 driver to kernel build framework & MAINTAINERS
MAINTAINERS | 8 +
drivers/net/ethernet/hisilicon/Kconfig | 24 +
drivers/net/ethernet/hisilicon/Makefile | 1 +
drivers/net/ethernet/hisilicon/hns3/Makefile | 7 +
drivers/net/ethernet/hisilicon/hns3/hnae3.c | 305 ++
drivers/net/ethernet/hisilicon/hns3/hnae3.h | 449 +++
.../net/ethernet/hisilicon/hns3/hns3pf/Makefile | 11 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c | 347 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 743 ++++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 4255 ++++++++++++++++++++
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 495 +++
.../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c | 295 ++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 1018 +++++
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 108 +
.../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 2842 +++++++++++++
.../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h | 585 +++
.../ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c | 894 ++++
17 files changed, 12387 insertions(+)
create mode 100644 drivers/net/ethernet/hisilicon/hns3/Makefile
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.h
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.h
create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_ethtool.c
--
2.7.4
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| From | Stephen Hemminger <stephen@networkplumber.org> |
|---|---|
| Date | 2017-06-14 02:00 +0200 |
| Subject | Re: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC |
| Message-ID | <tS3T3-62O-7@gated-at.bofh.it> |
| In reply to | #1665289 |
On Wed, 14 Jun 2017 00:10:28 +0100
Salil Mehta <salil.mehta@huawei.com> wrote:
> +static irqreturn_t hns3_irq_handle(int irq, void *dev)
> +{
> + struct hns3_enet_tqp_vector *tqp_vector = dev;
> +
> + napi_schedule(&tqp_vector->napi);
In order to do NAPI correctly, the IRQ must be disabled.
If you are using MSI, then hardware will do it for you.
But I don't see you ever enable MSI or MSI-x in this driver.
Are you just assuming that the driver only works on one platform
and that platform has PCI MSI-X?
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| From | Salil Mehta <salil.mehta@huawei.com> |
|---|---|
| Date | 2017-06-17 12:50 +0200 |
| Subject | RE: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC |
| Message-ID | <tTjsJ-5VA-9@gated-at.bofh.it> |
| In reply to | #1665307 |
Hi Stephen
> -----Original Message-----
> From: Stephen Hemminger [mailto:stephen@networkplumber.org]
> Sent: Wednesday, June 14, 2017 12:53 AM
> To: Salil Mehta
> Cc: davem@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil.lnk@gmail.com; netdev@vger.kernel.org; linux-
> kernel@vger.kernel.org; Linuxarm
> Subject: Re: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3
> Ethernet Driver for hip08 SoC
>
> On Wed, 14 Jun 2017 00:10:28 +0100
> Salil Mehta <salil.mehta@huawei.com> wrote:
>
> > +static irqreturn_t hns3_irq_handle(int irq, void *dev)
> > +{
> > + struct hns3_enet_tqp_vector *tqp_vector = dev;
> > +
> > + napi_schedule(&tqp_vector->napi);
>
> In order to do NAPI correctly, the IRQ must be disabled.
> If you are using MSI, then hardware will do it for you.
Yes, you are correct. They get auto disabled in our case.
>
> But I don't see you ever enable MSI or MSI-x in this driver.
We are enabling them again in common poll:
static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
{
struct hns3_enet_ring *ring;
int rx_pkt_total = 0;
[....]
hns3_mask_vector_irq(tqp_vector, 1);---> this re-enables the interrupts on NIC.
return rx_pkt_total;
}
> Are you just assuming that the driver only works on one platform
> and that platform has PCI MSI-X?
We support both MSI and MSI-X. Hope I answered this completely?
Best regards
Salil
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| From | Stephen Hemminger <stephen@networkplumber.org> |
|---|---|
| Date | 2017-06-19 17:50 +0200 |
| Subject | Re: [PATCH V2 net-next 1/8] net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC |
| Message-ID | <tU769-4xl-1@gated-at.bofh.it> |
| In reply to | #1665289 |
On Wed, 14 Jun 2017 00:10:28 +0100
Salil Mehta <salil.mehta@huawei.com> wrote:
> +hns3_nic_get_stats64(struct net_device *ndev, struct rtnl_link_stats64 *stats)
> +{
> + struct hns3_nic_priv *priv = netdev_priv(ndev);
> + int queue_num = priv->ae_handle->kinfo.num_tqps;
> + u64 tx_bytes = 0;
> + u64 rx_bytes = 0;
> + u64 tx_pkts = 0;
> + u64 rx_pkts = 0;
> + int idx = 0;
unnecessary initialization
> +
> + for (idx = 0; idx < queue_num; idx++) {
> + tx_bytes += priv->ring_data[idx].ring->stats.tx_bytes;
> + tx_pkts += priv->ring_data[idx].ring->stats.tx_pkts;
> + rx_bytes +=
> + priv->ring_data[idx + queue_num].ring->stats.rx_bytes;
> + rx_pkts += priv->ring_data[idx + queue_num].ring->stats.rx_pkts;
> + }
> +
Since rx_bytes and other statistics are 64 bit values. You need to use
something to ensure that updates to these values are atomic on 32 bit
platforms. The most common way to handle this is with the u64_stats_sync
mechanism which is a nop on 64 bit architectures, and uses a seqcount
to do updates on 32 bit CPU's.
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