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| Started by | "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> |
|---|---|
| First post | 2017-06-13 07:00 +0200 |
| Last post | 2017-06-14 00:00 +0200 |
| Articles | 2 — 2 participants |
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Re: [RFC PATCH 1/7 v1]powerpc: Free up four PTE bits to accommodate memory keys "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> - 2017-06-13 07:00 +0200
Re: [RFC PATCH 1/7 v1]powerpc: Free up four PTE bits to accommodate memory keys Ram Pai <linuxram@us.ibm.com> - 2017-06-14 00:00 +0200
| From | "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> |
|---|---|
| Date | 2017-06-13 07:00 +0200 |
| Subject | Re: [RFC PATCH 1/7 v1]powerpc: Free up four PTE bits to accommodate memory keys |
| Message-ID | <tRM5P-3sH-3@gated-at.bofh.it> |
Ram Pai <linuxram@us.ibm.com> writes: > Rearrange PTE bits to free up bits 3, 4, 5 and 6 for > memory keys. Bit 3, 4, 5, 6 and 57 shall be used for memory > keys. > > The patch does the following change to the 64K PTE format > > H_PAGE_BUSY moves from bit 3 to bit 7 > H_PAGE_F_SECOND which occupied bit 4 moves to the second part > of the pte. > H_PAGE_F_GIX which occupied bit 5, 6 and 7 also moves to the > second part of the pte. > > The second part of the PTE will hold > a (H_PAGE_F_SECOND|H_PAGE_F_GIX) for 64K page backed pte, > and sixteen (H_PAGE_F_SECOND|H_PAGE_F_GIX) for 4k backed > pte. > > the four bits((H_PAGE_F_SECOND|H_PAGE_F_GIX) that represent a slot > is initialized to 0xF indicating a invalid slot. if a hashpage does > get allocated to the 0xF slot, it is released and not used. In > other words, even though 0xF is a valid slot we discard it and > consider it as invalid slot(HPTE_SOFT_INVALID). This gives us an > opportunity to not depend on a bit in the primary PTE in order to > determine the validity of a slot. > > When we release a 0xF slot we also release a legitimate primary > slot and unmap that entry. This is to ensure that we do get > a legimate non-0xF slot the next time we retry for a slot. > > Though treating 0xF slot as invalid reduces the number of available > slots and make have a effect on the performance, the probabilty > of hitting a 0xF is extermely low. > > Compared to the current scheme, the above described scheme reduces > the number of false hash table updates significantly and has the > added advantage of releasing four valuable PTE bits for other > purpose. > > This idea was jointly developed by Paul Mackerras, Aneesh, Michael > Ellermen and myself. > > 4K PTE format remain unchanged currently. > Can you also split this patch into two. One which changes __hash_page_4k() ie, linux pte format w.r.t 4k hash pte. Second patch with changes w.r.t __hash_page_64k() ie, pte format w.r.t 64k hash pte. -aneesh
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| From | Ram Pai <linuxram@us.ibm.com> |
|---|---|
| Date | 2017-06-14 00:00 +0200 |
| Subject | Re: [RFC PATCH 1/7 v1]powerpc: Free up four PTE bits to accommodate memory keys |
| Message-ID | <tS20V-4RM-11@gated-at.bofh.it> |
| In reply to | #1664414 |
On Tue, Jun 13, 2017 at 10:22:43AM +0530, Aneesh Kumar K.V wrote: > Ram Pai <linuxram@us.ibm.com> writes: > > > Rearrange PTE bits to free up bits 3, 4, 5 and 6 for > > memory keys. Bit 3, 4, 5, 6 and 57 shall be used for memory > > keys. > > > > The patch does the following change to the 64K PTE format > > > > H_PAGE_BUSY moves from bit 3 to bit 7 > > H_PAGE_F_SECOND which occupied bit 4 moves to the second part > > of the pte. > > H_PAGE_F_GIX which occupied bit 5, 6 and 7 also moves to the > > second part of the pte. > > > > The second part of the PTE will hold > > a (H_PAGE_F_SECOND|H_PAGE_F_GIX) for 64K page backed pte, > > and sixteen (H_PAGE_F_SECOND|H_PAGE_F_GIX) for 4k backed > > pte. > > > > the four bits((H_PAGE_F_SECOND|H_PAGE_F_GIX) that represent a slot > > is initialized to 0xF indicating a invalid slot. if a hashpage does > > get allocated to the 0xF slot, it is released and not used. In > > other words, even though 0xF is a valid slot we discard it and > > consider it as invalid slot(HPTE_SOFT_INVALID). This gives us an > > opportunity to not depend on a bit in the primary PTE in order to > > determine the validity of a slot. > > > > When we release a 0xF slot we also release a legitimate primary > > slot and unmap that entry. This is to ensure that we do get > > a legimate non-0xF slot the next time we retry for a slot. > > > > Though treating 0xF slot as invalid reduces the number of available > > slots and make have a effect on the performance, the probabilty > > of hitting a 0xF is extermely low. > > > > Compared to the current scheme, the above described scheme reduces > > the number of false hash table updates significantly and has the > > added advantage of releasing four valuable PTE bits for other > > purpose. > > > > This idea was jointly developed by Paul Mackerras, Aneesh, Michael > > Ellermen and myself. > > > > 4K PTE format remain unchanged currently. > > > > Can you also split this patch into two. One which changes > __hash_page_4k() ie, linux pte format w.r.t 4k hash pte. Second patch > with changes w.r.t __hash_page_64k() ie, pte format w.r.t 64k hash pte. ok. A v2 version of the patch series will be out in a day or two. RP
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