Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1660955 > unrolled thread
| Started by | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
|---|---|
| First post | 2017-06-08 11:00 +0200 |
| Last post | 2017-06-09 08:10 +0200 |
| Articles | 2 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [PATCH v7 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> - 2017-06-08 11:00 +0200
Re: [PATCH v7 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha Akula <geethasowjanya.akula@gmail.com> - 2017-06-09 08:10 +0200
| From | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
|---|---|
| Date | 2017-06-08 11:00 +0200 |
| Subject | Re: [PATCH v7 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model |
| Message-ID | <tQ1sm-1Y6-9@gated-at.bofh.it> |
On Tue, May 30, 2017 at 05:33:39PM +0530, Geetha sowjanya wrote:
> From: Linu Cherian <linu.cherian@cavium.com>
>
> Cavium ThunderX2 implementation doesn't support second page in SMMU
> register space. Hence, resource size is set as 64k for this model.
>
> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
> ---
> drivers/acpi/arm64/iort.c | 10 +++++++++-
> 1 files changed, 9 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
> index c5fecf9..bba2b59 100644
> --- a/drivers/acpi/arm64/iort.c
> +++ b/drivers/acpi/arm64/iort.c
> @@ -833,12 +833,20 @@ static void __init arm_smmu_v3_init_resources(struct resource *res,
> {
> struct acpi_iort_smmu_v3 *smmu;
> int num_res = 0;
> + unsigned long size = SZ_128K;
>
> /* Retrieve SMMUv3 specific data */
> smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
>
> + /*
> + * Override the size, for Cavium ThunderX2 implementation
> + * which doesn't support the page 1 SMMU register space.
> + */
> + if (smmu->model == ACPI_IORT_SMMU_CAVIUM_CN99XX)
> + size = SZ_64K;
Nit: add a function, say arm_smmu_v3_resource_size() with the logic
above that by default returns SZ_128K, I do not like this switch
in the middle of this function.
Lorenzo
> +
> res[num_res].start = smmu->base_address;
> - res[num_res].end = smmu->base_address + SZ_128K - 1;
> + res[num_res].end = smmu->base_address + size - 1;
> res[num_res].flags = IORESOURCE_MEM;
>
> num_res++;
> --
> 1.7.1
>
[toc] | [next] | [standalone]
| From | Geetha Akula <geethasowjanya.akula@gmail.com> |
|---|---|
| Date | 2017-06-09 08:10 +0200 |
| Message-ID | <tQlhn-6l3-3@gated-at.bofh.it> |
| In reply to | #1660955 |
On Thu, Jun 8, 2017 at 2:28 PM, Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
> On Tue, May 30, 2017 at 05:33:39PM +0530, Geetha sowjanya wrote:
>> From: Linu Cherian <linu.cherian@cavium.com>
>>
>> Cavium ThunderX2 implementation doesn't support second page in SMMU
>> register space. Hence, resource size is set as 64k for this model.
>>
>> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
>> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>> ---
>> drivers/acpi/arm64/iort.c | 10 +++++++++-
>> 1 files changed, 9 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
>> index c5fecf9..bba2b59 100644
>> --- a/drivers/acpi/arm64/iort.c
>> +++ b/drivers/acpi/arm64/iort.c
>> @@ -833,12 +833,20 @@ static void __init arm_smmu_v3_init_resources(struct resource *res,
>> {
>> struct acpi_iort_smmu_v3 *smmu;
>> int num_res = 0;
>> + unsigned long size = SZ_128K;
>>
>> /* Retrieve SMMUv3 specific data */
>> smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
>>
>> + /*
>> + * Override the size, for Cavium ThunderX2 implementation
>> + * which doesn't support the page 1 SMMU register space.
>> + */
>> + if (smmu->model == ACPI_IORT_SMMU_CAVIUM_CN99XX)
>> + size = SZ_64K;
>
> Nit: add a function, say arm_smmu_v3_resource_size() with the logic
> above that by default returns SZ_128K, I do not like this switch
> in the middle of this function.
I will resubmit the patch with suggested changes.
Thanks,
Geetha.
>
> Lorenzo
>
>> +
>> res[num_res].start = smmu->base_address;
>> - res[num_res].end = smmu->base_address + SZ_128K - 1;
>> + res[num_res].end = smmu->base_address + size - 1;
>> res[num_res].flags = IORESOURCE_MEM;
>>
>> num_res++;
>> --
>> 1.7.1
>>
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web