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| Started by | Chris Packham <chris.packham@alliedtelesis.co.nz> |
|---|---|
| First post | 2017-06-08 06:20 +0200 |
| Last post | 2017-06-08 06:20 +0200 |
| Articles | 1 — 1 participant |
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[RFC PATCH 2/4] ARM: l2x0: support parity-enable/disable on aurora Chris Packham <chris.packham@alliedtelesis.co.nz> - 2017-06-08 06:20 +0200
| From | Chris Packham <chris.packham@alliedtelesis.co.nz> |
|---|---|
| Date | 2017-06-08 06:20 +0200 |
| Subject | [RFC PATCH 2/4] ARM: l2x0: support parity-enable/disable on aurora |
| Message-ID | <tPX5o-7J4-9@gated-at.bofh.it> |
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
arch/arm/mm/cache-l2x0.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 808efbb89b88..2cc2653b046f 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1505,6 +1505,13 @@ static void __init aurora_of_parse(const struct device_node *np,
mask |= AURORA_ACR_FORCE_WRITE_POLICY_MASK;
}
+ if (of_property_read_bool(np, "arm,parity-enable")) {
+ mask |= L2C_AUX_CTRL_PARITY_ENABLE;
+ val |= L2C_AUX_CTRL_PARITY_ENABLE;
+ } else if (of_property_read_bool(np, "arm,parity-disable")) {
+ mask |= L2C_AUX_CTRL_PARITY_ENABLE;
+ }
+
*aux_val &= ~mask;
*aux_val |= val;
*aux_mask &= ~mask;
--
2.13.0
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