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Groups > linux.kernel > #1654898 > unrolled thread
| Started by | Mikko Perttunen <mperttunen@nvidia.com> |
|---|---|
| First post | 2017-06-01 10:10 +0200 |
| Last post | 2017-06-13 14:50 +0200 |
| Articles | 13 — 4 participants |
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[PATCH v2 0/2] Device tree changes for Tegra186 cpufreq Mikko Perttunen <mperttunen@nvidia.com> - 2017-06-01 10:10 +0200
[PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 Mikko Perttunen <mperttunen@nvidia.com> - 2017-06-01 10:10 +0200
Re: [PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 Thierry Reding <thierry.reding@gmail.com> - 2017-06-13 14:50 +0200
[PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Mikko Perttunen <mperttunen@nvidia.com> - 2017-06-01 10:10 +0200
Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Rob Herring <robh@kernel.org> - 2017-06-08 00:20 +0200
Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Mikko Perttunen <cyndis@kapsi.fi> - 2017-06-08 09:40 +0200
Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Rob Herring <robh@kernel.org> - 2017-06-09 23:00 +0200
Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Mikko Perttunen <cyndis@kapsi.fi> - 2017-06-12 10:30 +0200
[PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Mikko Perttunen <mperttunen@nvidia.com> - 2017-06-12 12:30 +0200
Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Mikko Perttunen <cyndis@kapsi.fi> - 2017-06-13 14:50 +0200
Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Thierry Reding <thierry.reding@gmail.com> - 2017-06-13 16:20 +0200
Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Mikko Perttunen <cyndis@kapsi.fi> - 2017-06-13 14:50 +0200
Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Thierry Reding <thierry.reding@gmail.com> - 2017-06-13 14:50 +0200
| From | Mikko Perttunen <mperttunen@nvidia.com> |
|---|---|
| Date | 2017-06-01 10:10 +0200 |
| Subject | [PATCH v2 0/2] Device tree changes for Tegra186 cpufreq |
| Message-ID | <tNtl8-8tU-3@gated-at.bofh.it> |
Hi, these are the device tree and bindings changes for the Tegra186 cpufreq driver that was recently merged. The patches are the same as those that were originally posted with the driver. Mikko Perttunen (2): dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 17 +++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++ 2 files changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt -- 2.1.4
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| From | Mikko Perttunen <mperttunen@nvidia.com> |
|---|---|
| Date | 2017-06-01 10:10 +0200 |
| Subject | [PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 |
| Message-ID | <tNtl8-8tU-17@gated-at.bofh.it> |
| In reply to | #1654898 |
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 3ea5e6369bc3..c023af0be43d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -347,6 +347,13 @@
reg-names = "pmc", "wake", "aotag", "scratch";
};
+ ccplex@e000000 {
+ compatible = "nvidia,tegra186-ccplex-cluster";
+ reg = <0x0 0x0e000000 0x0 0x3fffff>;
+
+ nvidia,bpmp = <&bpmp>;
+ };
+
sysram@30000000 {
compatible = "nvidia,tegra186-sysram", "mmio-sram";
reg = <0x0 0x30000000 0x0 0x50000>;
--
2.1.4
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| From | Thierry Reding <thierry.reding@gmail.com> |
|---|---|
| Date | 2017-06-13 14:50 +0200 |
| Subject | Re: [PATCH v2 2/2] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 |
| Message-ID | <tRTqG-81T-23@gated-at.bofh.it> |
| In reply to | #1654901 |
[Multipart message — attachments visible in raw view] — view raw
On Thu, Jun 01, 2017 at 11:04:05AM +0300, Mikko Perttunen wrote: > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) Applied, thanks. Thierry
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| From | Mikko Perttunen <mperttunen@nvidia.com> |
|---|---|
| Date | 2017-06-01 10:10 +0200 |
| Subject | [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tNtl8-8tU-23@gated-at.bofh.it> |
| In reply to | #1654898 |
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..e8fb416c892b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,17 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+Required properties:
+- compatible: Should contain one of the following:
+ - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the device's MMIO
+ register area
+- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+ ccplex@e000000 {
+ compatible = "nvidia,tegra186-ccplex-cluster";
+ reg = <0x0 0x0e000000 0x0 0x3fffff>,
+
+ nvidia,bpmp = <&bpmp>;
+ };
--
2.1.4
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2017-06-08 00:20 +0200 |
| Subject | Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tPRsZ-47t-3@gated-at.bofh.it> |
| In reply to | #1654902 |
On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote: > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. What the block is should also go in the binding doc. With that, Acked-by: Rob Herring <robh@kernel.org> > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > --- > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
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| From | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| Date | 2017-06-08 09:40 +0200 |
| Subject | Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tQ0cV-1hd-9@gated-at.bofh.it> |
| In reply to | #1660283 |
On 08.06.2017 01:11, Rob Herring wrote: > On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote: >> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >> registers that initiate CPU frequency/voltage transitions. > > What the block is should also go in the binding doc. With that, I don't know how to explain it in more detail; this thing is literally just a few magic registers that route into some CPU control logic to trigger frequency/voltage transitions :) Mikko > > Acked-by: Rob Herring <robh@kernel.org> > >> >> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >> --- >> .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 17 +++++++++++++++++ >> 1 file changed, 17 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt > -- > To unsubscribe from this list: send the line "unsubscribe linux-tegra" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2017-06-09 23:00 +0200 |
| Subject | Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tQzaF-6hr-9@gated-at.bofh.it> |
| In reply to | #1660840 |
On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen <cyndis@kapsi.fi> wrote: > On 08.06.2017 01:11, Rob Herring wrote: >> >> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote: >>> >>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >>> registers that initiate CPU frequency/voltage transitions. >> >> >> What the block is should also go in the binding doc. With that, > > > I don't know how to explain it in more detail; this thing is literally just > a few magic registers that route into some CPU control logic to trigger > frequency/voltage transitions :) Copy the commit msg text to the binding doc. That's all I'm asking for. Rob
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| From | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| Date | 2017-06-12 10:30 +0200 |
| Subject | Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tRsTw-8al-5@gated-at.bofh.it> |
| In reply to | #1662742 |
On 09.06.2017 23:54, Rob Herring wrote: > On Thu, Jun 8, 2017 at 2:32 AM, Mikko Perttunen <cyndis@kapsi.fi> wrote: >> On 08.06.2017 01:11, Rob Herring wrote: >>> >>> On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote: >>>> >>>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >>>> registers that initiate CPU frequency/voltage transitions. >>> >>> >>> What the block is should also go in the binding doc. With that, >> >> >> I don't know how to explain it in more detail; this thing is literally just >> a few magic registers that route into some CPU control logic to trigger >> frequency/voltage transitions :) > > Copy the commit msg text to the binding doc. That's all I'm asking for. > > Rob > I see. Will do, thanks. Mikko
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| From | Mikko Perttunen <mperttunen@nvidia.com> |
|---|---|
| Date | 2017-06-12 12:30 +0200 |
| Subject | [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tRuLD-Ua-13@gated-at.bofh.it> |
| In reply to | #1654902 |
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..0c80cd8ee839
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,20 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
+registers that initiate CPU frequency/voltage transitions.
+
+Required properties:
+- compatible: Should contain one of the following:
+ - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the device's MMIO
+ register area
+- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+ ccplex@e000000 {
+ compatible = "nvidia,tegra186-ccplex-cluster";
+ reg = <0x0 0x0e000000 0x0 0x3fffff>,
+
+ nvidia,bpmp = <&bpmp>;
+ };
--
2.1.4
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| From | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| Date | 2017-06-13 14:50 +0200 |
| Subject | Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tRTqG-81T-5@gated-at.bofh.it> |
| In reply to | #1663403 |
On 13.06.2017 15:46, Mikko Perttunen wrote: > On 13.06.2017 15:42, Thierry Reding wrote: >> On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: >>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >>> registers that initiate CPU frequency/voltage transitions. >>> >>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >>> Acked-by: Rob Herring <robh@kernel.org> >>> --- >>> .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 >>> ++++++++++++++++++++ >>> 1 file changed, 20 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt >>> >> >> The ARM SoC maintainers don't like to pick up device tree bindings, so >> I'd prefer this to go through the cpufreq tree that also contains the >> driver patches. Presumably this wasn't merged through that tree because >> of the missing Acked-by by a device tree maintainer? Given that Rob's >> acked it now, maybe you can resend this to Viresh, who I think had >> picked up the driver? > > Sure, I'll do that. > I guess the .dts change should then also go in that > way? Or I guess not, since you applied it :) Cheers, Mikko > > Mikko > >> >> Thanks, >> Thierry >>
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| From | Thierry Reding <thierry.reding@gmail.com> |
|---|---|
| Date | 2017-06-13 16:20 +0200 |
| Subject | Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tRUPM-zh-9@gated-at.bofh.it> |
| In reply to | #1664805 |
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On Tue, Jun 13, 2017 at 03:47:39PM +0300, Mikko Perttunen wrote: > > > On 13.06.2017 15:46, Mikko Perttunen wrote: > > On 13.06.2017 15:42, Thierry Reding wrote: > > > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: > > > > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > > > > registers that initiate CPU frequency/voltage transitions. > > > > > > > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > > > > Acked-by: Rob Herring <robh@kernel.org> > > > > --- > > > > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 > > > > ++++++++++++++++++++ > > > > 1 file changed, 20 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt > > > > > > > > > > The ARM SoC maintainers don't like to pick up device tree bindings, so > > > I'd prefer this to go through the cpufreq tree that also contains the > > > driver patches. Presumably this wasn't merged through that tree because > > > of the missing Acked-by by a device tree maintainer? Given that Rob's > > > acked it now, maybe you can resend this to Viresh, who I think had > > > picked up the driver? > > > > Sure, I'll do that. > > > I guess the .dts change should then also go in that > > way? > > Or I guess not, since you applied it :) So the rule of thumb is that .dts changes should go through ARM SoC and device tree binding changes should be going through the same tree as the driver changes that implement the binding. Thierry
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| From | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| Date | 2017-06-13 14:50 +0200 |
| Subject | Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tRTqG-81T-9@gated-at.bofh.it> |
| In reply to | #1663403 |
On 13.06.2017 15:42, Thierry Reding wrote: > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: >> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >> registers that initiate CPU frequency/voltage transitions. >> >> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >> Acked-by: Rob Herring <robh@kernel.org> >> --- >> .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt > > The ARM SoC maintainers don't like to pick up device tree bindings, so > I'd prefer this to go through the cpufreq tree that also contains the > driver patches. Presumably this wasn't merged through that tree because > of the missing Acked-by by a device tree maintainer? Given that Rob's > acked it now, maybe you can resend this to Viresh, who I think had > picked up the driver? Sure, I'll do that. I guess the .dts change should then also go in that way? Mikko > > Thanks, > Thierry >
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| From | Thierry Reding <thierry.reding@gmail.com> |
|---|---|
| Date | 2017-06-13 14:50 +0200 |
| Subject | Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster |
| Message-ID | <tRTqG-81T-7@gated-at.bofh.it> |
| In reply to | #1663403 |
[Multipart message — attachments visible in raw view] — view raw
On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt The ARM SoC maintainers don't like to pick up device tree bindings, so I'd prefer this to go through the cpufreq tree that also contains the driver patches. Presumably this wasn't merged through that tree because of the missing Acked-by by a device tree maintainer? Given that Rob's acked it now, maybe you can resend this to Viresh, who I think had picked up the driver? Thanks, Thierry
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