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| Started by | Jerome Brunet <jbrunet@baylibre.com> |
|---|---|
| First post | 2017-06-07 15:40 +0200 |
| Last post | 2017-06-07 15:40 +0200 |
| Articles | 4 — 2 participants |
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[PATCH 0/2] pwm: add pwm AO on meson gx Jerome Brunet <jbrunet@baylibre.com> - 2017-06-07 15:40 +0200
Re: [PATCH 2/2] pwm: meson: add compatible for the gxbb ao pwms Neil Armstrong <narmstrong@baylibre.com> - 2017-06-07 15:40 +0200
[PATCH 1/2] dt-bindings: pwm: meson: add comptabible for gxbb ao pwms Jerome Brunet <jbrunet@baylibre.com> - 2017-06-07 15:40 +0200
[PATCH 2/2] pwm: meson: add compatible for the gxbb ao pwms Jerome Brunet <jbrunet@baylibre.com> - 2017-06-07 15:40 +0200
| From | Jerome Brunet <jbrunet@baylibre.com> |
|---|---|
| Date | 2017-06-07 15:40 +0200 |
| Subject | [PATCH 0/2] pwm: add pwm AO on meson gx |
| Message-ID | <tPJlM-7eC-7@gated-at.bofh.it> |
The pwms found in the AO domain of the meson gx family have different clock sources than the one found in the EE domain. The AO pwms have only 2 connected clock input which are clk81 and the crytal. This patchset adds the necessary compatible and the clock data for it. Jerome Brunet (2): dt-bindings: pwm: meson: add comptabible for gxbb ao pwms pwm: meson: add compatible for the gxbb ao pwms .../devicetree/bindings/pwm/pwm-meson.txt | 4 ++- drivers/pwm/pwm-meson.c | 32 ++++++++++++++++++++-- 2 files changed, 32 insertions(+), 4 deletions(-) -- 2.9.4
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| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-06-07 15:40 +0200 |
| Subject | Re: [PATCH 2/2] pwm: meson: add compatible for the gxbb ao pwms |
| Message-ID | <tPJlM-7eC-13@gated-at.bofh.it> |
| In reply to | #1659801 |
On 06/07/2017 03:30 PM, Jerome Brunet wrote:
> On the gxbb (and gxl) family, the PWMs of the AO domain require a
> specific compatible because the possible input clocks are different
> from the EE PWMs input clocks.
>
> Since the number of possible input clocks is also different, the
> 'num_parents' field is added to all the meson pwm data.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> drivers/pwm/pwm-meson.c | 32 +++++++++++++++++++++++++++++---
> 1 file changed, 29 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> index 045ef9fa6fe3..a385fcc5cfad 100644
> --- a/drivers/pwm/pwm-meson.c
> +++ b/drivers/pwm/pwm-meson.c
> @@ -103,6 +103,7 @@ struct meson_pwm_channel {
>
> struct meson_pwm_data {
> const char * const *parent_names;
> + int num_parents;
> };
>
> struct meson_pwm {
> @@ -381,6 +382,7 @@ static const char * const pwm_meson8b_parent_names[] = {
>
> static const struct meson_pwm_data pwm_meson8b_data = {
> .parent_names = pwm_meson8b_parent_names,
> + .num_parents = ARRAY_SIZE(pwm_meson8b_parent_names),
> };
>
> static const char * const pwm_gxbb_parent_names[] = {
> @@ -389,11 +391,35 @@ static const char * const pwm_gxbb_parent_names[] = {
>
> static const struct meson_pwm_data pwm_gxbb_data = {
> .parent_names = pwm_gxbb_parent_names,
> + .num_parents = ARRAY_SIZE(pwm_gxbb_parent_names),
> +};
> +
> +/*
> + * Only the 2 first inputs of the GXBB AO PWMs are valid
> + * The last 2 are grounded
> + */
> +static const char * const pwm_gxbb_ao_parent_names[] = {
> + "clk81", "xtal"
> +};
> +
> +static const struct meson_pwm_data pwm_gxbb_ao_data = {
> + .parent_names = pwm_gxbb_ao_parent_names,
> + .num_parents = ARRAY_SIZE(pwm_gxbb_ao_parent_names),
> };
>
> static const struct of_device_id meson_pwm_matches[] = {
> - { .compatible = "amlogic,meson8b-pwm", .data = &pwm_meson8b_data },
> - { .compatible = "amlogic,meson-gxbb-pwm", .data = &pwm_gxbb_data },
> + {
> + .compatible = "amlogic,meson8b-pwm",
> + .data = &pwm_meson8b_data
> + },
> + {
> + .compatible = "amlogic,meson-gxbb-pwm",
> + .data = &pwm_gxbb_data
> + },
> + {
> + .compatible = "amlogic,meson-gxbb-ao-pwm",
> + .data = &pwm_gxbb_ao_data
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, meson_pwm_matches);
> @@ -417,7 +443,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson,
> init.ops = &clk_mux_ops;
> init.flags = CLK_IS_BASIC;
> init.parent_names = meson->data->parent_names;
> - init.num_parents = 1 << MISC_CLK_SEL_WIDTH;
> + init.num_parents = meson->data->num_parents;
>
> channel->mux.reg = meson->base + REG_MISC_AB;
> channel->mux.shift = mux_reg_shifts[i];
>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
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| From | Jerome Brunet <jbrunet@baylibre.com> |
|---|---|
| Date | 2017-06-07 15:40 +0200 |
| Subject | [PATCH 1/2] dt-bindings: pwm: meson: add comptabible for gxbb ao pwms |
| Message-ID | <tPJlM-7eC-9@gated-at.bofh.it> |
| In reply to | #1659801 |
Add compatible string to properly handle the PWMs found in the AO domain of the gxbb (and gxl) family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- Documentation/devicetree/bindings/pwm/pwm-meson.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-meson.txt b/Documentation/devicetree/bindings/pwm/pwm-meson.txt index 5376a4468cb6..5b07bebbf6f7 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-meson.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-meson.txt @@ -2,7 +2,9 @@ Amlogic Meson PWM Controller ============================ Required properties: -- compatible: Shall contain "amlogic,meson8b-pwm" or "amlogic,meson-gxbb-pwm". +- compatible: Shall contain "amlogic,meson8b-pwm" + or "amlogic,meson-gxbb-pwm" + or "amlogic,meson-gxbb-ao-pwm" - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. -- 2.9.4
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| From | Jerome Brunet <jbrunet@baylibre.com> |
|---|---|
| Date | 2017-06-07 15:40 +0200 |
| Subject | [PATCH 2/2] pwm: meson: add compatible for the gxbb ao pwms |
| Message-ID | <tPJlM-7eC-15@gated-at.bofh.it> |
| In reply to | #1659801 |
On the gxbb (and gxl) family, the PWMs of the AO domain require a
specific compatible because the possible input clocks are different
from the EE PWMs input clocks.
Since the number of possible input clocks is also different, the
'num_parents' field is added to all the meson pwm data.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/pwm/pwm-meson.c | 32 +++++++++++++++++++++++++++++---
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 045ef9fa6fe3..a385fcc5cfad 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -103,6 +103,7 @@ struct meson_pwm_channel {
struct meson_pwm_data {
const char * const *parent_names;
+ int num_parents;
};
struct meson_pwm {
@@ -381,6 +382,7 @@ static const char * const pwm_meson8b_parent_names[] = {
static const struct meson_pwm_data pwm_meson8b_data = {
.parent_names = pwm_meson8b_parent_names,
+ .num_parents = ARRAY_SIZE(pwm_meson8b_parent_names),
};
static const char * const pwm_gxbb_parent_names[] = {
@@ -389,11 +391,35 @@ static const char * const pwm_gxbb_parent_names[] = {
static const struct meson_pwm_data pwm_gxbb_data = {
.parent_names = pwm_gxbb_parent_names,
+ .num_parents = ARRAY_SIZE(pwm_gxbb_parent_names),
+};
+
+/*
+ * Only the 2 first inputs of the GXBB AO PWMs are valid
+ * The last 2 are grounded
+ */
+static const char * const pwm_gxbb_ao_parent_names[] = {
+ "clk81", "xtal"
+};
+
+static const struct meson_pwm_data pwm_gxbb_ao_data = {
+ .parent_names = pwm_gxbb_ao_parent_names,
+ .num_parents = ARRAY_SIZE(pwm_gxbb_ao_parent_names),
};
static const struct of_device_id meson_pwm_matches[] = {
- { .compatible = "amlogic,meson8b-pwm", .data = &pwm_meson8b_data },
- { .compatible = "amlogic,meson-gxbb-pwm", .data = &pwm_gxbb_data },
+ {
+ .compatible = "amlogic,meson8b-pwm",
+ .data = &pwm_meson8b_data
+ },
+ {
+ .compatible = "amlogic,meson-gxbb-pwm",
+ .data = &pwm_gxbb_data
+ },
+ {
+ .compatible = "amlogic,meson-gxbb-ao-pwm",
+ .data = &pwm_gxbb_ao_data
+ },
{},
};
MODULE_DEVICE_TABLE(of, meson_pwm_matches);
@@ -417,7 +443,7 @@ static int meson_pwm_init_channels(struct meson_pwm *meson,
init.ops = &clk_mux_ops;
init.flags = CLK_IS_BASIC;
init.parent_names = meson->data->parent_names;
- init.num_parents = 1 << MISC_CLK_SEL_WIDTH;
+ init.num_parents = meson->data->num_parents;
channel->mux.reg = meson->base + REG_MISC_AB;
channel->mux.shift = mux_reg_shifts[i];
--
2.9.4
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