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| Started by | Ryder Lee <ryder.lee@mediatek.com> |
|---|---|
| First post | 2017-06-01 04:40 +0200 |
| Last post | 2017-06-01 04:40 +0200 |
| Articles | 3 — 1 participant |
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[PATCH v1 0/2] remove mediatek ethif clock in crypto driver Ryder Lee <ryder.lee@mediatek.com> - 2017-06-01 04:40 +0200
[PATCH v1 1/2] crypto: mediatek - remove redundant clock setting Ryder Lee <ryder.lee@mediatek.com> - 2017-06-01 04:40 +0200
[PATCH v1 2/2] dt-bindings: crypto: remove mediatek ethif clock Ryder Lee <ryder.lee@mediatek.com> - 2017-06-01 04:40 +0200
| From | Ryder Lee <ryder.lee@mediatek.com> |
|---|---|
| Date | 2017-06-01 04:40 +0200 |
| Subject | [PATCH v1 0/2] remove mediatek ethif clock in crypto driver |
| Message-ID | <tNobL-52F-5@gated-at.bofh.it> |
This patch series only remove redundant clock setting in mediatek crypto driver. Changes since v1: -rework the commit message. Ryder Lee (2): crypto: mediatek - remove redundant clock setting dt-bindings: crypto: remove mediatek ethif clock Documentation/devicetree/bindings/crypto/mediatek-crypto.txt | 8 +++----- drivers/crypto/mediatek/mtk-platform.c | 10 +--------- drivers/crypto/mediatek/mtk-platform.h | 2 -- 3 files changed, 4 insertions(+), 16 deletions(-) -- 1.9.1
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| From | Ryder Lee <ryder.lee@mediatek.com> |
|---|---|
| Date | 2017-06-01 04:40 +0200 |
| Subject | [PATCH v1 1/2] crypto: mediatek - remove redundant clock setting |
| Message-ID | <tNobL-52F-7@gated-at.bofh.it> |
| In reply to | #1654762 |
This patch removes redundant clock setting for 'clk_ethif', which is
the parent of 'clk_cryp'. Hence, we just need to handle its child.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
---
drivers/crypto/mediatek/mtk-platform.c | 10 +---------
drivers/crypto/mediatek/mtk-platform.h | 2 --
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/crypto/mediatek/mtk-platform.c b/drivers/crypto/mediatek/mtk-platform.c
index b6ecc28..9b4437c 100644
--- a/drivers/crypto/mediatek/mtk-platform.c
+++ b/drivers/crypto/mediatek/mtk-platform.c
@@ -504,19 +504,14 @@ static int mtk_crypto_probe(struct platform_device *pdev)
}
}
- cryp->clk_ethif = devm_clk_get(&pdev->dev, "ethif");
cryp->clk_cryp = devm_clk_get(&pdev->dev, "cryp");
- if (IS_ERR(cryp->clk_ethif) || IS_ERR(cryp->clk_cryp))
+ if (IS_ERR(cryp->clk_cryp))
return -EPROBE_DEFER;
cryp->dev = &pdev->dev;
pm_runtime_enable(cryp->dev);
pm_runtime_get_sync(cryp->dev);
- err = clk_prepare_enable(cryp->clk_ethif);
- if (err)
- goto err_clk_ethif;
-
err = clk_prepare_enable(cryp->clk_cryp);
if (err)
goto err_clk_cryp;
@@ -559,8 +554,6 @@ static int mtk_crypto_probe(struct platform_device *pdev)
err_resource:
clk_disable_unprepare(cryp->clk_cryp);
err_clk_cryp:
- clk_disable_unprepare(cryp->clk_ethif);
-err_clk_ethif:
pm_runtime_put_sync(cryp->dev);
pm_runtime_disable(cryp->dev);
@@ -576,7 +569,6 @@ static int mtk_crypto_remove(struct platform_device *pdev)
mtk_desc_dma_free(cryp);
clk_disable_unprepare(cryp->clk_cryp);
- clk_disable_unprepare(cryp->clk_ethif);
pm_runtime_put_sync(cryp->dev);
pm_runtime_disable(cryp->dev);
diff --git a/drivers/crypto/mediatek/mtk-platform.h b/drivers/crypto/mediatek/mtk-platform.h
index 303c152..f0831f1 100644
--- a/drivers/crypto/mediatek/mtk-platform.h
+++ b/drivers/crypto/mediatek/mtk-platform.h
@@ -200,7 +200,6 @@ struct mtk_sha_rec {
* struct mtk_cryp - Cryptographic device
* @base: pointer to mapped register I/O base
* @dev: pointer to device
- * @clk_ethif: pointer to ethif clock
* @clk_cryp: pointer to crypto clock
* @irq: global system and rings IRQ
* @ring: pointer to descriptor rings
@@ -215,7 +214,6 @@ struct mtk_sha_rec {
struct mtk_cryp {
void __iomem *base;
struct device *dev;
- struct clk *clk_ethif;
struct clk *clk_cryp;
int irq[MTK_IRQ_NUM];
--
1.9.1
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| From | Ryder Lee <ryder.lee@mediatek.com> |
|---|---|
| Date | 2017-06-01 04:40 +0200 |
| Subject | [PATCH v1 2/2] dt-bindings: crypto: remove mediatek ethif clock |
| Message-ID | <tNobL-52F-13@gated-at.bofh.it> |
| In reply to | #1654762 |
This patch removes the parent clock 'ethif' in bindings, since we don't need to control the parent of a clock in current clock framework. Moreover, the clocks are get by name in the driver, thus this change does not break backwards compatibility. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> --- Documentation/devicetree/bindings/crypto/mediatek-crypto.txt | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt index c204725..450da36 100644 --- a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt +++ b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt @@ -6,8 +6,7 @@ Required properties: - interrupts: Should contain the five crypto engines interrupts in numeric order. These are global system and four descriptor rings. - clocks: the clock used by the core -- clock-names: the names of the clock listed in the clocks property. These are - "ethif", "cryp" +- clock-names: Must contain "cryp". - power-domains: Must contain a reference to the PM domain. @@ -20,8 +19,7 @@ Example: <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_ETHIF_SEL>, - <ðsys CLK_ETHSYS_CRYPTO>; - clock-names = "ethif","cryp"; + clocks = <ðsys CLK_ETHSYS_CRYPTO>; + clock-names = "cryp"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; }; -- 1.9.1
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