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| Started by | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| First post | 2017-05-24 10:30 +0200 |
| Last post | 2017-05-24 11:00 +0200 |
| Articles | 2 — 2 participants |
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[PATCH 4/5] pinctrl: meson-gxl: Add CEC pins Neil Armstrong <narmstrong@baylibre.com> - 2017-05-24 10:30 +0200
Re: [PATCH 4/5] pinctrl: meson-gxl: Add CEC pins Jerome Brunet <jbrunet@baylibre.com> - 2017-05-24 11:00 +0200
| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2017-05-24 10:30 +0200 |
| Subject | [PATCH 4/5] pinctrl: meson-gxl: Add CEC pins |
| Message-ID | <tKzQ8-8hN-67@gated-at.bofh.it> |
Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 454d73f..7d81287 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -282,6 +282,9 @@
static const unsigned int spdif_out_ao_6_pins[] = { PIN(GPIOAO_6, 0) };
static const unsigned int spdif_out_ao_9_pins[] = { PIN(GPIOAO_9, 0) };
+static const unsigned int ao_cec_pins[] = { PIN(GPIOAO_8, 0) };
+static const unsigned int ee_cec_pins[] = { PIN(GPIOAO_8, 0) };
+
static struct meson_pmx_group meson_gxl_periphs_groups[] = {
GPIO_GROUP(GPIOZ_0, EE_OFF),
GPIO_GROUP(GPIOZ_1, EE_OFF),
@@ -527,6 +530,8 @@
GROUP(i2s_out_ch45_ao, 1, 1),
GROUP(spdif_out_ao_6, 0, 16),
GROUP(spdif_out_ao_9, 0, 4),
+ GROUP(ao_cec, 0, 15),
+ GROUP(ee_cec, 0, 14),
};
static const char * const gpio_periphs_groups[] = {
@@ -702,6 +707,10 @@
"spdif_out_ao_6", "spdif_out_ao_9",
};
+static const char * const cec_ao_groups[] = {
+ "ao_cec", "ee_cec",
+};
+
static struct meson_pmx_func meson_gxl_periphs_functions[] = {
FUNCTION(gpio_periphs),
FUNCTION(emmc),
@@ -740,6 +749,7 @@
FUNCTION(pwm_ao_b),
FUNCTION(i2s_out_ao),
FUNCTION(spdif_out_ao),
+ FUNCTION(cec_ao),
};
static struct meson_bank meson_gxl_periphs_banks[] = {
--
1.9.1
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| From | Jerome Brunet <jbrunet@baylibre.com> |
|---|---|
| Date | 2017-05-24 11:00 +0200 |
| Message-ID | <tKAj9-8uU-25@gated-at.bofh.it> |
| In reply to | #1649253 |
On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.
Same comment as patch 3 in the same series
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> index 454d73f..7d81287 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> @@ -282,6 +282,9 @@
> static const unsigned int spdif_out_ao_6_pins[] = { PIN(GPIOAO_6, 0)
> };
> static const unsigned int spdif_out_ao_9_pins[] = { PIN(GPIOAO_9, 0)
> };
>
> +static const unsigned int ao_cec_pins[] = { PIN(GPIOAO_8, 0)
> };
> +static const unsigned int ee_cec_pins[] = { PIN(GPIOAO_8, 0)
> };
> +
> static struct meson_pmx_group meson_gxl_periphs_groups[] = {
> GPIO_GROUP(GPIOZ_0, EE_OFF),
> GPIO_GROUP(GPIOZ_1, EE_OFF),
> @@ -527,6 +530,8 @@
> GROUP(i2s_out_ch45_ao, 1, 1),
> GROUP(spdif_out_ao_6, 0, 16),
> GROUP(spdif_out_ao_9, 0, 4),
> + GROUP(ao_cec, 0, 15),
> + GROUP(ee_cec, 0, 14),
> };
>
> static const char * const gpio_periphs_groups[] = {
> @@ -702,6 +707,10 @@
> "spdif_out_ao_6", "spdif_out_ao_9",
> };
>
> +static const char * const cec_ao_groups[] = {
> + "ao_cec", "ee_cec",
> +};
> +
> static struct meson_pmx_func meson_gxl_periphs_functions[] = {
> FUNCTION(gpio_periphs),
> FUNCTION(emmc),
> @@ -740,6 +749,7 @@
> FUNCTION(pwm_ao_b),
> FUNCTION(i2s_out_ao),
> FUNCTION(spdif_out_ao),
> + FUNCTION(cec_ao),
> };
>
> static struct meson_bank meson_gxl_periphs_banks[] = {
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