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| Started by | Cosar Dindar <cosardindar@gmail.com> |
|---|---|
| First post | 2017-05-22 16:40 +0200 |
| Last post | 2017-05-23 16:10 +0200 |
| Articles | 2 — 2 participants |
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[PATCH v3 3/5] ARM: dts: stm32: Add CRC support to stm32f429 Cosar Dindar <cosardindar@gmail.com> - 2017-05-22 16:40 +0200
Re: [PATCH v3 3/5] ARM: dts: stm32: Add CRC support to stm32f429 Alexandre Torgue <alexandre.torgue@st.com> - 2017-05-23 16:10 +0200
| From | Cosar Dindar <cosardindar@gmail.com> |
|---|---|
| Date | 2017-05-22 16:40 +0200 |
| Subject | [PATCH v3 3/5] ARM: dts: stm32: Add CRC support to stm32f429 |
| Message-ID | <tJWF5-6Ra-41@gated-at.bofh.it> |
Add CRC32 Crypto support to stm32f429.
Signed-off-by: Cosar Dindar <cosardindar@gmail.com>
---
arch/arm/boot/dts/stm32f429.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index b2a2b5c..18343de 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -766,6 +766,13 @@
};
};
+ crc: crc@40023000 {
+ compatible = "st,stm32f4-crc";
+ reg = <0x40023000 0x400>;
+ clocks = <&rcc 0 STM32F4_AHB1_CLOCK(CRC)>;
+ status = "disabled";
+ };
+
rcc: rcc@40023810 {
#reset-cells = <1>;
#clock-cells = <2>;
--
2.7.4
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| From | Alexandre Torgue <alexandre.torgue@st.com> |
|---|---|
| Date | 2017-05-23 16:10 +0200 |
| Message-ID | <tKiFA-4he-21@gated-at.bofh.it> |
| In reply to | #1646995 |
On 05/22/2017 04:34 PM, Cosar Dindar wrote:
> Add CRC32 Crypto support to stm32f429.
>
> Signed-off-by: Cosar Dindar <cosardindar@gmail.com>
Will be applied in STM32 branch for next pull request.
Thanks
Alex
> ---
> arch/arm/boot/dts/stm32f429.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
> index b2a2b5c..18343de 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -766,6 +766,13 @@
> };
> };
>
> + crc: crc@40023000 {
> + compatible = "st,stm32f4-crc";
> + reg = <0x40023000 0x400>;
> + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(CRC)>;
> + status = "disabled";
> + };
> +
> rcc: rcc@40023810 {
> #reset-cells = <1>;
> #clock-cells = <2>;
>
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