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[PATCH v6 0/9] AXP803 PMIC support for Pine64

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  [PATCH v6 0/9] AXP803 PMIC support for Pine64 Icenowy Zheng <icenowy@aosc.io> - 2017-05-18 09:20 +0200
    [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC Icenowy Zheng <icenowy@aosc.io> - 2017-05-18 09:30 +0200
      Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64  R_INTC Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-05-18 10:00 +0200
        Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC Chen-Yu Tsai <wens@csie.org> - 2017-05-19 04:30 +0200
      Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC Icenowy Zheng <icenowy@aosc.io> - 2017-05-22 11:50 +0200
        Re: [linux-sunxi] Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support  for the NMI in A64 R_INTC Chen-Yu Tsai <wens@csie.org> - 2017-05-22 16:30 +0200
      Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64  R_INTC Marc Zyngier <marc.zyngier@arm.com> - 2017-05-22 11:50 +0200
    [PATCH v6 3/9] arm64: allwinner: a64: add NMI (R_INTC) controller on A64 Icenowy Zheng <icenowy@aosc.io> - 2017-05-18 09:30 +0200
      Re: [linux-sunxi] [PATCH v6 3/9] arm64: allwinner: a64: add NMI  (R_INTC) controller on A64 Chen-Yu Tsai <wens@csie.org> - 2017-05-19 04:30 +0200

#1643900 — [PATCH v6 0/9] AXP803 PMIC support for Pine64

The Pine64 (including Pine64+) boards have an AXP803 PMIC, which is a PMIC
similar to AXP288, but tweaked to use with Allwinner SoCs rather than Intel
tablets (with DCIN and Vbus re-splitted like other AXP PMICs, and RSB bus
support added).

This patchset adds support for it and enabled it in Pine64 device tree.

Some parts of this patchset is already applied, including basical AXP803
MFD code and A64 RSB device node.

Thus this patchset is now still two parts, but a bit different to older
revisions:

- Part1: from PATCH 1/9 to PATCH 4/9, which focus on enabling AXP803 in the
  device tree: the R_INTC interrupt controller (for the NMI line, which is
  connected to AXP803 on Pine64), and finally the basical AXP803 node.
- Part2: from PATCH 5/9 to PATCH 9/9, which are enabling the regulator
  function of the AXP803 PMIC. Finally Wi-Fi function is added
  as a usage of regulators function.

PATCH 1 adds device tree binding of A64 R_INTC.

PATCH 2 really adds support for A64 R_INTC in NMI driver.

PATCH 3 adds R_INTC node in A64 device tree.

PATCH 4 adds AXP803 node to the Pine64 device tree by using already
applied drivers/bindings.

PATCH 5 adds support for AXP803 regulators in AXP20x regulatoe driver.
(The binding is already applied)

PATCH 6 enables the AXP803 regulator cell in MFD driver.

PATCH 7 adds a DTSI file for AXP803, like other older AXP PMICs.

PATCH 8 enables AXP803 regulators in Pine64 device tree.

PATCH 9 enables Wi-Fi for Pine64.

Icenowy Zheng (9):
  irqchip/sunxi-nmi: add A64 R_INTC to the binding doc
  irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC
  arm64: allwinner: a64: add NMI (R_INTC) controller on A64
  arm64: allwinner: a64: add AXP803 node to Pine64 device tree
  regulator: axp20x-regulator: add support for AXP803
  mfd: axp20x: add axp20x-regulator cell for AXP803
  arm64: allwinner: a64: add DTSI file for AXP803 PMIC
  arm64: allwinner: a64: enable AXP803 regulators for Pine64
  arm64: allwinner: a64: enable Wi-Fi for Pine64

 .../interrupt-controller/allwinner,sunxi-nmi.txt   |   7 +-
 arch/arm64/boot/dts/allwinner/axp803.dtsi          | 150 ++++++++++++++++++++
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 136 ++++++++++++++++++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      |   8 ++
 drivers/irqchip/irq-sunxi-nmi.c                    |  13 ++
 drivers/mfd/axp20x.c                               |   3 +-
 drivers/regulator/axp20x-regulator.c               | 153 ++++++++++++++++++---
 include/linux/mfd/axp20x.h                         |  37 +++++
 8 files changed, 482 insertions(+), 25 deletions(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/axp803.dtsi

-- 
2.12.2

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#1643901 — [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

Add support for the newly imported compatible for the A64 R_INTC in
irq-sunxi-nmi driver.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
Changes in v5:
- Fix A64 R_INTC compatible.

 drivers/irqchip/irq-sunxi-nmi.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
index 668730c5cb66..5559c1d593bf 100644
--- a/drivers/irqchip/irq-sunxi-nmi.c
+++ b/drivers/irqchip/irq-sunxi-nmi.c
@@ -56,6 +56,12 @@ static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
 	.enable	= 0x04,
 };
 
+static struct sunxi_sc_nmi_reg_offs sun50i_reg_offs = {
+	.ctrl	= 0x0c,
+	.pend	= 0x10,
+	.enable	= 0x40,
+};
+
 static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off,
 				      u32 val)
 {
@@ -220,3 +226,10 @@ static int __init sun9i_nmi_irq_init(struct device_node *node,
 	return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs);
 }
 IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init);
+
+static int __init sun50i_nmi_irq_init(struct device_node *node,
+				     struct device_node *parent)
+{
+	return sunxi_sc_nmi_irq_init(node, &sun50i_reg_offs);
+}
+IRQCHIP_DECLARE(sun50i_nmi, "allwinner,sun50i-a64-r-intc", sun50i_nmi_irq_init);
-- 
2.12.2

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#1643919 — Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

[Multipart message — attachments visible in raw view] — view raw

On Thu, May 18, 2017 at 03:16:46PM +0800, Icenowy Zheng wrote:
> Add support for the newly imported compatible for the A64 R_INTC in
> irq-sunxi-nmi driver.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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#1645135 — Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

On Thu, May 18, 2017 at 3:52 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Thu, May 18, 2017 at 03:16:46PM +0800, Icenowy Zheng wrote:
>> Add support for the newly imported compatible for the A64 R_INTC in
>> irq-sunxi-nmi driver.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Reviewed-by: Chen-Yu Tsai <wens@csie.org>

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#1646679 — Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

于 2017年5月22日 GMT+08:00 下午5:39:22, Marc Zyngier <marc.zyngier@arm.com> 写到:
>On 18/05/17 08:16, Icenowy Zheng wrote:
>> Add support for the newly imported compatible for the A64 R_INTC in
>> irq-sunxi-nmi driver.
>> 
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> ---
>> Changes in v5:
>> - Fix A64 R_INTC compatible.
>> 
>>  drivers/irqchip/irq-sunxi-nmi.c | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>> 
>> diff --git a/drivers/irqchip/irq-sunxi-nmi.c
>b/drivers/irqchip/irq-sunxi-nmi.c
>> index 668730c5cb66..5559c1d593bf 100644
>> --- a/drivers/irqchip/irq-sunxi-nmi.c
>> +++ b/drivers/irqchip/irq-sunxi-nmi.c
>> @@ -56,6 +56,12 @@ static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs
>= {
>>  	.enable	= 0x04,
>>  };
>>  
>> +static struct sunxi_sc_nmi_reg_offs sun50i_reg_offs = {
>> +	.ctrl	= 0x0c,
>> +	.pend	= 0x10,
>> +	.enable	= 0x40,
>> +};
>> +
>
>Magic values? Even if no #define is provided, a pointer to the
>corresponding documentation would be appreciated (assuming
>documentation
>exists).

No documents is available for A64 R_INTC.

>
>>  static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc,
>u32 off,
>>  				      u32 val)
>>  {
>> @@ -220,3 +226,10 @@ static int __init sun9i_nmi_irq_init(struct
>device_node *node,
>>  	return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs);
>>  }
>>  IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi",
>sun9i_nmi_irq_init);
>> +
>> +static int __init sun50i_nmi_irq_init(struct device_node *node,
>> +				     struct device_node *parent)
>> +{
>> +	return sunxi_sc_nmi_irq_init(node, &sun50i_reg_offs);
>> +}
>> +IRQCHIP_DECLARE(sun50i_nmi, "allwinner,sun50i-a64-r-intc",
>sun50i_nmi_irq_init);
>> 
>
>Apart from the above:
>
>Acked-by: Marc Zyngier <marc.zyngier@arm.com>
>
>Let me know how you want this to be merged.

I think it can just go via IRQ subsystem.

>
>Thanks,
>
>	M.

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#1646981 — Re: [linux-sunxi] Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

On Mon, May 22, 2017 at 5:41 PM, Icenowy Zheng <icenowy@aosc.io> wrote:
>
>
> 于 2017年5月22日 GMT+08:00 下午5:39:22, Marc Zyngier <marc.zyngier@arm.com> 写到:
>>On 18/05/17 08:16, Icenowy Zheng wrote:
>>> Add support for the newly imported compatible for the A64 R_INTC in
>>> irq-sunxi-nmi driver.
>>>
>>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>> ---
>>> Changes in v5:
>>> - Fix A64 R_INTC compatible.
>>>
>>>  drivers/irqchip/irq-sunxi-nmi.c | 13 +++++++++++++
>>>  1 file changed, 13 insertions(+)
>>>
>>> diff --git a/drivers/irqchip/irq-sunxi-nmi.c
>>b/drivers/irqchip/irq-sunxi-nmi.c
>>> index 668730c5cb66..5559c1d593bf 100644
>>> --- a/drivers/irqchip/irq-sunxi-nmi.c
>>> +++ b/drivers/irqchip/irq-sunxi-nmi.c
>>> @@ -56,6 +56,12 @@ static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs
>>= {
>>>      .enable = 0x04,
>>>  };
>>>
>>> +static struct sunxi_sc_nmi_reg_offs sun50i_reg_offs = {
>>> +    .ctrl   = 0x0c,
>>> +    .pend   = 0x10,
>>> +    .enable = 0x40,
>>> +};
>>> +
>>
>>Magic values? Even if no #define is provided, a pointer to the
>>corresponding documentation would be appreciated (assuming
>>documentation
>>exists).
>
> No documents is available for A64 R_INTC.

No code either. In Allwinner's BSP, the interrupts for the PMICs go
through the (closed source) OpenRISC firmware, so there's no driver
for it in the kernel.

The registers line up with the old interrupt controller from the A10,
but it seems only the NMI interrupt is wired up.

ChenYu

>>
>>>  static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc,
>>u32 off,
>>>                                    u32 val)
>>>  {
>>> @@ -220,3 +226,10 @@ static int __init sun9i_nmi_irq_init(struct
>>device_node *node,
>>>      return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs);
>>>  }
>>>  IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi",
>>sun9i_nmi_irq_init);
>>> +
>>> +static int __init sun50i_nmi_irq_init(struct device_node *node,
>>> +                                 struct device_node *parent)
>>> +{
>>> +    return sunxi_sc_nmi_irq_init(node, &sun50i_reg_offs);
>>> +}
>>> +IRQCHIP_DECLARE(sun50i_nmi, "allwinner,sun50i-a64-r-intc",
>>sun50i_nmi_irq_init);
>>>
>>
>>Apart from the above:
>>
>>Acked-by: Marc Zyngier <marc.zyngier@arm.com>
>>
>>Let me know how you want this to be merged.
>
> I think it can just go via IRQ subsystem.
>
>>
>>Thanks,
>>
>>       M.
>
> --
> You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@googlegroups.com.
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#1646681 — Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

On 18/05/17 08:16, Icenowy Zheng wrote:
> Add support for the newly imported compatible for the A64 R_INTC in
> irq-sunxi-nmi driver.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
> Changes in v5:
> - Fix A64 R_INTC compatible.
> 
>  drivers/irqchip/irq-sunxi-nmi.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
> index 668730c5cb66..5559c1d593bf 100644
> --- a/drivers/irqchip/irq-sunxi-nmi.c
> +++ b/drivers/irqchip/irq-sunxi-nmi.c
> @@ -56,6 +56,12 @@ static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
>  	.enable	= 0x04,
>  };
>  
> +static struct sunxi_sc_nmi_reg_offs sun50i_reg_offs = {
> +	.ctrl	= 0x0c,
> +	.pend	= 0x10,
> +	.enable	= 0x40,
> +};
> +

Magic values? Even if no #define is provided, a pointer to the
corresponding documentation would be appreciated (assuming documentation
exists).

>  static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off,
>  				      u32 val)
>  {
> @@ -220,3 +226,10 @@ static int __init sun9i_nmi_irq_init(struct device_node *node,
>  	return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs);
>  }
>  IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init);
> +
> +static int __init sun50i_nmi_irq_init(struct device_node *node,
> +				     struct device_node *parent)
> +{
> +	return sunxi_sc_nmi_irq_init(node, &sun50i_reg_offs);
> +}
> +IRQCHIP_DECLARE(sun50i_nmi, "allwinner,sun50i-a64-r-intc", sun50i_nmi_irq_init);
> 

Apart from the above:

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

Let me know how you want this to be merged.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

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#1643903 — [PATCH v6 3/9] arm64: allwinner: a64: add NMI (R_INTC) controller on A64

Allwinner A64 SoC features a R_INTC controller, which controls the NMI
line, and this interrupt line is usually connected to the AXP PMIC.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
Changes in v4:
- Changes it to use R_INTC binding and change node label to r_intc.
- Fixed MMIO region.
- Dropped Chen-Yu's ACK due to big change.
Changes in v2:
- Added Chen-Yu's ACK.

 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 90dc4ec79485..45c7c3145248 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -445,6 +445,14 @@
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		r_intc: interrupt-controller@1f00c00 {
+			compatible = "allwinner,sun50i-a64-r-intc";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			reg = <0x01f00c00 0x400>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		r_ccu: clock@1f01400 {
 			compatible = "allwinner,sun50i-a64-r-ccu";
 			reg = <0x01f01400 0x100>;
-- 
2.12.2

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#1645130 — Re: [linux-sunxi] [PATCH v6 3/9] arm64: allwinner: a64: add NMI (R_INTC) controller on A64

On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng <icenowy@aosc.io> wrote:
> Allwinner A64 SoC features a R_INTC controller, which controls the NMI
> line, and this interrupt line is usually connected to the AXP PMIC.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

Reviewed-by: Chen-Yu Tsai <wens@csie.org>

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