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[PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite

Started byIvan Mikhaylov <ivan@de.ibm.com>
First post2017-05-15 15:10 +0200
Last post2017-05-19 12:40 +0200
Articles 5 — 3 participants

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  [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite Ivan Mikhaylov <ivan@de.ibm.com> - 2017-05-15 15:10 +0200
    Re: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite Michael Ellerman <mpe@ellerman.id.au> - 2017-05-19 12:30 +0200
      Re: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite Ivan Mikhaylov <ivan@de.ibm.com> - 2017-05-19 17:50 +0200
        Re: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite Michael Ellerman <mpe@ellerman.id.au> - 2017-05-23 06:20 +0200
    Re: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of  whole rewrite Benjamin Herrenschmidt <benh@kernel.crashing.org> - 2017-05-19 12:40 +0200

#1641634 — [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite

FromIvan Mikhaylov <ivan@de.ibm.com>
Date2017-05-15 15:10 +0200
Subject[PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite
Message-ID<tHnV7-cB-7@gated-at.bofh.it>
Prevent a kernel panic caused by unintentionally clearing TCR
watchdog bits.  At this point in the kernel boot, the watchdog has
already been enabled by u-boot.  The original code's attempt to
write to the TCR register results in an inadvertent clearing of the
watchdog configuration bits, causing the 476 to reset.
Panic happens in case of error as silently reboot without any outputs
on serial.

Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
---
 arch/powerpc/kernel/time.c |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 2b33cfa..f75e512 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -738,12 +738,28 @@ static int __init get_freq(char *name, int cells, unsigned long *val)
 
 static void start_cpu_decrementer(void)
 {
+	unsigned int tcr;
 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 	/* Clear any pending timer interrupts */
 	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
 
+#ifdef CONFIG_FSP2
+	/*
+	 * Prevent a kernel panic caused by unintentionally clearing TCR
+	 * watchdog bits.  At this point in the kernel boot, the watchdog has
+	 * already been enabled by u-boot.  The original code's attempt to
+	 * write to the TCR register results in an inadvertent clearing of the
+	 * watchdog configuration bits, causing the 440 to reset.
+	 */
+	tcr = mfspr(SPRN_TCR);
+	tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */
+	tcr |= TCR_DIE; /* enable decrementer */
+	mtspr(SPRN_TCR, tcr);
+#else
 	/* Enable decrementer interrupt */
 	mtspr(SPRN_TCR, TCR_DIE);
+#endif
+
 #endif /* defined(CONFIG_BOOKE) || defined(CONFIG_40x) */
 }
 
-- 
1.7.1

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#1645497

FromMichael Ellerman <mpe@ellerman.id.au>
Date2017-05-19 12:30 +0200
Message-ID<tINkt-Ng-7@gated-at.bofh.it>
In reply to#1641634
Hi Ivan,

Ivan Mikhaylov <ivan@de.ibm.com> writes:
> Prevent a kernel panic caused by unintentionally clearing TCR
> watchdog bits.  At this point in the kernel boot, the watchdog has
> already been enabled by u-boot.  The original code's attempt to
> write to the TCR register results in an inadvertent clearing of the
> watchdog configuration bits, causing the 476 to reset.
> Panic happens in case of error as silently reboot without any outputs
> on serial.

That sounds reasonable.

> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
> index 2b33cfa..f75e512 100644
> --- a/arch/powerpc/kernel/time.c
> +++ b/arch/powerpc/kernel/time.c
> @@ -738,12 +738,28 @@ static int __init get_freq(char *name, int cells, unsigned long *val)
>  
>  static void start_cpu_decrementer(void)
>  {
> +	unsigned int tcr;
>  #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
>  	/* Clear any pending timer interrupts */
>  	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
>  
> +#ifdef CONFIG_FSP2
> +	/*
> +	 * Prevent a kernel panic caused by unintentionally clearing TCR
> +	 * watchdog bits.  At this point in the kernel boot, the watchdog has
> +	 * already been enabled by u-boot.  The original code's attempt to

Don't refer to "the original code", as it doesn't exist anymore now that
we've patched it. Just say something like ".. so we must not clear the
watchdog configuration bits".

> +	 * write to the TCR register results in an inadvertent clearing of the
> +	 * watchdog configuration bits, causing the 440 to reset.
> +	 */
> +	tcr = mfspr(SPRN_TCR);
> +	tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */
> +	tcr |= TCR_DIE; /* enable decrementer */
> +	mtspr(SPRN_TCR, tcr);
> +#else
>  	/* Enable decrementer interrupt */
>  	mtspr(SPRN_TCR, TCR_DIE);
> +#endif
> +
>  #endif /* defined(CONFIG_BOOKE) || defined(CONFIG_40x) */

That breaks the build for other platforms:

  arch/powerpc/kernel/time.c: In function ‘start_cpu_decrementer’:
  arch/powerpc/kernel/time.c:741:15: error: unused variable ‘tcr’ [-Werror=unused-variable]

You can just do something like:

  #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
  	unsigned int tcr;

  #ifdef CONFIG_FSP2
  	tcr = mfspr(SPRN_TCR);
  	tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */
  #else
  	tcr = 0;
  #endif
  	tcr |= TCR_DIE; /* enable decrementer */
  	mtspr(SPRN_TCR, TCR_DIE);
  #endif /* defined(CONFIG_BOOKE) || defined(CONFIG_40x) */


Or you could possibly just always leave TCR[WP], is there any case where
it would be correct to clear that?

cheers

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#1645685

FromIvan Mikhaylov <ivan@de.ibm.com>
Date2017-05-19 17:50 +0200
Message-ID<tISk9-4bg-9@gated-at.bofh.it>
In reply to#1645497
Hi Michael,

>> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
>> index 2b33cfa..f75e512 100644
>> --- a/arch/powerpc/kernel/time.c
>> +++ b/arch/powerpc/kernel/time.c
>> @@ -738,12 +738,28 @@ static int __init get_freq(char *name, int cells, unsigned long *val)
>>  
>>  static void start_cpu_decrementer(void)
>>  {
>> +	unsigned int tcr;
>>  #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
>>  	/* Clear any pending timer interrupts */
>>  	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
>>  
>> +#ifdef CONFIG_FSP2
>> +	/*
>> +	 * Prevent a kernel panic caused by unintentionally clearing TCR
>> +	 * watchdog bits.  At this point in the kernel boot, the watchdog has
>> +	 * already been enabled by u-boot.  The original code's attempt to
>
> Don't refer to "the original code", as it doesn't exist anymore now that
> we've patched it. Just say something like ".. so we must not clear the
> watchdog configuration bits".
Ok, got it.

>That breaks the build for other platforms:
>
> arch/powerpc/kernel/time.c: In function ‘start_cpu_decrementer’:
> arch/powerpc/kernel/time.c:741:15: error: unused variable ‘tcr’ [-Werror=unused-variable]
>
Oops, didn't notice, my fault. 

>Or you could possibly just always leave TCR[WP], is there any case where
>it would be correct to clear that?
>
>cheers

From my point of view it's possible. I've checked docu and on idea
it should be possible cause WP is only affecting watchdog ping time.
Which in case of '00' is very small, around ~5 ms. 
Ben also in next message said about get rid of ifdef for FSP2.

And now patch looks like this, What do you think Michael, Ben?

 arch/powerpc/kernel/time.c |   15 +++++++++++++--
 1 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index bc2e08d..2411c49 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -718,11 +718,22 @@ static int __init get_freq(char *name, int cells, unsigned long *val)
 static void start_cpu_decrementer(void)
 {
 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
+	unsigned int tcr;
 	/* Clear any pending timer interrupts */
 	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
 
-	/* Enable decrementer interrupt */
-	mtspr(SPRN_TCR, TCR_DIE);
+	tcr = mfspr(SPRN_TCR);
+	/*
+	 * At this point in the kernel boot, the watchdog has already
+	 * been enabled by u-boot. If we set it this to '00' it may
+	 * trigger watchdog earlier than needed which will cause
+	 * inattentional kernel panic. In this case we leaving TCR[WP]
+	 * bit setting from uboot/bootstrap.
+	 */
+	tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */
+	tcr |= TCR_DIE; /* enable decrementer */
+	mtspr(SPRN_TCR, tcr);
+
 #endif /* defined(CONFIG_BOOKE) || defined(CONFIG_40x) */
 }
 
-- 
1.7.1

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#1647621

FromMichael Ellerman <mpe@ellerman.id.au>
Date2017-05-23 06:20 +0200
Message-ID<tK9sC-6wZ-3@gated-at.bofh.it>
In reply to#1645685
Ivan Mikhaylov <ivan@de.ibm.com> writes:
>
> From my point of view it's possible. I've checked docu and on idea
> it should be possible cause WP is only affecting watchdog ping time.

The question is, is there any chance that leaving those bits set on
another platform will cause a problem?

ie. on existing machines we always clear those bits, is it OK that we
will now start leaving those bits with whatever value they had.

cheers

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#1645500 — Re: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite

FromBenjamin Herrenschmidt <benh@kernel.crashing.org>
Date2017-05-19 12:40 +0200
SubjectRe: [PATCH 4/4] arch/powerpc/44x/fsp2: wdt tcr update instead of whole rewrite
Message-ID<tINu9-QO-5@gated-at.bofh.it>
In reply to#1641634
On Mon, 2017-05-15 at 16:07 +0300, Ivan Mikhaylov wrote:
> +#ifdef CONFIG_FSP2
> +       /*
> +        * Prevent a kernel panic caused by unintentionally clearing TCR
> +        * watchdog bits.  At this point in the kernel boot, the watchdog has
> +        * already been enabled by u-boot.  The original code's attempt to
> +        * write to the TCR register results in an inadvertent clearing of the
> +        * watchdog configuration bits, causing the 440 to reset.
> +        */
> +       tcr = mfspr(SPRN_TCR);
> +       tcr &= TCR_WP_MASK; /* clear all bits except for TCR[WP] */
> +       tcr |= TCR_DIE; /* enable decrementer */
> +       mtspr(SPRN_TCR, tcr);
> +#else

This should be a runtime test, not a compile time option.

Cheers,
Ben.

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