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| Started by | Len Brown <lenb@kernel.org> |
|---|---|
| First post | 2017-05-12 04:10 +0200 |
| Last post | 2017-05-12 04:10 +0200 |
| Articles | 1 — 1 participant |
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[PATCH 3/5] x86: msr-index.h: fix shifts to ULL results in HWP macros. Len Brown <lenb@kernel.org> - 2017-05-12 04:10 +0200
| From | Len Brown <lenb@kernel.org> |
|---|---|
| Date | 2017-05-12 04:10 +0200 |
| Subject | [PATCH 3/5] x86: msr-index.h: fix shifts to ULL results in HWP macros. |
| Message-ID | <tG8bM-64j-9@gated-at.bofh.it> |
From: Len Brown <len.brown@intel.com> x = 1 ulong_long = x << 32; results in: warning: left shift count >= width of type x = 8 ulong_long = x << 24; results in a sign extended ulong_long Cast x to unsigned long long in these macros to prevent these errors. Signed-off-by: Len Brown <len.brown@intel.com> --- arch/x86/include/asm/msr-index.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 50c0c3204a92..6da2b30781ff 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -238,13 +238,13 @@ #define HWP_MIN_PERF(x) (x & 0xff) #define HWP_MAX_PERF(x) ((x & 0xff) << 8) #define HWP_DESIRED_PERF(x) ((x & 0xff) << 16) -#define HWP_ENERGY_PERF_PREFERENCE(x) ((x & 0xff) << 24) +#define HWP_ENERGY_PERF_PREFERENCE(x) (((unsigned long long) x & 0xff) << 24) #define HWP_EPP_PERFORMANCE 0x00 #define HWP_EPP_BALANCE_PERFORMANCE 0x80 #define HWP_EPP_BALANCE_POWERSAVE 0xC0 #define HWP_EPP_POWERSAVE 0xFF -#define HWP_ACTIVITY_WINDOW(x) ((x & 0xff3) << 32) -#define HWP_PACKAGE_CONTROL(x) ((x & 0x1) << 42) +#define HWP_ACTIVITY_WINDOW(x) ((unsigned long long)(x & 0xff3) << 32) +#define HWP_PACKAGE_CONTROL(x) ((unsigned long long)(x & 0x1) << 42) /* IA32_HWP_STATUS */ #define HWP_GUARANTEED_CHANGE(x) (x & 0x1) -- 2.11.0.161.g6610af872
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